2007-10-29 02:42:18 +03:00
|
|
|
/*
|
|
|
|
* QEMU PowerMac emulation shared definitions and prototypes
|
|
|
|
*
|
|
|
|
* Copyright (c) 2004-2007 Fabrice Bellard
|
|
|
|
* Copyright (c) 2007 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
2016-06-29 14:47:03 +03:00
|
|
|
|
|
|
|
#ifndef PPC_MAC_H
|
|
|
|
#define PPC_MAC_H
|
2007-10-29 02:42:18 +03:00
|
|
|
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/memory.h"
|
2018-06-12 19:43:56 +03:00
|
|
|
#include "hw/boards.h"
|
2013-01-24 03:04:00 +04:00
|
|
|
#include "hw/sysbus.h"
|
2013-01-24 03:04:01 +04:00
|
|
|
#include "hw/ide/internal.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/input/adb.h"
|
2018-02-09 21:51:40 +03:00
|
|
|
#include "hw/misc/mos6522.h"
|
2018-03-06 23:30:50 +03:00
|
|
|
#include "hw/pci/pci_host.h"
|
|
|
|
#include "hw/pci-host/uninorth.h"
|
2011-07-26 15:26:19 +04:00
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* SMP is not enabled, for now */
|
|
|
|
#define MAX_CPUS 1
|
|
|
|
|
2009-05-19 17:52:42 +04:00
|
|
|
#define BIOS_SIZE (1024 * 1024)
|
2007-10-29 02:42:18 +03:00
|
|
|
#define NVRAM_SIZE 0x2000
|
2009-01-09 14:01:31 +03:00
|
|
|
#define PROM_FILENAME "openbios-ppc"
|
2008-12-24 23:23:51 +03:00
|
|
|
#define PROM_ADDR 0xfff00000
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
#define KERNEL_LOAD_ADDR 0x01000000
|
2011-06-16 01:27:19 +04:00
|
|
|
#define KERNEL_GAP 0x00100000
|
2007-10-29 02:42:18 +03:00
|
|
|
|
2009-01-12 20:40:23 +03:00
|
|
|
#define ESCC_CLOCK 3686400
|
|
|
|
|
2018-03-07 01:01:58 +03:00
|
|
|
/* Old World IRQs */
|
|
|
|
#define OLDWORLD_CUDA_IRQ 0x12
|
|
|
|
#define OLDWORLD_ESCCB_IRQ 0x10
|
|
|
|
#define OLDWORLD_ESCCA_IRQ 0xf
|
|
|
|
#define OLDWORLD_IDE0_IRQ 0xd
|
|
|
|
#define OLDWORLD_IDE0_DMA_IRQ 0x2
|
|
|
|
#define OLDWORLD_IDE1_IRQ 0xe
|
|
|
|
#define OLDWORLD_IDE1_DMA_IRQ 0x3
|
2018-02-09 21:51:40 +03:00
|
|
|
|
2018-05-03 23:24:40 +03:00
|
|
|
/* New World IRQs */
|
|
|
|
#define NEWWORLD_CUDA_IRQ 0x19
|
2018-06-12 19:44:02 +03:00
|
|
|
#define NEWWORLD_PMU_IRQ 0x19
|
2018-05-03 23:24:40 +03:00
|
|
|
#define NEWWORLD_ESCCB_IRQ 0x24
|
|
|
|
#define NEWWORLD_ESCCA_IRQ 0x25
|
|
|
|
#define NEWWORLD_IDE0_IRQ 0xd
|
|
|
|
#define NEWWORLD_IDE0_DMA_IRQ 0x2
|
|
|
|
#define NEWWORLD_IDE1_IRQ 0xe
|
|
|
|
#define NEWWORLD_IDE1_DMA_IRQ 0x3
|
2018-06-12 19:43:58 +03:00
|
|
|
#define NEWWORLD_EXTING_GPIO1 0x2f
|
|
|
|
#define NEWWORLD_EXTING_GPIO9 0x37
|
2018-05-03 23:24:40 +03:00
|
|
|
|
2018-06-12 19:43:56 +03:00
|
|
|
/* Core99 machine */
|
|
|
|
#define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99")
|
|
|
|
#define CORE99_MACHINE(obj) OBJECT_CHECK(Core99MachineState, (obj), \
|
|
|
|
TYPE_CORE99_MACHINE)
|
|
|
|
|
2018-06-12 19:43:57 +03:00
|
|
|
#define CORE99_VIA_CONFIG_CUDA 0x0
|
|
|
|
#define CORE99_VIA_CONFIG_PMU 0x1
|
|
|
|
#define CORE99_VIA_CONFIG_PMU_ADB 0x2
|
|
|
|
|
2018-06-12 19:43:56 +03:00
|
|
|
typedef struct Core99MachineState {
|
|
|
|
/*< private >*/
|
|
|
|
MachineState parent;
|
2018-06-12 19:43:57 +03:00
|
|
|
|
|
|
|
uint8_t via_config;
|
2018-06-12 19:43:56 +03:00
|
|
|
} Core99MachineState;
|
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* MacIO */
|
2013-01-24 03:04:01 +04:00
|
|
|
#define TYPE_MACIO_IDE "macio-ide"
|
|
|
|
#define MACIO_IDE(obj) OBJECT_CHECK(MACIOIDEState, (obj), TYPE_MACIO_IDE)
|
|
|
|
|
|
|
|
typedef struct MACIOIDEState {
|
|
|
|
/*< private >*/
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
/*< public >*/
|
2017-09-24 17:47:43 +03:00
|
|
|
uint32_t channel;
|
2017-09-20 09:20:00 +03:00
|
|
|
qemu_irq real_ide_irq;
|
|
|
|
qemu_irq real_dma_irq;
|
|
|
|
qemu_irq ide_irq;
|
2013-01-24 03:04:01 +04:00
|
|
|
qemu_irq dma_irq;
|
|
|
|
|
|
|
|
MemoryRegion mem;
|
|
|
|
IDEBus bus;
|
2013-06-30 04:36:14 +04:00
|
|
|
IDEDMA dma;
|
|
|
|
void *dbdma;
|
2013-06-30 04:54:35 +04:00
|
|
|
bool dma_active;
|
2017-09-20 09:20:00 +03:00
|
|
|
uint32_t timing_reg;
|
|
|
|
uint32_t irq_reg;
|
2013-01-24 03:04:01 +04:00
|
|
|
} MACIOIDEState;
|
|
|
|
|
|
|
|
void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);
|
2017-09-24 17:47:44 +03:00
|
|
|
void macio_ide_register_dma(MACIOIDEState *ide);
|
2013-01-24 03:04:01 +04:00
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* Grackle PCI */
|
2012-08-20 21:08:00 +04:00
|
|
|
#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* Mac NVRAM */
|
2013-01-24 03:04:00 +04:00
|
|
|
#define TYPE_MACIO_NVRAM "macio-nvram"
|
|
|
|
#define MACIO_NVRAM(obj) \
|
|
|
|
OBJECT_CHECK(MacIONVRAMState, (obj), TYPE_MACIO_NVRAM)
|
|
|
|
|
|
|
|
typedef struct MacIONVRAMState {
|
|
|
|
/*< private >*/
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
uint32_t size;
|
|
|
|
uint32_t it_shift;
|
|
|
|
|
|
|
|
MemoryRegion mem;
|
|
|
|
uint8_t *data;
|
|
|
|
} MacIONVRAMState;
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
|
2016-06-29 14:47:03 +03:00
|
|
|
#endif /* PPC_MAC_H */
|