2021-12-21 08:41:03 +03:00
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/*
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* host-signal.h: signal info dependent on the host architecture
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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* Copyright (c) 2021 WANG Xuerui <git@xen0n.name>
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*
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* This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef LOONGARCH64_HOST_SIGNAL_H
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#define LOONGARCH64_HOST_SIGNAL_H
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2022-02-08 09:40:00 +03:00
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/* The third argument to a SA_SIGINFO handler is ucontext_t. */
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typedef ucontext_t host_sigcontext;
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static inline uintptr_t host_signal_pc(host_sigcontext *uc)
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2021-12-21 08:41:03 +03:00
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{
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return uc->uc_mcontext.__pc;
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}
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2022-02-08 09:40:00 +03:00
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static inline void host_signal_set_pc(host_sigcontext *uc, uintptr_t pc)
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2021-12-21 08:41:03 +03:00
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{
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uc->uc_mcontext.__pc = pc;
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}
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2022-02-08 09:40:00 +03:00
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static inline void *host_signal_mask(host_sigcontext *uc)
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2022-02-08 09:30:42 +03:00
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{
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return &uc->uc_sigmask;
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}
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2022-02-08 09:40:00 +03:00
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static inline bool host_signal_write(siginfo_t *info, host_sigcontext *uc)
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2021-12-21 08:41:03 +03:00
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{
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const uint32_t *pinsn = (const uint32_t *)host_signal_pc(uc);
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uint32_t insn = pinsn[0];
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/* Detect store by reading the instruction at the program counter. */
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switch ((insn >> 26) & 0b111111) {
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case 0b001000: /* {ll,sc}.[wd] */
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switch ((insn >> 24) & 0b11) {
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case 0b01: /* sc.w */
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case 0b11: /* sc.d */
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return true;
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}
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break;
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case 0b001001: /* {ld,st}ox4.[wd] ({ld,st}ptr.[wd]) */
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switch ((insn >> 24) & 0b11) {
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case 0b01: /* stox4.w (stptr.w) */
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case 0b11: /* stox4.d (stptr.d) */
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return true;
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}
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break;
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case 0b001010: /* {ld,st}.* family */
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switch ((insn >> 22) & 0b1111) {
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case 0b0100: /* st.b */
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case 0b0101: /* st.h */
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case 0b0110: /* st.w */
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case 0b0111: /* st.d */
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case 0b1101: /* fst.s */
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case 0b1111: /* fst.d */
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return true;
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}
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break;
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case 0b001110: /* indexed, atomic, bounds-checking memory operations */
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2022-01-05 00:50:27 +03:00
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switch ((insn >> 15) & 0b11111111111) {
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2021-12-21 08:41:03 +03:00
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case 0b00000100000: /* stx.b */
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case 0b00000101000: /* stx.h */
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case 0b00000110000: /* stx.w */
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case 0b00000111000: /* stx.d */
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case 0b00001110000: /* fstx.s */
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case 0b00001111000: /* fstx.d */
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case 0b00011101100: /* fstgt.s */
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case 0b00011101101: /* fstgt.d */
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case 0b00011101110: /* fstle.s */
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case 0b00011101111: /* fstle.d */
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case 0b00011111000: /* stgt.b */
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case 0b00011111001: /* stgt.h */
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case 0b00011111010: /* stgt.w */
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case 0b00011111011: /* stgt.d */
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case 0b00011111100: /* stle.b */
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case 0b00011111101: /* stle.h */
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case 0b00011111110: /* stle.w */
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case 0b00011111111: /* stle.d */
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case 0b00011000000 ... 0b00011100011: /* am* insns */
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return true;
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}
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break;
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}
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return false;
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}
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#endif
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