2013-03-18 23:49:22 +04:00
|
|
|
/*
|
|
|
|
* Moxie helper routines.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
2019-02-04 10:54:18 +03:00
|
|
|
* version 2.1 of the License, or (at your option) any later version.
|
2013-03-18 23:49:22 +04:00
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
2019-02-04 10:54:18 +03:00
|
|
|
* You should have received a copy of the GNU Lesser General Public License
|
2013-03-18 23:49:22 +04:00
|
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
2016-01-26 21:17:25 +03:00
|
|
|
#include "qemu/osdep.h"
|
2013-03-18 23:49:22 +04:00
|
|
|
|
|
|
|
#include "cpu.h"
|
|
|
|
#include "mmu.h"
|
|
|
|
#include "exec/exec-all.h"
|
2014-03-28 22:42:10 +04:00
|
|
|
#include "exec/cpu_ldst.h"
|
2013-03-18 23:49:22 +04:00
|
|
|
#include "qemu/host-utils.h"
|
2014-04-08 09:31:41 +04:00
|
|
|
#include "exec/helper-proto.h"
|
2013-03-18 23:49:22 +04:00
|
|
|
|
|
|
|
/* Try to fill the TLB and return an exception if error. If retaddr is
|
|
|
|
NULL, it means that the function was called in C code (i.e. not
|
|
|
|
from generated code or from helper.c) */
|
2018-01-18 22:38:40 +03:00
|
|
|
void tlb_fill(CPUState *cs, target_ulong addr, int size,
|
|
|
|
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
|
2013-03-18 23:49:22 +04:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2018-01-18 22:38:40 +03:00
|
|
|
ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
|
2013-03-18 23:49:22 +04:00
|
|
|
if (unlikely(ret)) {
|
2017-11-14 13:29:34 +03:00
|
|
|
cpu_loop_exit_restore(cs, retaddr);
|
2013-03-18 23:49:22 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void helper_raise_exception(CPUMoxieState *env, int ex)
|
|
|
|
{
|
2013-08-26 10:31:06 +04:00
|
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
|
|
|
|
cs->exception_index = ex;
|
2013-03-18 23:49:22 +04:00
|
|
|
/* Stash the exception type. */
|
|
|
|
env->sregs[2] = ex;
|
|
|
|
/* Stash the address where the exception occurred. */
|
2018-04-09 12:13:20 +03:00
|
|
|
cpu_restore_state(cs, GETPC(), true);
|
2013-03-18 23:49:22 +04:00
|
|
|
env->sregs[5] = env->pc;
|
2015-08-26 14:17:13 +03:00
|
|
|
/* Jump to the exception handline routine. */
|
2013-03-18 23:49:22 +04:00
|
|
|
env->pc = env->sregs[1];
|
2013-08-27 19:52:12 +04:00
|
|
|
cpu_loop_exit(cs);
|
2013-03-18 23:49:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
|
|
|
|
{
|
|
|
|
if (unlikely(b == 0)) {
|
|
|
|
helper_raise_exception(env, MOXIE_EX_DIV0);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (unlikely(a == INT_MIN && b == -1)) {
|
|
|
|
return INT_MIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (int32_t)a / (int32_t)b;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
|
|
|
|
{
|
|
|
|
if (unlikely(b == 0)) {
|
|
|
|
helper_raise_exception(env, MOXIE_EX_DIV0);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
return a / b;
|
|
|
|
}
|
|
|
|
|
|
|
|
void helper_debug(CPUMoxieState *env)
|
|
|
|
{
|
2013-08-26 10:31:06 +04:00
|
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
|
|
|
|
cs->exception_index = EXCP_DEBUG;
|
2013-08-27 19:52:12 +04:00
|
|
|
cpu_loop_exit(cs);
|
2013-03-18 23:49:22 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
|
2013-08-26 05:01:33 +04:00
|
|
|
void moxie_cpu_do_interrupt(CPUState *cs)
|
2013-03-18 23:49:22 +04:00
|
|
|
{
|
2013-08-26 10:31:06 +04:00
|
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
|
|
|
|
cs->exception_index = -1;
|
2013-03-18 23:49:22 +04:00
|
|
|
}
|
|
|
|
|
2018-01-18 22:38:40 +03:00
|
|
|
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
|
2013-03-18 23:49:22 +04:00
|
|
|
int rw, int mmu_idx)
|
|
|
|
{
|
2013-08-26 05:01:33 +04:00
|
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
2013-05-27 03:33:50 +04:00
|
|
|
|
2013-08-26 10:31:06 +04:00
|
|
|
cs->exception_index = 0xaa;
|
2013-08-26 05:01:33 +04:00
|
|
|
cpu->env.debug1 = address;
|
|
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
2013-03-18 23:49:22 +04:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* !CONFIG_USER_ONLY */
|
|
|
|
|
2018-01-18 22:38:40 +03:00
|
|
|
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
|
2013-03-18 23:49:22 +04:00
|
|
|
int rw, int mmu_idx)
|
|
|
|
{
|
2013-08-26 05:01:33 +04:00
|
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
|
|
|
CPUMoxieState *env = &cpu->env;
|
2013-03-18 23:49:22 +04:00
|
|
|
MoxieMMUResult res;
|
|
|
|
int prot, miss;
|
|
|
|
target_ulong phy;
|
|
|
|
int r = 1;
|
|
|
|
|
|
|
|
address &= TARGET_PAGE_MASK;
|
|
|
|
prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
|
|
|
|
miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
|
|
|
|
if (miss) {
|
|
|
|
/* handle the miss. */
|
|
|
|
phy = 0;
|
2013-08-26 10:31:06 +04:00
|
|
|
cs->exception_index = MOXIE_EX_MMU_MISS;
|
2013-03-18 23:49:22 +04:00
|
|
|
} else {
|
|
|
|
phy = res.phy;
|
|
|
|
r = 0;
|
|
|
|
}
|
2013-09-03 15:59:37 +04:00
|
|
|
tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
|
2013-03-18 23:49:22 +04:00
|
|
|
return r;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2013-03-31 05:35:53 +04:00
|
|
|
void moxie_cpu_do_interrupt(CPUState *cs)
|
2013-03-18 23:49:22 +04:00
|
|
|
{
|
2013-08-26 10:31:06 +04:00
|
|
|
switch (cs->exception_index) {
|
2013-03-18 23:49:22 +04:00
|
|
|
case MOXIE_EX_BREAK:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-06-29 20:55:54 +04:00
|
|
|
hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
2013-03-18 23:49:22 +04:00
|
|
|
{
|
2013-06-29 20:55:54 +04:00
|
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
2013-03-18 23:49:22 +04:00
|
|
|
uint32_t phy = addr;
|
|
|
|
MoxieMMUResult res;
|
|
|
|
int miss;
|
2013-06-29 20:55:54 +04:00
|
|
|
|
|
|
|
miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
|
2013-03-18 23:49:22 +04:00
|
|
|
if (!miss) {
|
|
|
|
phy = res.phy;
|
|
|
|
}
|
|
|
|
return phy;
|
|
|
|
}
|
|
|
|
#endif
|