2010-03-21 22:46:26 +03:00
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#ifndef APIC_H
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#define APIC_H
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2010-06-19 11:47:42 +04:00
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#include "qemu-common.h"
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2010-06-19 11:42:08 +04:00
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/* apic.c */
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2011-08-22 19:46:31 +04:00
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void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
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uint8_t vector_num, uint8_t trigger_mode);
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2010-06-19 11:47:42 +04:00
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int apic_accept_pic_intr(DeviceState *s);
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void apic_deliver_pic_intr(DeviceState *s, int level);
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2011-10-17 20:00:06 +04:00
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void apic_deliver_nmi(DeviceState *d);
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2010-06-19 11:47:42 +04:00
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int apic_get_interrupt(DeviceState *s);
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2010-03-21 22:46:26 +03:00
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void apic_reset_irq_delivered(void);
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int apic_get_irq_delivered(void);
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2010-06-19 11:47:42 +04:00
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void cpu_set_apic_base(DeviceState *s, uint64_t val);
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uint64_t cpu_get_apic_base(DeviceState *s);
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void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
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uint8_t cpu_get_apic_tpr(DeviceState *s);
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void apic_init_reset(DeviceState *s);
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void apic_sipi(DeviceState *s);
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2012-02-17 21:31:17 +04:00
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void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
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TPRAccess access);
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2012-07-09 18:42:32 +04:00
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void apic_poll_irq(DeviceState *d);
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2012-07-23 17:22:27 +04:00
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void apic_designate_bsp(DeviceState *d);
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2010-03-21 22:46:26 +03:00
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2010-06-19 11:42:34 +04:00
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/* pc.c */
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2010-06-19 11:47:42 +04:00
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DeviceState *cpu_get_current_apic(void);
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2010-03-21 22:46:26 +03:00
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2012-07-23 17:22:27 +04:00
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/* cpu.c */
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bool cpu_is_bsp(X86CPU *cpu);
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2010-03-21 22:46:26 +03:00
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#endif
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