2019-02-01 05:33:55 +03:00
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/*
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* Nordic Semiconductor nRF51 non-volatile memory
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*
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* It provides an interface to erase regions in flash memory.
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* Furthermore it provides the user and factory information registers.
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*
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* QEMU interface:
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* + sysbus MMIO regions 0: NVMC peripheral registers
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* + sysbus MMIO regions 1: FICR peripheral registers
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* + sysbus MMIO regions 2: UICR peripheral registers
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* + flash-size property: flash size in bytes.
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*
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* Accuracy of the peripheral model:
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* + Code regions (MPU configuration) are disregarded.
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*
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*/
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#ifndef NRF51_NVM_H
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#define NRF51_NVM_H
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#include "hw/sysbus.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2019-02-01 05:33:55 +03:00
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#define TYPE_NRF51_NVM "nrf51_soc.nvm"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(NRF51NVMState, NRF51_NVM)
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2019-02-01 05:33:55 +03:00
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#define NRF51_UICR_FIXTURE_SIZE 64
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#define NRF51_NVMC_SIZE 0x1000
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#define NRF51_NVMC_READY 0x400
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#define NRF51_NVMC_READY_READY 0x01
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#define NRF51_NVMC_CONFIG 0x504
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#define NRF51_NVMC_CONFIG_MASK 0x03
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#define NRF51_NVMC_CONFIG_WEN 0x01
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#define NRF51_NVMC_CONFIG_EEN 0x02
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#define NRF51_NVMC_ERASEPCR1 0x508
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#define NRF51_NVMC_ERASEPCR0 0x510
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#define NRF51_NVMC_ERASEALL 0x50C
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#define NRF51_NVMC_ERASEUICR 0x514
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#define NRF51_NVMC_ERASE 0x01
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#define NRF51_UICR_SIZE 0x100
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2020-09-03 23:43:22 +03:00
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struct NRF51NVMState {
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2019-02-01 05:33:55 +03:00
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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MemoryRegion ficr;
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MemoryRegion uicr;
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MemoryRegion flash;
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uint32_t uicr_content[NRF51_UICR_FIXTURE_SIZE];
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uint32_t flash_size;
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uint8_t *storage;
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uint32_t config;
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2020-09-03 23:43:22 +03:00
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};
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2019-02-01 05:33:55 +03:00
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#endif
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