2003-06-30 14:03:06 +04:00
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/*
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* QEMU System Emulator header
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef VL_H
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#define VL_H
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2004-04-01 03:37:16 +04:00
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <inttypes.h>
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2004-11-07 21:04:02 +03:00
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#include <limits.h>
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2004-03-31 23:00:16 +04:00
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#include <time.h>
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2004-04-01 03:37:16 +04:00
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#include <ctype.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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2004-05-12 23:32:15 +04:00
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#include <sys/stat.h>
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2004-04-01 03:37:16 +04:00
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0
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#endif
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2004-04-04 16:56:28 +04:00
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#ifndef O_BINARY
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#define O_BINARY 0
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#endif
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2004-04-01 03:37:16 +04:00
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#ifdef _WIN32
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2006-06-25 21:18:27 +04:00
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#include <windows.h>
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2006-06-09 01:51:27 +04:00
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#define fsync _commit
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2004-08-04 01:15:11 +04:00
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#define lseek _lseeki64
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#define ENOTSUP 4096
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2006-06-27 00:08:57 +04:00
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extern int qemu_ftruncate64(int, int64_t);
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#define ftruncate qemu_ftruncate64
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2004-08-04 01:15:11 +04:00
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static inline char *realpath(const char *path, char *resolved_path)
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{
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_fullpath(resolved_path, path, _MAX_PATH);
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return resolved_path;
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}
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2006-06-14 19:50:07 +04:00
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#define PRId64 "I64d"
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2006-06-25 22:15:32 +04:00
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#define PRIx64 "I64x"
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#define PRIu64 "I64u"
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#define PRIo64 "I64o"
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2004-04-01 03:37:16 +04:00
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#endif
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2004-03-31 23:00:16 +04:00
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2004-08-02 01:59:26 +04:00
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#ifdef QEMU_TOOL
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/* we use QEMU_TOOL in the command line tools which do not depend on
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the target CPU type */
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#include "config-host.h"
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#include <setjmp.h>
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#include "osdep.h"
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#include "bswap.h"
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#else
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2006-07-05 18:39:57 +04:00
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#include "audio/audio.h"
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2004-02-26 02:25:55 +03:00
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#include "cpu.h"
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2005-04-17 23:16:13 +04:00
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#include "gdbstub.h"
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2004-02-26 02:25:55 +03:00
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2004-08-02 01:59:26 +04:00
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#endif /* !defined(QEMU_TOOL) */
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2004-04-01 03:37:16 +04:00
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#ifndef glue
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s) tostring(s)
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#define tostring(s) #s
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#endif
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2006-05-01 01:28:36 +04:00
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#ifndef MIN
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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#ifndef MAX
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#define MAX(a, b) (((a) > (b)) ? (a) : (b))
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#endif
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2003-07-06 21:15:21 +04:00
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/* vl.c */
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2004-03-14 15:20:30 +03:00
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
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2003-08-11 01:52:11 +04:00
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2004-03-14 15:20:30 +03:00
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void hw_error(const char *fmt, ...);
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extern const char *bios_dir;
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void pstrcpy(char *buf, int buf_size, const char *str);
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char *pstrcat(char *buf, int buf_size, const char *s);
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2004-07-14 21:28:13 +04:00
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int strstart(const char *str, const char *val, const char **ptr);
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2004-03-15 00:44:30 +03:00
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2004-03-31 23:00:16 +04:00
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extern int vm_running;
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2005-11-11 03:00:47 +03:00
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typedef struct vm_change_state_entry VMChangeStateEntry;
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typedef void VMChangeStateHandler(void *opaque, int running);
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2004-03-31 23:00:16 +04:00
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typedef void VMStopHandler(void *opaque, int reason);
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2005-11-11 03:00:47 +03:00
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VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
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void *opaque);
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void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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2004-03-31 23:00:16 +04:00
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void vm_start(void);
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void vm_stop(int reason);
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2004-06-20 16:37:32 +04:00
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typedef void QEMUResetHandler(void *opaque);
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void qemu_register_reset(QEMUResetHandler *func, void *opaque);
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void qemu_system_reset_request(void);
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void qemu_system_shutdown_request(void);
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2005-07-02 18:31:34 +04:00
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void qemu_system_powerdown_request(void);
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#if !defined(TARGET_SPARC)
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0)
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#else
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void qemu_system_powerdown(void);
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#endif
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2004-06-20 16:37:32 +04:00
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2004-08-02 01:59:26 +04:00
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void main_loop_wait(int timeout);
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2004-05-24 01:06:12 +04:00
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extern int ram_size;
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extern int bios_size;
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2004-06-03 16:49:50 +04:00
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extern int rtc_utc;
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2004-06-05 17:46:47 +04:00
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extern int cirrus_vga_enabled;
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2004-06-21 20:46:35 +04:00
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extern int graphic_width;
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extern int graphic_height;
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extern int graphic_depth;
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2004-12-12 19:56:30 +03:00
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extern const char *keyboard_layout;
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2005-02-11 01:00:06 +03:00
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extern int kqemu_allowed;
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2005-04-30 20:10:35 +04:00
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extern int win2k_install_hack;
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2005-11-05 17:22:28 +03:00
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extern int usb_enabled;
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2005-11-22 02:25:50 +03:00
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extern int smp_cpus;
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2004-05-24 01:06:12 +04:00
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/* XXX: make it dynamic */
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2006-06-18 23:41:28 +04:00
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#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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2005-07-03 18:00:51 +04:00
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#define BIOS_SIZE ((512 + 32) * 1024)
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2005-07-02 18:58:51 +04:00
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#elif defined(TARGET_MIPS)
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#define BIOS_SIZE (128 * 1024)
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2004-05-24 01:06:12 +04:00
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#else
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2004-06-20 17:43:27 +04:00
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#define BIOS_SIZE ((256 + 64) * 1024)
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2004-05-24 01:06:12 +04:00
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#endif
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2004-04-27 00:56:53 +04:00
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2004-06-03 22:45:02 +04:00
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01
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#define MOUSE_EVENT_RBUTTON 0x02
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#define MOUSE_EVENT_MBUTTON 0x04
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typedef void QEMUPutKBDEvent(void *opaque, int keycode);
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
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2006-04-13 01:09:08 +04:00
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void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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2004-06-03 22:45:02 +04:00
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void kbd_put_keycode(int keycode);
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
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2006-04-13 01:09:08 +04:00
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int kbd_mouse_is_absolute(void);
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2004-06-03 22:45:02 +04:00
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2004-07-14 21:28:13 +04:00
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/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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constants) */
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#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
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#define QEMU_KEY_BACKSPACE 0x007f
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#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
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#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
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#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
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#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
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#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
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#define QEMU_KEY_END QEMU_KEY_ESC1(4)
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#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
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#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
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#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
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#define QEMU_KEY_CTRL_UP 0xe400
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#define QEMU_KEY_CTRL_DOWN 0xe401
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#define QEMU_KEY_CTRL_LEFT 0xe402
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#define QEMU_KEY_CTRL_RIGHT 0xe403
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#define QEMU_KEY_CTRL_HOME 0xe404
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#define QEMU_KEY_CTRL_END 0xe405
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#define QEMU_KEY_CTRL_PAGEUP 0xe406
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#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
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void kbd_put_keysym(int keysym);
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2004-04-22 03:27:19 +04:00
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
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typedef int IOCanRWHandler(void *opaque);
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2005-11-16 01:16:05 +03:00
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typedef void IOHandler(void *opaque);
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2004-04-22 03:27:19 +04:00
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2005-11-16 01:16:05 +03:00
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int qemu_set_fd_handler2(int fd,
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IOCanRWHandler *fd_read_poll,
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IOHandler *fd_read,
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IOHandler *fd_write,
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void *opaque);
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int qemu_set_fd_handler(int fd,
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IOHandler *fd_read,
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IOHandler *fd_write,
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void *opaque);
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2004-04-22 03:27:19 +04:00
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2006-04-13 00:21:17 +04:00
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/* Polling handling */
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/* return TRUE if no sleep should be done afterwards */
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typedef int PollingFunc(void *opaque);
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int qemu_add_polling_cb(PollingFunc *func, void *opaque);
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void qemu_del_polling_cb(PollingFunc *func, void *opaque);
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2006-06-25 21:18:27 +04:00
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#ifdef _WIN32
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/* Wait objects handling */
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typedef void WaitObjectFunc(void *opaque);
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int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
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void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
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#endif
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2004-07-14 21:28:13 +04:00
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */
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2004-08-02 01:59:26 +04:00
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
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2004-07-14 21:28:13 +04:00
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2005-11-11 02:58:33 +03:00
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#define CHR_IOCTL_SERIAL_SET_PARAMS 1
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typedef struct {
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int speed;
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int parity;
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int data_bits;
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int stop_bits;
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} QEMUSerialSetParams;
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#define CHR_IOCTL_SERIAL_SET_BREAK 2
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#define CHR_IOCTL_PP_READ_DATA 3
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#define CHR_IOCTL_PP_WRITE_DATA 4
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#define CHR_IOCTL_PP_READ_CONTROL 5
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#define CHR_IOCTL_PP_WRITE_CONTROL 6
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#define CHR_IOCTL_PP_READ_STATUS 7
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2004-07-14 21:28:13 +04:00
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typedef void IOEventHandler(void *opaque, int event);
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typedef struct CharDriverState {
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int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
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void (*chr_add_read_handler)(struct CharDriverState *s,
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IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read, void *opaque);
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2005-11-11 02:58:33 +03:00
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int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
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2004-07-14 21:28:13 +04:00
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IOEventHandler *chr_event;
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2004-09-18 23:33:09 +04:00
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void (*chr_send_event)(struct CharDriverState *chr, int event);
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2006-04-13 00:21:17 +04:00
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void (*chr_close)(struct CharDriverState *chr);
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2004-07-14 21:28:13 +04:00
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void *opaque;
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} CharDriverState;
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
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2004-08-02 01:59:26 +04:00
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void qemu_chr_send_event(CharDriverState *s, int event);
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2004-07-14 21:28:13 +04:00
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void qemu_chr_add_read_handler(CharDriverState *s,
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IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read, void *opaque);
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void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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2005-11-11 02:58:33 +03:00
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int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
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2005-11-09 01:30:36 +03:00
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2004-07-14 21:28:13 +04:00
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/* consoles */
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typedef struct DisplayState DisplayState;
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typedef struct TextConsole TextConsole;
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2006-04-09 05:06:34 +04:00
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typedef void (*vga_hw_update_ptr)(void *);
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typedef void (*vga_hw_invalidate_ptr)(void *);
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typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
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TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
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vga_hw_invalidate_ptr invalidate,
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vga_hw_screen_dump_ptr screen_dump,
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|
void *opaque);
|
|
|
|
void vga_hw_update(void);
|
|
|
|
void vga_hw_invalidate(void);
|
|
|
|
void vga_hw_screen_dump(const char *filename);
|
|
|
|
|
|
|
|
int is_graphic_console(void);
|
2004-07-14 21:28:13 +04:00
|
|
|
CharDriverState *text_console_init(DisplayState *ds);
|
|
|
|
void console_select(unsigned int index);
|
|
|
|
|
2004-08-25 01:13:40 +04:00
|
|
|
/* serial ports */
|
|
|
|
|
|
|
|
#define MAX_SERIAL_PORTS 4
|
|
|
|
|
|
|
|
extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
|
|
|
|
|
2005-01-15 15:02:56 +03:00
|
|
|
/* parallel ports */
|
|
|
|
|
|
|
|
#define MAX_PARALLEL_PORTS 3
|
|
|
|
|
|
|
|
extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
|
|
|
|
|
2005-11-16 01:16:05 +03:00
|
|
|
/* VLANs support */
|
|
|
|
|
|
|
|
typedef struct VLANClientState VLANClientState;
|
|
|
|
|
|
|
|
struct VLANClientState {
|
|
|
|
IOReadHandler *fd_read;
|
2006-02-05 01:15:28 +03:00
|
|
|
/* Packets may still be sent if this returns zero. It's used to
|
|
|
|
rate-limit the slirp code. */
|
|
|
|
IOCanRWHandler *fd_can_read;
|
2005-11-16 01:16:05 +03:00
|
|
|
void *opaque;
|
|
|
|
struct VLANClientState *next;
|
|
|
|
struct VLANState *vlan;
|
|
|
|
char info_str[256];
|
|
|
|
};
|
|
|
|
|
|
|
|
typedef struct VLANState {
|
|
|
|
int id;
|
|
|
|
VLANClientState *first_client;
|
|
|
|
struct VLANState *next;
|
|
|
|
} VLANState;
|
|
|
|
|
|
|
|
VLANState *qemu_find_vlan(int id);
|
|
|
|
VLANClientState *qemu_new_vlan_client(VLANState *vlan,
|
2006-02-05 01:15:28 +03:00
|
|
|
IOReadHandler *fd_read,
|
|
|
|
IOCanRWHandler *fd_can_read,
|
|
|
|
void *opaque);
|
|
|
|
int qemu_can_send_packet(VLANClientState *vc);
|
2005-11-16 01:16:05 +03:00
|
|
|
void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
|
2006-02-05 01:15:28 +03:00
|
|
|
void qemu_handler_true(void *opaque);
|
2005-11-16 01:16:05 +03:00
|
|
|
|
|
|
|
void do_info_network(void);
|
|
|
|
|
2006-02-02 02:06:55 +03:00
|
|
|
/* TAP win32 */
|
|
|
|
int tap_win32_init(VLANState *vlan, const char *ifname);
|
|
|
|
void tap_win32_poll(void);
|
|
|
|
|
2005-11-16 01:16:05 +03:00
|
|
|
/* NIC info */
|
2004-03-15 00:44:30 +03:00
|
|
|
|
|
|
|
#define MAX_NICS 8
|
|
|
|
|
2005-11-16 01:16:05 +03:00
|
|
|
typedef struct NICInfo {
|
2004-03-15 00:44:30 +03:00
|
|
|
uint8_t macaddr[6];
|
2006-02-05 07:14:41 +03:00
|
|
|
const char *model;
|
2005-11-16 01:16:05 +03:00
|
|
|
VLANState *vlan;
|
|
|
|
} NICInfo;
|
2004-03-15 00:44:30 +03:00
|
|
|
|
|
|
|
extern int nb_nics;
|
2005-11-16 01:16:05 +03:00
|
|
|
extern NICInfo nd_table[MAX_NICS];
|
2004-03-31 23:00:16 +04:00
|
|
|
|
|
|
|
/* timers */
|
|
|
|
|
|
|
|
typedef struct QEMUClock QEMUClock;
|
|
|
|
typedef struct QEMUTimer QEMUTimer;
|
|
|
|
typedef void QEMUTimerCB(void *opaque);
|
|
|
|
|
|
|
|
/* The real time clock should be used only for stuff which does not
|
|
|
|
change the virtual machine state, as it is run even if the virtual
|
2004-05-19 03:05:28 +04:00
|
|
|
machine is stopped. The real time clock has a frequency of 1000
|
2004-03-31 23:00:16 +04:00
|
|
|
Hz. */
|
|
|
|
extern QEMUClock *rt_clock;
|
|
|
|
|
2004-12-20 02:18:01 +03:00
|
|
|
/* The virtual clock is only run during the emulation. It is stopped
|
2004-03-31 23:00:16 +04:00
|
|
|
when the virtual machine is stopped. Virtual timers use a high
|
|
|
|
precision clock, usually cpu cycles (use ticks_per_sec). */
|
|
|
|
extern QEMUClock *vm_clock;
|
|
|
|
|
|
|
|
int64_t qemu_get_clock(QEMUClock *clock);
|
|
|
|
|
|
|
|
QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
|
|
|
|
void qemu_free_timer(QEMUTimer *ts);
|
|
|
|
void qemu_del_timer(QEMUTimer *ts);
|
|
|
|
void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
|
|
|
|
int qemu_timer_pending(QEMUTimer *ts);
|
|
|
|
|
|
|
|
extern int64_t ticks_per_sec;
|
|
|
|
extern int pit_min_timer_count;
|
|
|
|
|
2006-07-14 03:20:22 +04:00
|
|
|
int64_t cpu_get_ticks(void);
|
2004-03-31 23:00:16 +04:00
|
|
|
void cpu_enable_ticks(void);
|
|
|
|
void cpu_disable_ticks(void);
|
|
|
|
|
|
|
|
/* VM Load/Save */
|
|
|
|
|
|
|
|
typedef FILE QEMUFile;
|
|
|
|
|
|
|
|
void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
|
|
|
|
void qemu_put_byte(QEMUFile *f, int v);
|
|
|
|
void qemu_put_be16(QEMUFile *f, unsigned int v);
|
|
|
|
void qemu_put_be32(QEMUFile *f, unsigned int v);
|
|
|
|
void qemu_put_be64(QEMUFile *f, uint64_t v);
|
|
|
|
int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
|
|
|
|
int qemu_get_byte(QEMUFile *f);
|
|
|
|
unsigned int qemu_get_be16(QEMUFile *f);
|
|
|
|
unsigned int qemu_get_be32(QEMUFile *f);
|
|
|
|
uint64_t qemu_get_be64(QEMUFile *f);
|
|
|
|
|
|
|
|
static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
|
|
|
|
{
|
|
|
|
qemu_put_be64(f, *pv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
|
|
|
|
{
|
|
|
|
qemu_put_be32(f, *pv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
|
|
|
|
{
|
|
|
|
qemu_put_be16(f, *pv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
|
|
|
|
{
|
|
|
|
qemu_put_byte(f, *pv);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
|
|
|
|
{
|
|
|
|
*pv = qemu_get_be64(f);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
|
|
|
|
{
|
|
|
|
*pv = qemu_get_be32(f);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
|
|
|
|
{
|
|
|
|
*pv = qemu_get_be16(f);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
|
|
|
|
{
|
|
|
|
*pv = qemu_get_byte(f);
|
|
|
|
}
|
|
|
|
|
2005-01-04 02:35:10 +03:00
|
|
|
#if TARGET_LONG_BITS == 64
|
|
|
|
#define qemu_put_betl qemu_put_be64
|
|
|
|
#define qemu_get_betl qemu_get_be64
|
|
|
|
#define qemu_put_betls qemu_put_be64s
|
|
|
|
#define qemu_get_betls qemu_get_be64s
|
|
|
|
#else
|
|
|
|
#define qemu_put_betl qemu_put_be32
|
|
|
|
#define qemu_get_betl qemu_get_be32
|
|
|
|
#define qemu_put_betls qemu_put_be32s
|
|
|
|
#define qemu_get_betls qemu_get_be32s
|
|
|
|
#endif
|
|
|
|
|
2004-03-31 23:00:16 +04:00
|
|
|
int64_t qemu_ftell(QEMUFile *f);
|
|
|
|
int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
|
|
|
|
|
|
|
typedef void SaveStateHandler(QEMUFile *f, void *opaque);
|
|
|
|
typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
|
|
|
|
|
|
|
|
int qemu_loadvm(const char *filename);
|
|
|
|
int qemu_savevm(const char *filename);
|
|
|
|
int register_savevm(const char *idstr,
|
|
|
|
int instance_id,
|
|
|
|
int version_id,
|
|
|
|
SaveStateHandler *save_state,
|
|
|
|
LoadStateHandler *load_state,
|
|
|
|
void *opaque);
|
|
|
|
void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
|
|
|
void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
2004-03-15 00:44:30 +03:00
|
|
|
|
2005-11-22 02:25:50 +03:00
|
|
|
void cpu_save(QEMUFile *f, void *opaque);
|
|
|
|
int cpu_load(QEMUFile *f, void *opaque, int version_id);
|
|
|
|
|
2006-08-01 20:21:11 +04:00
|
|
|
/* bottom halves */
|
|
|
|
typedef struct QEMUBH QEMUBH;
|
|
|
|
typedef void QEMUBHFunc(void *opaque);
|
|
|
|
|
|
|
|
QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
|
|
|
|
void qemu_bh_schedule(QEMUBH *bh);
|
|
|
|
void qemu_bh_cancel(QEMUBH *bh);
|
|
|
|
void qemu_bh_delete(QEMUBH *bh);
|
|
|
|
void qemu_bh_poll(void);
|
|
|
|
|
2003-06-30 14:03:06 +04:00
|
|
|
/* block.c */
|
|
|
|
typedef struct BlockDriverState BlockDriverState;
|
2004-08-02 01:59:26 +04:00
|
|
|
typedef struct BlockDriver BlockDriver;
|
|
|
|
|
|
|
|
extern BlockDriver bdrv_raw;
|
|
|
|
extern BlockDriver bdrv_cow;
|
|
|
|
extern BlockDriver bdrv_qcow;
|
|
|
|
extern BlockDriver bdrv_vmdk;
|
2004-09-30 01:29:14 +04:00
|
|
|
extern BlockDriver bdrv_cloop;
|
2004-12-12 14:24:44 +03:00
|
|
|
extern BlockDriver bdrv_dmg;
|
2005-04-27 01:34:00 +04:00
|
|
|
extern BlockDriver bdrv_bochs;
|
2005-04-28 00:17:58 +04:00
|
|
|
extern BlockDriver bdrv_vpc;
|
2005-04-29 01:15:08 +04:00
|
|
|
extern BlockDriver bdrv_vvfat;
|
2004-08-02 01:59:26 +04:00
|
|
|
|
2006-08-01 20:21:11 +04:00
|
|
|
#define BDRV_O_RDONLY 0x0000
|
|
|
|
#define BDRV_O_RDWR 0x0002
|
|
|
|
#define BDRV_O_ACCESS 0x0003
|
|
|
|
#define BDRV_O_CREAT 0x0004 /* create an empty file */
|
|
|
|
#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
|
|
|
|
#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
|
|
|
|
use a disk image format on top of
|
|
|
|
it (default for
|
|
|
|
bdrv_file_open()) */
|
|
|
|
|
2004-08-02 01:59:26 +04:00
|
|
|
void bdrv_init(void);
|
|
|
|
BlockDriver *bdrv_find_format(const char *format_name);
|
|
|
|
int bdrv_create(BlockDriver *drv,
|
|
|
|
const char *filename, int64_t size_in_sectors,
|
|
|
|
const char *backing_file, int flags);
|
2004-03-15 00:44:30 +03:00
|
|
|
BlockDriverState *bdrv_new(const char *device_name);
|
|
|
|
void bdrv_delete(BlockDriverState *bs);
|
2006-08-01 20:21:11 +04:00
|
|
|
int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
|
|
|
|
int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
|
|
|
|
int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
|
2004-08-02 01:59:26 +04:00
|
|
|
BlockDriver *drv);
|
2003-06-30 14:03:06 +04:00
|
|
|
void bdrv_close(BlockDriverState *bs);
|
|
|
|
int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
|
|
|
uint8_t *buf, int nb_sectors);
|
|
|
|
int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
|
|
|
const uint8_t *buf, int nb_sectors);
|
2006-08-01 20:21:11 +04:00
|
|
|
int bdrv_pread(BlockDriverState *bs, int64_t offset,
|
|
|
|
void *buf, int count);
|
|
|
|
int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
|
|
|
|
const void *buf, int count);
|
|
|
|
int bdrv_truncate(BlockDriverState *bs, int64_t offset);
|
|
|
|
int64_t bdrv_getlength(BlockDriverState *bs);
|
2003-06-30 14:03:06 +04:00
|
|
|
void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
2003-07-06 21:15:21 +04:00
|
|
|
int bdrv_commit(BlockDriverState *bs);
|
2004-02-17 01:05:46 +03:00
|
|
|
void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
|
2006-08-01 20:21:11 +04:00
|
|
|
/* async block I/O */
|
|
|
|
typedef struct BlockDriverAIOCB BlockDriverAIOCB;
|
|
|
|
typedef void BlockDriverCompletionFunc(void *opaque, int ret);
|
|
|
|
|
|
|
|
BlockDriverAIOCB *bdrv_aio_new(BlockDriverState *bs);
|
|
|
|
int bdrv_aio_read(BlockDriverAIOCB *acb, int64_t sector_num,
|
|
|
|
uint8_t *buf, int nb_sectors,
|
|
|
|
BlockDriverCompletionFunc *cb, void *opaque);
|
|
|
|
int bdrv_aio_write(BlockDriverAIOCB *acb, int64_t sector_num,
|
|
|
|
const uint8_t *buf, int nb_sectors,
|
|
|
|
BlockDriverCompletionFunc *cb, void *opaque);
|
|
|
|
void bdrv_aio_cancel(BlockDriverAIOCB *acb);
|
|
|
|
void bdrv_aio_delete(BlockDriverAIOCB *acb);
|
|
|
|
|
|
|
|
void qemu_aio_init(void);
|
|
|
|
void qemu_aio_poll(void);
|
|
|
|
void qemu_aio_wait_start(void);
|
|
|
|
void qemu_aio_wait(void);
|
|
|
|
void qemu_aio_wait_end(void);
|
|
|
|
|
2006-06-04 15:39:07 +04:00
|
|
|
/* Ensure contents are flushed to disk. */
|
|
|
|
void bdrv_flush(BlockDriverState *bs);
|
2003-07-06 21:15:21 +04:00
|
|
|
|
2004-03-15 00:44:30 +03:00
|
|
|
#define BDRV_TYPE_HD 0
|
|
|
|
#define BDRV_TYPE_CDROM 1
|
|
|
|
#define BDRV_TYPE_FLOPPY 2
|
2004-11-16 04:45:27 +03:00
|
|
|
#define BIOS_ATA_TRANSLATION_AUTO 0
|
|
|
|
#define BIOS_ATA_TRANSLATION_NONE 1
|
|
|
|
#define BIOS_ATA_TRANSLATION_LBA 2
|
2004-03-15 00:44:30 +03:00
|
|
|
|
|
|
|
void bdrv_set_geometry_hint(BlockDriverState *bs,
|
|
|
|
int cyls, int heads, int secs);
|
|
|
|
void bdrv_set_type_hint(BlockDriverState *bs, int type);
|
2004-11-16 04:45:27 +03:00
|
|
|
void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
|
2004-03-15 00:44:30 +03:00
|
|
|
void bdrv_get_geometry_hint(BlockDriverState *bs,
|
|
|
|
int *pcyls, int *pheads, int *psecs);
|
|
|
|
int bdrv_get_type_hint(BlockDriverState *bs);
|
2004-11-16 04:45:27 +03:00
|
|
|
int bdrv_get_translation_hint(BlockDriverState *bs);
|
2004-03-15 00:44:30 +03:00
|
|
|
int bdrv_is_removable(BlockDriverState *bs);
|
|
|
|
int bdrv_is_read_only(BlockDriverState *bs);
|
|
|
|
int bdrv_is_inserted(BlockDriverState *bs);
|
|
|
|
int bdrv_is_locked(BlockDriverState *bs);
|
|
|
|
void bdrv_set_locked(BlockDriverState *bs, int locked);
|
|
|
|
void bdrv_set_change_cb(BlockDriverState *bs,
|
|
|
|
void (*change_cb)(void *opaque), void *opaque);
|
2004-08-02 01:59:26 +04:00
|
|
|
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
|
2004-03-15 00:44:30 +03:00
|
|
|
void bdrv_info(void);
|
|
|
|
BlockDriverState *bdrv_find(const char *name);
|
2004-07-14 21:28:13 +04:00
|
|
|
void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
|
2004-08-02 01:59:26 +04:00
|
|
|
int bdrv_is_encrypted(BlockDriverState *bs);
|
|
|
|
int bdrv_set_key(BlockDriverState *bs, const char *key);
|
|
|
|
void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
|
|
|
|
void *opaque);
|
|
|
|
const char *bdrv_get_device_name(BlockDriverState *bs);
|
2004-03-15 00:44:30 +03:00
|
|
|
|
2004-08-02 01:59:26 +04:00
|
|
|
int qcow_get_cluster_size(BlockDriverState *bs);
|
|
|
|
int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
|
|
|
|
const uint8_t *buf);
|
2006-08-01 20:21:11 +04:00
|
|
|
void bdrv_get_backing_filename(BlockDriverState *bs,
|
|
|
|
char *filename, int filename_size);
|
|
|
|
|
|
|
|
int path_is_absolute(const char *path);
|
|
|
|
void path_combine(char *dest, int dest_size,
|
|
|
|
const char *base_path,
|
|
|
|
const char *filename);
|
2004-08-02 01:59:26 +04:00
|
|
|
|
|
|
|
#ifndef QEMU_TOOL
|
2005-06-05 18:50:39 +04:00
|
|
|
|
|
|
|
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
|
|
|
|
int boot_device,
|
|
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename);
|
|
|
|
|
|
|
|
typedef struct QEMUMachine {
|
|
|
|
const char *name;
|
|
|
|
const char *desc;
|
|
|
|
QEMUMachineInitFunc *init;
|
|
|
|
struct QEMUMachine *next;
|
|
|
|
} QEMUMachine;
|
|
|
|
|
|
|
|
int qemu_register_machine(QEMUMachine *m);
|
|
|
|
|
|
|
|
typedef void SetIRQFunc(void *opaque, int irq_num, int level);
|
2005-07-02 22:11:44 +04:00
|
|
|
typedef void IRQRequestFunc(void *opaque, int level);
|
2005-06-05 18:50:39 +04:00
|
|
|
|
2004-04-29 02:26:05 +04:00
|
|
|
/* ISA bus */
|
|
|
|
|
|
|
|
extern target_phys_addr_t isa_mem_base;
|
|
|
|
|
|
|
|
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
|
|
|
|
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
|
|
|
|
|
|
|
|
int register_ioport_read(int start, int length, int size,
|
|
|
|
IOPortReadFunc *func, void *opaque);
|
|
|
|
int register_ioport_write(int start, int length, int size,
|
|
|
|
IOPortWriteFunc *func, void *opaque);
|
2004-05-19 03:05:28 +04:00
|
|
|
void isa_unassign_ioport(int start, int length);
|
|
|
|
|
|
|
|
/* PCI bus */
|
|
|
|
|
|
|
|
extern target_phys_addr_t pci_mem_base;
|
|
|
|
|
2004-06-21 23:43:00 +04:00
|
|
|
typedef struct PCIBus PCIBus;
|
2004-05-19 03:05:28 +04:00
|
|
|
typedef struct PCIDevice PCIDevice;
|
|
|
|
|
|
|
|
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
|
|
|
|
uint32_t address, uint32_t data, int len);
|
|
|
|
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
|
|
|
uint32_t address, int len);
|
|
|
|
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
|
|
|
|
uint32_t addr, uint32_t size, int type);
|
|
|
|
|
|
|
|
#define PCI_ADDRESS_SPACE_MEM 0x00
|
|
|
|
#define PCI_ADDRESS_SPACE_IO 0x01
|
|
|
|
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
|
|
|
|
|
|
|
|
typedef struct PCIIORegion {
|
2004-05-20 16:47:45 +04:00
|
|
|
uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
2004-05-19 03:05:28 +04:00
|
|
|
uint32_t size;
|
|
|
|
uint8_t type;
|
|
|
|
PCIMapIORegionFunc *map_func;
|
|
|
|
} PCIIORegion;
|
|
|
|
|
2004-06-03 18:06:32 +04:00
|
|
|
#define PCI_ROM_SLOT 6
|
|
|
|
#define PCI_NUM_REGIONS 7
|
2006-05-13 20:11:23 +04:00
|
|
|
|
|
|
|
#define PCI_DEVICES_MAX 64
|
|
|
|
|
|
|
|
#define PCI_VENDOR_ID 0x00 /* 16 bits */
|
|
|
|
#define PCI_DEVICE_ID 0x02 /* 16 bits */
|
|
|
|
#define PCI_COMMAND 0x04 /* 16 bits */
|
|
|
|
#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
|
|
|
|
#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
|
|
|
|
#define PCI_CLASS_DEVICE 0x0a /* Device class */
|
|
|
|
#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
|
|
|
|
#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
|
|
|
|
#define PCI_MIN_GNT 0x3e /* 8 bits */
|
|
|
|
#define PCI_MAX_LAT 0x3f /* 8 bits */
|
|
|
|
|
2004-05-19 03:05:28 +04:00
|
|
|
struct PCIDevice {
|
|
|
|
/* PCI config space */
|
|
|
|
uint8_t config[256];
|
|
|
|
|
|
|
|
/* the following fields are read only */
|
2004-06-21 23:43:00 +04:00
|
|
|
PCIBus *bus;
|
2004-05-19 03:05:28 +04:00
|
|
|
int devfn;
|
|
|
|
char name[64];
|
2004-06-03 18:06:32 +04:00
|
|
|
PCIIORegion io_regions[PCI_NUM_REGIONS];
|
2004-05-19 03:05:28 +04:00
|
|
|
|
|
|
|
/* do not access the following fields */
|
|
|
|
PCIConfigReadFunc *config_read;
|
|
|
|
PCIConfigWriteFunc *config_write;
|
2006-05-13 20:11:23 +04:00
|
|
|
/* ??? This is a PC-specific hack, and should be removed. */
|
2004-05-20 16:47:45 +04:00
|
|
|
int irq_index;
|
2004-05-19 03:05:28 +04:00
|
|
|
};
|
|
|
|
|
2004-06-21 23:43:00 +04:00
|
|
|
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
|
|
|
|
int instance_size, int devfn,
|
2004-05-19 03:05:28 +04:00
|
|
|
PCIConfigReadFunc *config_read,
|
|
|
|
PCIConfigWriteFunc *config_write);
|
|
|
|
|
|
|
|
void pci_register_io_region(PCIDevice *pci_dev, int region_num,
|
|
|
|
uint32_t size, int type,
|
|
|
|
PCIMapIORegionFunc *map_func);
|
|
|
|
|
2004-05-20 16:47:45 +04:00
|
|
|
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
|
|
|
|
|
|
|
|
uint32_t pci_default_read_config(PCIDevice *d,
|
|
|
|
uint32_t address, int len);
|
|
|
|
void pci_default_write_config(PCIDevice *d,
|
|
|
|
uint32_t address, uint32_t val, int len);
|
2004-10-03 17:56:00 +04:00
|
|
|
void generic_pci_save(QEMUFile* f, void *opaque);
|
|
|
|
int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
|
2004-05-20 16:47:45 +04:00
|
|
|
|
2006-05-13 20:11:23 +04:00
|
|
|
typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic,
|
|
|
|
int irq_num, int level);
|
|
|
|
PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min);
|
|
|
|
|
|
|
|
void pci_nic_init(PCIBus *bus, NICInfo *nd);
|
|
|
|
void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
|
|
|
|
uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
|
|
|
|
int pci_bus_num(PCIBus *s);
|
|
|
|
void pci_for_each_device(void (*fn)(PCIDevice *d));
|
2004-05-23 23:09:22 +04:00
|
|
|
|
2004-05-20 16:47:45 +04:00
|
|
|
void pci_info(void);
|
2004-04-29 02:26:05 +04:00
|
|
|
|
2006-05-13 20:11:23 +04:00
|
|
|
/* prep_pci.c */
|
2004-06-21 23:43:00 +04:00
|
|
|
PCIBus *pci_prep_init(void);
|
2004-05-27 02:13:53 +04:00
|
|
|
|
2006-05-13 20:11:23 +04:00
|
|
|
/* grackle_pci.c */
|
|
|
|
PCIBus *pci_grackle_init(uint32_t base, void *pic);
|
|
|
|
|
|
|
|
/* unin_pci.c */
|
|
|
|
PCIBus *pci_pmac_init(void *pic);
|
|
|
|
|
|
|
|
/* apb_pci.c */
|
|
|
|
PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
|
|
|
|
void *pic);
|
|
|
|
|
|
|
|
PCIBus *pci_vpb_init(void *pic);
|
|
|
|
|
|
|
|
/* piix_pci.c */
|
|
|
|
PCIBus *i440fx_init(void);
|
|
|
|
int piix3_init(PCIBus *bus);
|
|
|
|
void pci_bios_init(void);
|
2006-02-05 07:14:41 +03:00
|
|
|
|
2004-06-21 20:46:35 +04:00
|
|
|
/* openpic.c */
|
|
|
|
typedef struct openpic_t openpic_t;
|
2005-06-05 18:50:39 +04:00
|
|
|
void openpic_set_irq(void *opaque, int n_IRQ, int level);
|
2005-11-24 00:13:45 +03:00
|
|
|
openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
|
|
|
|
CPUState **envp);
|
2004-06-21 20:46:35 +04:00
|
|
|
|
2005-06-05 18:50:39 +04:00
|
|
|
/* heathrow_pic.c */
|
|
|
|
typedef struct HeathrowPICS HeathrowPICS;
|
|
|
|
void heathrow_pic_set_irq(void *opaque, int num, int level);
|
|
|
|
HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
|
|
|
|
2005-12-18 23:34:32 +03:00
|
|
|
#ifdef HAS_AUDIO
|
|
|
|
struct soundhw {
|
|
|
|
const char *name;
|
|
|
|
const char *descr;
|
|
|
|
int enabled;
|
|
|
|
int isa;
|
|
|
|
union {
|
|
|
|
int (*init_isa) (AudioState *s);
|
|
|
|
int (*init_pci) (PCIBus *bus, AudioState *s);
|
|
|
|
} init;
|
|
|
|
};
|
|
|
|
|
|
|
|
extern struct soundhw soundhw[];
|
|
|
|
#endif
|
|
|
|
|
2003-08-11 01:52:11 +04:00
|
|
|
/* vga.c */
|
|
|
|
|
2006-06-13 19:57:21 +04:00
|
|
|
#define VGA_RAM_SIZE (8192 * 1024)
|
2003-08-11 01:52:11 +04:00
|
|
|
|
2004-07-14 21:28:13 +04:00
|
|
|
struct DisplayState {
|
2003-08-11 01:52:11 +04:00
|
|
|
uint8_t *data;
|
|
|
|
int linesize;
|
|
|
|
int depth;
|
2006-05-11 02:17:36 +04:00
|
|
|
int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
|
2004-07-14 21:28:13 +04:00
|
|
|
int width;
|
|
|
|
int height;
|
2006-05-01 01:28:36 +04:00
|
|
|
void *opaque;
|
|
|
|
|
2003-08-11 01:52:11 +04:00
|
|
|
void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
|
|
|
|
void (*dpy_resize)(struct DisplayState *s, int w, int h);
|
|
|
|
void (*dpy_refresh)(struct DisplayState *s);
|
2006-05-01 01:28:36 +04:00
|
|
|
void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
|
2004-07-14 21:28:13 +04:00
|
|
|
};
|
2003-08-11 01:52:11 +04:00
|
|
|
|
|
|
|
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
|
|
|
|
{
|
|
|
|
s->dpy_update(s, x, y, w, h);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dpy_resize(DisplayState *s, int w, int h)
|
|
|
|
{
|
|
|
|
s->dpy_resize(s, w, h);
|
|
|
|
}
|
|
|
|
|
2004-06-21 23:43:00 +04:00
|
|
|
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
2005-07-03 18:00:51 +04:00
|
|
|
unsigned long vga_ram_offset, int vga_ram_size,
|
|
|
|
unsigned long vga_bios_offset, int vga_bios_size);
|
2003-08-11 01:52:11 +04:00
|
|
|
|
2004-06-05 14:32:30 +04:00
|
|
|
/* cirrus_vga.c */
|
2004-06-21 23:43:00 +04:00
|
|
|
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
2004-06-05 14:32:30 +04:00
|
|
|
unsigned long vga_ram_offset, int vga_ram_size);
|
|
|
|
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
|
|
|
unsigned long vga_ram_offset, int vga_ram_size);
|
|
|
|
|
2003-08-11 01:52:11 +04:00
|
|
|
/* sdl.c */
|
2004-10-03 17:29:03 +04:00
|
|
|
void sdl_display_init(DisplayState *ds, int full_screen);
|
2003-08-11 01:52:11 +04:00
|
|
|
|
2005-03-03 01:22:43 +03:00
|
|
|
/* cocoa.m */
|
|
|
|
void cocoa_display_init(DisplayState *ds, int full_screen);
|
|
|
|
|
2006-05-01 01:28:36 +04:00
|
|
|
/* vnc.c */
|
|
|
|
void vnc_display_init(DisplayState *ds, int display);
|
|
|
|
|
2003-11-11 16:48:59 +03:00
|
|
|
/* ide.c */
|
|
|
|
#define MAX_DISKS 4
|
|
|
|
|
|
|
|
extern BlockDriverState *bs_table[MAX_DISKS];
|
|
|
|
|
2004-05-19 03:05:28 +04:00
|
|
|
void isa_ide_init(int iobase, int iobase2, int irq,
|
|
|
|
BlockDriverState *hd0, BlockDriverState *hd1);
|
2005-06-05 18:50:39 +04:00
|
|
|
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
|
|
|
int secondary_ide_enabled);
|
2006-05-13 20:11:23 +04:00
|
|
|
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
|
2004-06-21 20:46:35 +04:00
|
|
|
int pmac_ide_init (BlockDriverState **hd_table,
|
2005-06-05 18:50:39 +04:00
|
|
|
SetIRQFunc *set_irq, void *irq_opaque, int irq);
|
2003-11-11 16:48:59 +03:00
|
|
|
|
2006-05-26 03:58:51 +04:00
|
|
|
/* cdrom.c */
|
|
|
|
int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
|
|
|
|
int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
|
|
|
|
|
2005-10-30 21:58:22 +03:00
|
|
|
/* es1370.c */
|
2005-11-05 21:55:28 +03:00
|
|
|
int es1370_init (PCIBus *bus, AudioState *s);
|
2005-10-30 21:58:22 +03:00
|
|
|
|
2004-11-10 02:09:44 +03:00
|
|
|
/* sb16.c */
|
2005-11-05 21:55:28 +03:00
|
|
|
int SB16_init (AudioState *s);
|
2004-11-10 02:09:44 +03:00
|
|
|
|
|
|
|
/* adlib.c */
|
2005-11-05 21:55:28 +03:00
|
|
|
int Adlib_init (AudioState *s);
|
2004-11-10 02:09:44 +03:00
|
|
|
|
|
|
|
/* gus.c */
|
2005-11-05 21:55:28 +03:00
|
|
|
int GUS_init (AudioState *s);
|
2003-11-13 04:46:15 +03:00
|
|
|
|
|
|
|
/* dma.c */
|
2004-11-07 21:04:02 +03:00
|
|
|
typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
|
2003-11-13 04:46:15 +03:00
|
|
|
int DMA_get_channel_mode (int nchan);
|
2004-11-07 21:04:02 +03:00
|
|
|
int DMA_read_memory (int nchan, void *buf, int pos, int size);
|
|
|
|
int DMA_write_memory (int nchan, void *buf, int pos, int size);
|
2003-11-13 04:46:15 +03:00
|
|
|
void DMA_hold_DREQ (int nchan);
|
|
|
|
void DMA_release_DREQ (int nchan);
|
2004-02-26 02:25:55 +03:00
|
|
|
void DMA_schedule(int nchan);
|
2003-11-13 04:46:15 +03:00
|
|
|
void DMA_run (void);
|
2004-06-21 20:46:35 +04:00
|
|
|
void DMA_init (int high_page_enable);
|
2003-11-13 04:46:15 +03:00
|
|
|
void DMA_register_channel (int nchan,
|
2004-11-07 21:04:02 +03:00
|
|
|
DMA_transfer_handler transfer_handler,
|
|
|
|
void *opaque);
|
2004-01-05 03:02:28 +03:00
|
|
|
/* fdc.c */
|
|
|
|
#define MAX_FD 2
|
|
|
|
extern BlockDriverState *fd_table[MAX_FD];
|
|
|
|
|
2004-03-20 02:05:34 +03:00
|
|
|
typedef struct fdctrl_t fdctrl_t;
|
|
|
|
|
|
|
|
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
|
|
|
|
uint32_t io_base,
|
|
|
|
BlockDriverState **fds);
|
|
|
|
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
|
2004-01-05 03:02:28 +03:00
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* ne2000.c */
|
|
|
|
|
2005-11-16 01:16:05 +03:00
|
|
|
void isa_ne2000_init(int base, int irq, NICInfo *nd);
|
|
|
|
void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2006-02-05 07:14:41 +03:00
|
|
|
/* rtl8139.c */
|
|
|
|
|
|
|
|
void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
|
|
|
|
|
2006-07-04 15:33:00 +04:00
|
|
|
/* pcnet.c */
|
|
|
|
|
|
|
|
void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
|
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* pckbd.c */
|
|
|
|
|
|
|
|
void kbd_init(void);
|
|
|
|
|
|
|
|
/* mc146818rtc.c */
|
|
|
|
|
2004-03-31 23:00:16 +04:00
|
|
|
typedef struct RTCState RTCState;
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2004-03-31 23:00:16 +04:00
|
|
|
RTCState *rtc_init(int base, int irq);
|
|
|
|
void rtc_set_memory(RTCState *s, int addr, int val);
|
|
|
|
void rtc_set_date(RTCState *s, const struct tm *tm);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* serial.c */
|
|
|
|
|
2004-03-15 00:44:30 +03:00
|
|
|
typedef struct SerialState SerialState;
|
2005-11-24 00:11:49 +03:00
|
|
|
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
|
|
|
|
int base, int irq, CharDriverState *chr);
|
|
|
|
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
|
|
|
|
target_ulong base, int it_shift,
|
|
|
|
int irq, CharDriverState *chr);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2005-01-15 15:02:56 +03:00
|
|
|
/* parallel.c */
|
|
|
|
|
|
|
|
typedef struct ParallelState ParallelState;
|
|
|
|
ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
|
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* i8259.c */
|
|
|
|
|
2005-07-02 22:11:44 +04:00
|
|
|
typedef struct PicState2 PicState2;
|
|
|
|
extern PicState2 *isa_pic;
|
2004-03-14 15:20:30 +03:00
|
|
|
void pic_set_irq(int irq, int level);
|
2005-06-05 18:50:39 +04:00
|
|
|
void pic_set_irq_new(void *opaque, int irq, int level);
|
2005-07-02 22:11:44 +04:00
|
|
|
PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
2005-07-23 23:05:37 +04:00
|
|
|
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
|
|
|
void *alt_irq_opaque);
|
2005-07-02 22:11:44 +04:00
|
|
|
int pic_read_irq(PicState2 *s);
|
|
|
|
void pic_update_irq(PicState2 *s);
|
|
|
|
uint32_t pic_intack_read(PicState2 *s);
|
2004-04-22 03:27:19 +04:00
|
|
|
void pic_info(void);
|
2004-05-21 15:39:07 +04:00
|
|
|
void irq_info(void);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2005-01-04 02:35:10 +03:00
|
|
|
/* APIC */
|
2005-07-23 23:05:37 +04:00
|
|
|
typedef struct IOAPICState IOAPICState;
|
|
|
|
|
2005-01-04 02:35:10 +03:00
|
|
|
int apic_init(CPUState *env);
|
|
|
|
int apic_get_interrupt(CPUState *env);
|
2005-07-23 23:05:37 +04:00
|
|
|
IOAPICState *ioapic_init(void);
|
|
|
|
void ioapic_set_irq(void *opaque, int vector, int level);
|
2005-01-04 02:35:10 +03:00
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* i8254.c */
|
|
|
|
|
|
|
|
#define PIT_FREQ 1193182
|
|
|
|
|
2004-05-04 03:18:25 +04:00
|
|
|
typedef struct PITState PITState;
|
|
|
|
|
|
|
|
PITState *pit_init(int base, int irq);
|
|
|
|
void pit_set_gate(PITState *pit, int channel, int val);
|
|
|
|
int pit_get_gate(PITState *pit, int channel);
|
2006-04-25 01:58:30 +04:00
|
|
|
int pit_get_initial_count(PITState *pit, int channel);
|
|
|
|
int pit_get_mode(PITState *pit, int channel);
|
2004-05-04 03:18:25 +04:00
|
|
|
int pit_get_out(PITState *pit, int channel, int64_t current_time);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2006-04-25 01:58:30 +04:00
|
|
|
/* pcspk.c */
|
|
|
|
void pcspk_init(PITState *);
|
|
|
|
int pcspk_audio_init(AudioState *);
|
|
|
|
|
2006-05-04 02:02:44 +04:00
|
|
|
/* acpi.c */
|
|
|
|
extern int acpi_enabled;
|
2006-05-13 20:11:23 +04:00
|
|
|
void piix4_pm_init(PCIBus *bus, int devfn);
|
2006-05-04 02:02:44 +04:00
|
|
|
void acpi_bios_init(void);
|
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* pc.c */
|
2005-06-05 18:50:39 +04:00
|
|
|
extern QEMUMachine pc_machine;
|
2005-11-06 21:20:37 +03:00
|
|
|
extern QEMUMachine isapc_machine;
|
2006-06-14 20:03:05 +04:00
|
|
|
extern int fd_bootchk;
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2005-11-22 02:25:50 +03:00
|
|
|
void ioport_set_a20(int enable);
|
|
|
|
int ioport_get_a20(void);
|
|
|
|
|
2004-04-29 02:26:05 +04:00
|
|
|
/* ppc.c */
|
2005-06-05 18:50:39 +04:00
|
|
|
extern QEMUMachine prep_machine;
|
|
|
|
extern QEMUMachine core99_machine;
|
|
|
|
extern QEMUMachine heathrow_machine;
|
|
|
|
|
2005-07-02 18:58:51 +04:00
|
|
|
/* mips_r4k.c */
|
|
|
|
extern QEMUMachine mips_machine;
|
|
|
|
|
2006-04-28 01:32:09 +04:00
|
|
|
/* shix.c */
|
|
|
|
extern QEMUMachine shix_machine;
|
|
|
|
|
2004-05-27 03:29:15 +04:00
|
|
|
#ifdef TARGET_PPC
|
|
|
|
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
|
|
|
|
#endif
|
2004-05-27 02:55:16 +04:00
|
|
|
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
|
2004-05-27 02:13:53 +04:00
|
|
|
|
|
|
|
extern CPUWriteMemoryFunc *PPC_io_write[];
|
|
|
|
extern CPUReadMemoryFunc *PPC_io_read[];
|
2005-06-05 18:50:39 +04:00
|
|
|
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
|
2004-04-29 02:26:05 +04:00
|
|
|
|
2004-10-01 02:22:08 +04:00
|
|
|
/* sun4m.c */
|
2005-06-05 18:50:39 +04:00
|
|
|
extern QEMUMachine sun4m_machine;
|
2004-12-20 02:18:01 +03:00
|
|
|
uint32_t iommu_translate(uint32_t addr);
|
2005-12-05 23:31:52 +03:00
|
|
|
void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
|
2004-10-01 02:22:08 +04:00
|
|
|
|
|
|
|
/* iommu.c */
|
2004-12-20 02:18:01 +03:00
|
|
|
void *iommu_init(uint32_t addr);
|
|
|
|
uint32_t iommu_translate_local(void *opaque, uint32_t addr);
|
2004-10-01 02:22:08 +04:00
|
|
|
|
|
|
|
/* lance.c */
|
2005-11-16 01:16:05 +03:00
|
|
|
void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
|
2004-10-01 02:22:08 +04:00
|
|
|
|
|
|
|
/* tcx.c */
|
2006-04-09 05:06:34 +04:00
|
|
|
void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
2005-03-13 12:43:36 +03:00
|
|
|
unsigned long vram_offset, int vram_size, int width, int height);
|
2004-12-20 02:18:01 +03:00
|
|
|
|
|
|
|
/* slavio_intctl.c */
|
|
|
|
void *slavio_intctl_init();
|
2005-12-05 23:31:52 +03:00
|
|
|
void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
|
2004-12-20 02:18:01 +03:00
|
|
|
void slavio_pic_info(void *opaque);
|
|
|
|
void slavio_irq_info(void *opaque);
|
|
|
|
void slavio_pic_set_irq(void *opaque, int irq, int level);
|
2005-12-05 23:31:52 +03:00
|
|
|
void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
|
2004-10-01 02:22:08 +04:00
|
|
|
|
2006-04-23 21:12:42 +04:00
|
|
|
/* loader.c */
|
|
|
|
int get_image_size(const char *filename);
|
|
|
|
int load_image(const char *filename, uint8_t *addr);
|
2006-04-27 02:05:26 +04:00
|
|
|
int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
|
2004-12-20 02:18:01 +03:00
|
|
|
int load_aout(const char *filename, uint8_t *addr);
|
|
|
|
|
|
|
|
/* slavio_timer.c */
|
2005-12-05 23:31:52 +03:00
|
|
|
void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
|
2004-10-05 01:23:09 +04:00
|
|
|
|
2004-12-20 02:18:01 +03:00
|
|
|
/* slavio_serial.c */
|
|
|
|
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
|
|
|
|
void slavio_serial_ms_kbd_init(int base, int irq);
|
2004-10-01 02:22:08 +04:00
|
|
|
|
2005-07-02 18:31:34 +04:00
|
|
|
/* slavio_misc.c */
|
|
|
|
void *slavio_misc_init(uint32_t base, int irq);
|
|
|
|
void slavio_set_power_fail(void *opaque, int power_failing);
|
|
|
|
|
2005-03-13 12:43:36 +03:00
|
|
|
/* esp.c */
|
|
|
|
void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
|
|
|
|
|
2005-07-02 18:31:34 +04:00
|
|
|
/* sun4u.c */
|
|
|
|
extern QEMUMachine sun4u_machine;
|
|
|
|
|
2004-05-27 02:55:16 +04:00
|
|
|
/* NVRAM helpers */
|
|
|
|
#include "hw/m48t59.h"
|
|
|
|
|
|
|
|
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
|
|
|
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
|
|
|
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
|
|
|
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
|
|
|
const unsigned char *str, uint32_t max);
|
|
|
|
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
|
|
|
|
void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
|
|
|
uint32_t start, uint32_t count);
|
|
|
|
int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
|
|
|
const unsigned char *arch,
|
|
|
|
uint32_t RAM_size, int boot_device,
|
|
|
|
uint32_t kernel_image, uint32_t kernel_size,
|
2004-06-21 20:46:35 +04:00
|
|
|
const char *cmdline,
|
2004-05-27 02:55:16 +04:00
|
|
|
uint32_t initrd_image, uint32_t initrd_size,
|
2004-06-21 20:46:35 +04:00
|
|
|
uint32_t NVRAM_image,
|
|
|
|
int width, int height, int depth);
|
2004-05-27 02:55:16 +04:00
|
|
|
|
2004-06-03 22:45:02 +04:00
|
|
|
/* adb.c */
|
|
|
|
|
|
|
|
#define MAX_ADB_DEVICES 16
|
|
|
|
|
2004-06-22 02:46:10 +04:00
|
|
|
#define ADB_MAX_OUT_LEN 16
|
2004-06-03 22:45:02 +04:00
|
|
|
|
2004-06-22 02:46:10 +04:00
|
|
|
typedef struct ADBDevice ADBDevice;
|
2004-06-03 22:45:02 +04:00
|
|
|
|
2004-06-22 02:46:10 +04:00
|
|
|
/* buf = NULL means polling */
|
|
|
|
typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
|
|
|
|
const uint8_t *buf, int len);
|
2004-07-13 00:26:20 +04:00
|
|
|
typedef int ADBDeviceReset(ADBDevice *d);
|
|
|
|
|
2004-06-03 22:45:02 +04:00
|
|
|
struct ADBDevice {
|
|
|
|
struct ADBBusState *bus;
|
|
|
|
int devaddr;
|
|
|
|
int handler;
|
2004-06-22 02:46:10 +04:00
|
|
|
ADBDeviceRequest *devreq;
|
2004-07-13 00:26:20 +04:00
|
|
|
ADBDeviceReset *devreset;
|
2004-06-03 22:45:02 +04:00
|
|
|
void *opaque;
|
|
|
|
};
|
|
|
|
|
|
|
|
typedef struct ADBBusState {
|
|
|
|
ADBDevice devices[MAX_ADB_DEVICES];
|
|
|
|
int nb_devices;
|
2004-06-22 02:46:10 +04:00
|
|
|
int poll_index;
|
2004-06-03 22:45:02 +04:00
|
|
|
} ADBBusState;
|
|
|
|
|
2004-06-22 02:46:10 +04:00
|
|
|
int adb_request(ADBBusState *s, uint8_t *buf_out,
|
|
|
|
const uint8_t *buf, int len);
|
|
|
|
int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
2004-06-03 22:45:02 +04:00
|
|
|
|
|
|
|
ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
2004-06-22 02:46:10 +04:00
|
|
|
ADBDeviceRequest *devreq,
|
2004-07-13 00:26:20 +04:00
|
|
|
ADBDeviceReset *devreset,
|
2004-06-03 22:45:02 +04:00
|
|
|
void *opaque);
|
|
|
|
void adb_kbd_init(ADBBusState *bus);
|
|
|
|
void adb_mouse_init(ADBBusState *bus);
|
|
|
|
|
|
|
|
/* cuda.c */
|
|
|
|
|
|
|
|
extern ADBBusState adb_bus;
|
2005-06-05 18:50:39 +04:00
|
|
|
int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
|
2004-06-03 22:45:02 +04:00
|
|
|
|
2005-11-05 17:22:28 +03:00
|
|
|
#include "hw/usb.h"
|
|
|
|
|
2005-11-06 19:13:29 +03:00
|
|
|
/* usb ports of the VM */
|
|
|
|
|
2006-05-21 20:30:15 +04:00
|
|
|
void qemu_register_usb_port(USBPort *port, void *opaque, int index,
|
|
|
|
usb_attachfn attach);
|
2005-11-06 19:13:29 +03:00
|
|
|
|
2006-05-21 20:30:15 +04:00
|
|
|
#define VM_USB_HUB_SIZE 8
|
2005-11-06 19:13:29 +03:00
|
|
|
|
|
|
|
void do_usb_add(const char *devname);
|
|
|
|
void do_usb_del(const char *devname);
|
|
|
|
void usb_info(void);
|
|
|
|
|
2006-05-26 03:58:51 +04:00
|
|
|
/* scsi-disk.c */
|
|
|
|
typedef struct SCSIDevice SCSIDevice;
|
|
|
|
typedef void (*scsi_completionfn)(void *, uint32_t, int);
|
|
|
|
|
|
|
|
SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
|
|
|
|
scsi_completionfn completion,
|
|
|
|
void *opaque);
|
|
|
|
void scsi_disk_destroy(SCSIDevice *s);
|
|
|
|
|
2006-05-27 01:53:41 +04:00
|
|
|
int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
|
2006-05-26 03:58:51 +04:00
|
|
|
int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
|
|
|
|
int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
|
|
|
|
|
2006-05-30 05:48:12 +04:00
|
|
|
/* lsi53c895a.c */
|
|
|
|
void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
|
|
|
|
void *lsi_scsi_init(PCIBus *bus, int devfn);
|
|
|
|
|
2005-11-26 13:38:39 +03:00
|
|
|
/* integratorcp.c */
|
2006-02-20 03:33:36 +03:00
|
|
|
extern QEMUMachine integratorcp926_machine;
|
|
|
|
extern QEMUMachine integratorcp1026_machine;
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2005-11-26 13:38:39 +03:00
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2006-04-09 05:32:52 +04:00
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/* versatilepb.c */
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extern QEMUMachine versatilepb_machine;
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2006-04-28 03:15:07 +04:00
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extern QEMUMachine versatileab_machine;
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2006-04-09 05:32:52 +04:00
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2005-11-26 13:14:03 +03:00
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/* ps2.c */
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void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
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void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
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void ps2_write_mouse(void *, int val);
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void ps2_write_keyboard(void *, int val);
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uint32_t ps2_read_data(void *);
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void ps2_queue(void *, int b);
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2006-02-08 07:42:17 +03:00
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void ps2_keyboard_set_translation(void *opaque, int mode);
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2005-11-26 13:14:03 +03:00
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2005-12-04 21:54:21 +03:00
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/* smc91c111.c */
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void smc91c111_init(NICInfo *, uint32_t, void *, int);
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2006-02-06 07:11:15 +03:00
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/* pl110.c */
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2006-04-09 05:06:34 +04:00
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void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
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2006-02-06 07:11:15 +03:00
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2006-04-09 05:32:52 +04:00
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/* pl011.c */
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void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
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/* pl050.c */
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void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
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/* pl080.c */
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void *pl080_init(uint32_t base, void *pic, int irq);
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/* pl190.c */
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void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
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/* arm-timer.c */
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void sp804_init(uint32_t base, void *pic, int irq);
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void icp_pit_init(uint32_t base, void *pic, int irq);
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2006-04-28 03:15:07 +04:00
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/* arm_boot.c */
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void arm_load_kernel(int ram_size, const char *kernel_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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int board_id);
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2006-04-28 01:32:09 +04:00
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/* sh7750.c */
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struct SH7750State;
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2006-04-28 02:32:36 +04:00
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struct SH7750State *sh7750_init(CPUState * cpu);
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2006-04-28 01:32:09 +04:00
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typedef struct {
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/* The callback will be triggered if any of the designated lines change */
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uint16_t portamask_trigger;
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uint16_t portbmask_trigger;
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/* Return 0 if no action was taken */
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int (*port_change_cb) (uint16_t porta, uint16_t portb,
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uint16_t * periph_pdtra,
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uint16_t * periph_portdira,
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uint16_t * periph_pdtrb,
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uint16_t * periph_portdirb);
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} sh7750_io_device;
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int sh7750_register_io_device(struct SH7750State *s,
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sh7750_io_device * device);
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/* tc58128.c */
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int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
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2006-06-26 02:28:15 +04:00
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/* NOR flash devices */
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typedef struct pflash_t pflash_t;
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pflash_t *pflash_register (target_ulong base, ram_addr_t off,
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BlockDriverState *bs,
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target_ulong sector_len, int nb_blocs, int width,
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uint16_t id0, uint16_t id1,
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uint16_t id2, uint16_t id3);
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2004-08-02 01:59:26 +04:00
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#endif /* defined(QEMU_TOOL) */
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2004-03-15 00:44:30 +03:00
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/* monitor.c */
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2004-07-14 21:28:13 +04:00
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void monitor_init(CharDriverState *hd, int show_banner);
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2004-08-02 01:59:26 +04:00
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void term_puts(const char *str);
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void term_vprintf(const char *fmt, va_list ap);
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2004-04-04 16:56:28 +04:00
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void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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2004-03-15 00:44:30 +03:00
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void term_flush(void);
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void term_print_help(void);
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2004-08-02 01:59:26 +04:00
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void monitor_readline(const char *prompt, int is_password,
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char *buf, int buf_size);
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/* readline.c */
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typedef void ReadLineFunc(void *opaque, const char *str);
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extern int completion_index;
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void add_completion(const char *str);
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void readline_handle_byte(int ch);
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void readline_find_completion(const char *cmdline);
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const char *readline_get_history(unsigned int index);
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void readline_start(const char *prompt, int is_password,
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ReadLineFunc *readline_func, void *opaque);
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2004-03-15 00:44:30 +03:00
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2005-08-21 13:30:40 +04:00
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void kqemu_record_dump(void);
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2003-06-30 14:03:06 +04:00
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#endif /* VL_H */
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