2007-04-05 10:58:33 +04:00
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/*
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2012-03-24 20:51:13 +04:00
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* Helpers for loads and stores
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2007-09-17 01:08:06 +04:00
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*
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2007-04-05 10:58:33 +04:00
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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2009-07-17 00:47:01 +04:00
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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2007-04-05 10:58:33 +04:00
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*/
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2016-01-26 21:17:04 +03:00
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#include "qemu/osdep.h"
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2011-07-13 16:44:15 +04:00
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#include "cpu.h"
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2014-04-08 09:31:41 +04:00
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#include "exec/helper-proto.h"
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2016-03-15 15:18:37 +03:00
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#include "exec/exec-all.h"
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2014-03-28 22:42:10 +04:00
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#include "exec/cpu_ldst.h"
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2007-04-05 10:58:33 +04:00
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/* Softmmu support */
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2012-03-24 20:51:13 +04:00
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#ifndef CONFIG_USER_ONLY
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2013-11-15 17:46:38 +04:00
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uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2013-11-15 17:46:38 +04:00
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return (int32_t)ldl_phys(cs->as, p);
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2008-09-30 10:45:44 +04:00
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}
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2013-12-17 08:05:40 +04:00
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uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2013-12-17 08:05:40 +04:00
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return ldq_phys(cs->as, p);
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2008-09-30 10:45:44 +04:00
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}
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2012-03-24 20:51:13 +04:00
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uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2011-05-21 00:04:35 +04:00
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env->lock_addr = p;
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2013-11-15 17:46:38 +04:00
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return env->lock_value = (int32_t)ldl_phys(cs->as, p);
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2008-09-30 10:45:44 +04:00
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}
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2012-03-24 20:51:13 +04:00
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uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2011-05-21 00:04:35 +04:00
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env->lock_addr = p;
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2013-12-17 08:05:40 +04:00
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return env->lock_value = ldq_phys(cs->as, p);
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2008-09-30 10:45:44 +04:00
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}
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2013-12-17 09:07:29 +04:00
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void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2013-12-17 09:07:29 +04:00
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stl_phys(cs->as, p, v);
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2008-09-30 10:45:44 +04:00
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}
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2013-11-28 03:11:44 +04:00
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void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2013-11-28 03:11:44 +04:00
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stq_phys(cs->as, p, v);
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2008-09-30 10:45:44 +04:00
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}
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2012-03-24 20:51:13 +04:00
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uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2011-05-21 00:04:35 +04:00
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uint64_t ret = 0;
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2008-09-30 10:45:44 +04:00
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2011-05-21 00:04:35 +04:00
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if (p == env->lock_addr) {
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2013-11-15 17:46:38 +04:00
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int32_t old = ldl_phys(cs->as, p);
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2011-05-21 00:04:35 +04:00
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if (old == (int32_t)env->lock_value) {
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2013-12-17 09:07:29 +04:00
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stl_phys(cs->as, p, v);
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2011-05-21 00:04:35 +04:00
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ret = 1;
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}
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}
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env->lock_addr = -1;
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2008-09-30 10:45:44 +04:00
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return ret;
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}
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2012-03-24 20:51:13 +04:00
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uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
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2008-09-30 10:45:44 +04:00
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{
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2014-03-09 21:58:57 +04:00
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CPUState *cs = CPU(alpha_env_get_cpu(env));
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2011-05-21 00:04:35 +04:00
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uint64_t ret = 0;
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2008-09-30 10:45:44 +04:00
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2011-05-21 00:04:35 +04:00
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if (p == env->lock_addr) {
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2013-12-17 08:05:40 +04:00
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uint64_t old = ldq_phys(cs->as, p);
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2011-05-21 00:04:35 +04:00
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if (old == env->lock_value) {
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2013-11-28 03:11:44 +04:00
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stq_phys(cs->as, p, v);
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2011-05-21 00:04:35 +04:00
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ret = 1;
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}
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}
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env->lock_addr = -1;
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2008-09-30 10:45:44 +04:00
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return ret;
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2007-04-05 10:58:33 +04:00
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}
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2014-03-28 21:14:58 +04:00
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void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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2016-06-14 15:26:17 +03:00
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MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr)
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2011-04-19 03:13:12 +04:00
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{
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2014-03-28 21:14:58 +04:00
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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2011-04-19 03:13:12 +04:00
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uint64_t pc;
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uint32_t insn;
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2012-12-05 00:16:07 +04:00
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if (retaddr) {
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2013-09-01 18:51:34 +04:00
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cpu_restore_state(cs, retaddr);
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2012-12-05 00:16:07 +04:00
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}
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2011-04-19 03:13:12 +04:00
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pc = env->pc;
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2012-03-24 20:51:13 +04:00
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insn = cpu_ldl_code(env, pc);
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2011-04-19 03:13:12 +04:00
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env->trap_arg0 = addr;
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env->trap_arg1 = insn >> 26; /* opcode */
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env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
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2013-08-26 10:31:06 +04:00
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cs->exception_index = EXCP_UNALIGN;
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2012-03-24 20:51:08 +04:00
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env->error_code = 0;
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2013-08-27 19:52:12 +04:00
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cpu_loop_exit(cs);
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2011-04-19 03:13:12 +04:00
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}
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2013-05-27 08:49:53 +04:00
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void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
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bool is_write, bool is_exec, int unused,
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unsigned size)
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2011-04-19 03:13:12 +04:00
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{
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2013-05-27 08:49:53 +04:00
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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2011-04-19 03:13:12 +04:00
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env->trap_arg0 = addr;
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2013-05-27 08:49:53 +04:00
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env->trap_arg1 = is_write ? 1 : 0;
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2014-06-29 00:06:19 +04:00
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cs->exception_index = EXCP_MCHK;
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env->error_code = 0;
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/* ??? We should cpu_restore_state to the faulting insn, but this hook
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2015-09-09 00:45:14 +03:00
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does not have access to the retaddr value from the original helper.
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2014-06-29 00:06:19 +04:00
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It's all moot until the QEMU PALcode grows an MCHK handler. */
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cpu_loop_exit(cs);
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2011-04-19 03:13:12 +04:00
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}
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2007-04-05 10:58:33 +04:00
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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2016-06-14 15:26:17 +03:00
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void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
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2012-04-09 18:20:20 +04:00
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int mmu_idx, uintptr_t retaddr)
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2007-04-05 10:58:33 +04:00
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{
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int ret;
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2016-06-14 15:26:17 +03:00
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ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
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2011-04-25 23:20:27 +04:00
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if (unlikely(ret != 0)) {
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2012-12-05 00:16:07 +04:00
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if (retaddr) {
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2013-09-01 18:51:34 +04:00
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cpu_restore_state(cs, retaddr);
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2012-12-05 00:16:07 +04:00
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}
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2007-04-05 10:58:33 +04:00
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/* Exception index and error code are already set */
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2013-08-27 19:52:12 +04:00
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cpu_loop_exit(cs);
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2007-04-05 10:58:33 +04:00
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}
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}
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2012-03-24 20:51:13 +04:00
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#endif /* CONFIG_USER_ONLY */
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