2023-03-02 12:12:08 +03:00
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/*
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* Support for generating ACPI tables and passing them to Guests
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*
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* RISC-V virt ACPI generation
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*
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* Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
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* Copyright (C) 2006 Fabrice Bellard
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* Copyright (C) 2013 Red Hat Inc
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* Copyright (c) 2015 HUAWEI TECHNOLOGIES CO.,LTD.
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* Copyright (C) 2021-2023 Ventana Micro Systems Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/acpi/acpi-defs.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/utils.h"
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2023-12-18 18:02:35 +03:00
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#include "hw/nvram/fw_cfg_acpi.h"
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2023-03-02 12:12:08 +03:00
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#include "qapi/error.h"
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2023-03-15 20:43:13 +03:00
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#include "qemu/error-report.h"
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2023-03-02 12:12:08 +03:00
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#include "sysemu/reset.h"
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#include "migration/vmstate.h"
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#include "hw/riscv/virt.h"
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2023-03-02 12:12:09 +03:00
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#include "hw/riscv/numa.h"
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2023-03-02 12:12:10 +03:00
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#include "hw/intc/riscv_aclint.h"
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2023-03-02 12:12:08 +03:00
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#define ACPI_BUILD_TABLE_SIZE 0x20000
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2023-12-18 18:02:39 +03:00
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#define ACPI_BUILD_INTC_ID(socket, index) ((socket << 24) | (index))
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2023-03-02 12:12:08 +03:00
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typedef struct AcpiBuildState {
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/* Copy of table in RAM (for patching) */
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MemoryRegion *table_mr;
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MemoryRegion *rsdp_mr;
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MemoryRegion *linker_mr;
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/* Is table patched? */
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bool patched;
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} AcpiBuildState;
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static void acpi_align_size(GArray *blob, unsigned align)
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{
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/*
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* Align size to multiple of given size. This reduces the chance
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* we need to change size in the future (breaking cross version migration).
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*/
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g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
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}
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static void riscv_acpi_madt_add_rintc(uint32_t uid,
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const CPUArchIdList *arch_ids,
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GArray *entry,
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RISCVVirtState *s)
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{
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2023-12-18 18:02:39 +03:00
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uint8_t guest_index_bits = imsic_num_bits(s->aia_guests + 1);
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uint64_t hart_id = arch_ids->cpus[uid].arch_id;
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2023-12-18 18:02:39 +03:00
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uint32_t imsic_size, local_cpu_id, socket_id;
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uint64_t imsic_socket_addr, imsic_addr;
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MachineState *ms = MACHINE(s);
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2023-12-18 18:02:39 +03:00
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socket_id = arch_ids->cpus[uid].props.node_id;
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local_cpu_id = (arch_ids->cpus[uid].arch_id -
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riscv_socket_first_hartid(ms, socket_id)) %
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riscv_socket_hart_count(ms, socket_id);
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imsic_socket_addr = s->memmap[VIRT_IMSIC_S].base +
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(socket_id * VIRT_IMSIC_GROUP_MAX_SIZE);
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imsic_size = IMSIC_HART_SIZE(guest_index_bits);
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imsic_addr = imsic_socket_addr + local_cpu_id * imsic_size;
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build_append_int_noprefix(entry, 0x18, 1); /* Type */
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build_append_int_noprefix(entry, 36, 1); /* Length */
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build_append_int_noprefix(entry, 1, 1); /* Version */
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build_append_int_noprefix(entry, 0, 1); /* Reserved */
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build_append_int_noprefix(entry, 0x1, 4); /* Flags */
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build_append_int_noprefix(entry, hart_id, 8); /* Hart ID */
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build_append_int_noprefix(entry, uid, 4); /* ACPI Processor UID */
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/* External Interrupt Controller ID */
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if (s->aia_type == VIRT_AIA_TYPE_APLIC) {
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build_append_int_noprefix(entry,
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ACPI_BUILD_INTC_ID(
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arch_ids->cpus[uid].props.node_id,
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local_cpu_id),
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4);
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} else {
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build_append_int_noprefix(entry, 0, 4);
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}
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if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
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/* IMSIC Base address */
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build_append_int_noprefix(entry, imsic_addr, 8);
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/* IMSIC Size */
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build_append_int_noprefix(entry, imsic_size, 4);
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} else {
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build_append_int_noprefix(entry, 0, 8);
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build_append_int_noprefix(entry, 0, 4);
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}
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}
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static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s)
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{
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MachineClass *mc = MACHINE_GET_CLASS(s);
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MachineState *ms = MACHINE(s);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
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for (int i = 0; i < arch_ids->len; i++) {
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Aml *dev;
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GArray *madt_buf = g_array_new(0, 1, 1);
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dev = aml_device("C%.03X", i);
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aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
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aml_append(dev, aml_name_decl("_UID",
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aml_int(arch_ids->cpus[i].arch_id)));
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/* build _MAT object */
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riscv_acpi_madt_add_rintc(i, arch_ids, madt_buf, s);
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aml_append(dev, aml_name_decl("_MAT",
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aml_buffer(madt_buf->len,
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(uint8_t *)madt_buf->data)));
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g_array_free(madt_buf, true);
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aml_append(scope, dev);
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}
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}
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2023-03-02 12:12:10 +03:00
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/* RHCT Node[N] starts at offset 56 */
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#define RHCT_NODE_ARRAY_OFFSET 56
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/*
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* ACPI spec, Revision 6.5+
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* 5.2.36 RISC-V Hart Capabilities Table (RHCT)
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* REF: https://github.com/riscv-non-isa/riscv-acpi/issues/16
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* https://drive.google.com/file/d/1nP3nFiH4jkPMp6COOxP6123DCZKR-tia/view
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*/
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static void build_rhct(GArray *table_data,
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BIOSLinker *linker,
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RISCVVirtState *s)
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{
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MachineClass *mc = MACHINE_GET_CLASS(s);
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MachineState *ms = MACHINE(s);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
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size_t len, aligned_len;
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uint32_t isa_offset, num_rhct_nodes;
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RISCVCPU *cpu;
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char *isa;
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AcpiTable table = { .sig = "RHCT", .rev = 1, .oem_id = s->oem_id,
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.oem_table_id = s->oem_table_id };
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acpi_table_begin(&table, table_data);
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build_append_int_noprefix(table_data, 0x0, 4); /* Reserved */
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/* Time Base Frequency */
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build_append_int_noprefix(table_data,
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RISCV_ACLINT_DEFAULT_TIMEBASE_FREQ, 8);
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/* ISA + N hart info */
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num_rhct_nodes = 1 + ms->smp.cpus;
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/* Number of RHCT nodes*/
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build_append_int_noprefix(table_data, num_rhct_nodes, 4);
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/* Offset to the RHCT node array */
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build_append_int_noprefix(table_data, RHCT_NODE_ARRAY_OFFSET, 4);
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/* ISA String Node */
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isa_offset = table_data->len - table.table_offset;
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build_append_int_noprefix(table_data, 0, 2); /* Type 0 */
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cpu = &s->soc[0].harts[0];
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isa = riscv_isa_string(cpu);
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len = 8 + strlen(isa) + 1;
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aligned_len = (len % 2) ? (len + 1) : len;
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build_append_int_noprefix(table_data, aligned_len, 2); /* Length */
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build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
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/* ISA string length including NUL */
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build_append_int_noprefix(table_data, strlen(isa) + 1, 2);
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g_array_append_vals(table_data, isa, strlen(isa) + 1); /* ISA string */
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if (aligned_len != len) {
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build_append_int_noprefix(table_data, 0x0, 1); /* Optional Padding */
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}
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/* Hart Info Node */
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for (int i = 0; i < arch_ids->len; i++) {
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build_append_int_noprefix(table_data, 0xFFFF, 2); /* Type */
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build_append_int_noprefix(table_data, 16, 2); /* Length */
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build_append_int_noprefix(table_data, 0x1, 2); /* Revision */
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build_append_int_noprefix(table_data, 1, 2); /* Number of offsets */
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build_append_int_noprefix(table_data, i, 4); /* ACPI Processor UID */
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build_append_int_noprefix(table_data, isa_offset, 4); /* Offsets[0] */
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}
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acpi_table_end(linker, &table);
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}
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2023-03-02 12:12:08 +03:00
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/* FADT */
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static void build_fadt_rev6(GArray *table_data,
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BIOSLinker *linker,
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RISCVVirtState *s,
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unsigned dsdt_tbl_offset)
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{
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AcpiFadtData fadt = {
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.rev = 6,
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.minor_ver = 5,
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.flags = 1 << ACPI_FADT_F_HW_REDUCED_ACPI,
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.xdsdt_tbl_offset = &dsdt_tbl_offset,
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};
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build_fadt(table_data, linker, &fadt, s->oem_id, s->oem_table_id);
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}
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/* DSDT */
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static void build_dsdt(GArray *table_data,
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BIOSLinker *linker,
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RISCVVirtState *s)
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{
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Aml *scope, *dsdt;
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const MemMapEntry *memmap = s->memmap;
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AcpiTable table = { .sig = "DSDT", .rev = 2, .oem_id = s->oem_id,
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.oem_table_id = s->oem_table_id };
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acpi_table_begin(&table, table_data);
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dsdt = init_aml_allocator();
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/*
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* When booting the VM with UEFI, UEFI takes ownership of the RTC hardware.
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* While UEFI can use libfdt to disable the RTC device node in the DTB that
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* it passes to the OS, it cannot modify AML. Therefore, we won't generate
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* the RTC ACPI device at all when using UEFI.
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*/
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scope = aml_scope("\\_SB");
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acpi_dsdt_add_cpus(scope, s);
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2023-12-18 18:02:35 +03:00
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fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]);
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aml_append(dsdt, scope);
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/* copy AML table into ACPI tables blob and patch header there */
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g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
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acpi_table_end(linker, &table);
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free_aml_allocator();
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}
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2023-03-02 12:12:09 +03:00
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/*
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* ACPI spec, Revision 6.5+
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* 5.2.12 Multiple APIC Description Table (MADT)
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* REF: https://github.com/riscv-non-isa/riscv-acpi/issues/15
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* https://drive.google.com/file/d/1R6k4MshhN3WTT-hwqAquu5nX6xSEqK2l/view
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* https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view
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2023-03-02 12:12:09 +03:00
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*/
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static void build_madt(GArray *table_data,
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BIOSLinker *linker,
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RISCVVirtState *s)
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{
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MachineClass *mc = MACHINE_GET_CLASS(s);
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MachineState *ms = MACHINE(s);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(ms);
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2023-12-18 18:02:40 +03:00
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uint8_t group_index_bits = imsic_num_bits(riscv_socket_count(ms));
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uint8_t guest_index_bits = imsic_num_bits(s->aia_guests + 1);
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uint16_t imsic_max_hart_per_socket = 0;
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uint8_t hart_index_bits;
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2023-12-18 18:02:41 +03:00
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uint64_t aplic_addr;
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uint32_t gsi_base;
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2023-12-18 18:02:40 +03:00
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uint8_t socket;
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for (socket = 0; socket < riscv_socket_count(ms); socket++) {
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if (imsic_max_hart_per_socket < s->soc[socket].num_harts) {
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imsic_max_hart_per_socket = s->soc[socket].num_harts;
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}
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}
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hart_index_bits = imsic_num_bits(imsic_max_hart_per_socket);
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2023-03-02 12:12:09 +03:00
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AcpiTable table = { .sig = "APIC", .rev = 6, .oem_id = s->oem_id,
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.oem_table_id = s->oem_table_id };
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acpi_table_begin(&table, table_data);
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/* Local Interrupt Controller Address */
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build_append_int_noprefix(table_data, 0, 4);
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build_append_int_noprefix(table_data, 0, 4); /* MADT Flags */
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/* RISC-V Local INTC structures per HART */
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for (int i = 0; i < arch_ids->len; i++) {
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2023-12-18 18:02:39 +03:00
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riscv_acpi_madt_add_rintc(i, arch_ids, table_data, s);
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2023-03-02 12:12:09 +03:00
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|
}
|
|
|
|
|
2023-12-18 18:02:40 +03:00
|
|
|
/* IMSIC */
|
|
|
|
if (s->aia_type == VIRT_AIA_TYPE_APLIC_IMSIC) {
|
|
|
|
/* IMSIC */
|
|
|
|
build_append_int_noprefix(table_data, 0x19, 1); /* Type */
|
|
|
|
build_append_int_noprefix(table_data, 16, 1); /* Length */
|
|
|
|
build_append_int_noprefix(table_data, 1, 1); /* Version */
|
|
|
|
build_append_int_noprefix(table_data, 0, 1); /* Reserved */
|
|
|
|
build_append_int_noprefix(table_data, 0, 4); /* Flags */
|
|
|
|
/* Number of supervisor mode Interrupt Identities */
|
|
|
|
build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_MSIS, 2);
|
|
|
|
/* Number of guest mode Interrupt Identities */
|
|
|
|
build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_MSIS, 2);
|
|
|
|
/* Guest Index Bits */
|
|
|
|
build_append_int_noprefix(table_data, guest_index_bits, 1);
|
|
|
|
/* Hart Index Bits */
|
|
|
|
build_append_int_noprefix(table_data, hart_index_bits, 1);
|
|
|
|
/* Group Index Bits */
|
|
|
|
build_append_int_noprefix(table_data, group_index_bits, 1);
|
|
|
|
/* Group Index Shift */
|
|
|
|
build_append_int_noprefix(table_data, IMSIC_MMIO_GROUP_MIN_SHIFT, 1);
|
|
|
|
}
|
|
|
|
|
2023-12-18 18:02:41 +03:00
|
|
|
if (s->aia_type != VIRT_AIA_TYPE_NONE) {
|
|
|
|
/* APLICs */
|
|
|
|
for (socket = 0; socket < riscv_socket_count(ms); socket++) {
|
|
|
|
aplic_addr = s->memmap[VIRT_APLIC_S].base +
|
|
|
|
s->memmap[VIRT_APLIC_S].size * socket;
|
|
|
|
gsi_base = VIRT_IRQCHIP_NUM_SOURCES * socket;
|
|
|
|
build_append_int_noprefix(table_data, 0x1A, 1); /* Type */
|
|
|
|
build_append_int_noprefix(table_data, 36, 1); /* Length */
|
|
|
|
build_append_int_noprefix(table_data, 1, 1); /* Version */
|
|
|
|
build_append_int_noprefix(table_data, socket, 1); /* APLIC ID */
|
|
|
|
build_append_int_noprefix(table_data, 0, 4); /* Flags */
|
|
|
|
build_append_int_noprefix(table_data, 0, 8); /* Hardware ID */
|
|
|
|
/* Number of IDCs */
|
|
|
|
if (s->aia_type == VIRT_AIA_TYPE_APLIC) {
|
|
|
|
build_append_int_noprefix(table_data,
|
|
|
|
s->soc[socket].num_harts,
|
|
|
|
2);
|
|
|
|
} else {
|
|
|
|
build_append_int_noprefix(table_data, 0, 2);
|
|
|
|
}
|
|
|
|
/* Total External Interrupt Sources Supported */
|
|
|
|
build_append_int_noprefix(table_data, VIRT_IRQCHIP_NUM_SOURCES, 2);
|
|
|
|
/* Global System Interrupt Base */
|
|
|
|
build_append_int_noprefix(table_data, gsi_base, 4);
|
|
|
|
/* APLIC Address */
|
|
|
|
build_append_int_noprefix(table_data, aplic_addr, 8);
|
|
|
|
/* APLIC size */
|
|
|
|
build_append_int_noprefix(table_data,
|
|
|
|
s->memmap[VIRT_APLIC_S].size, 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-03-02 12:12:09 +03:00
|
|
|
acpi_table_end(linker, &table);
|
|
|
|
}
|
|
|
|
|
2023-03-02 12:12:08 +03:00
|
|
|
static void virt_acpi_build(RISCVVirtState *s, AcpiBuildTables *tables)
|
|
|
|
{
|
|
|
|
GArray *table_offsets;
|
|
|
|
unsigned dsdt, xsdt;
|
|
|
|
GArray *tables_blob = tables->table_data;
|
|
|
|
|
|
|
|
table_offsets = g_array_new(false, true,
|
|
|
|
sizeof(uint32_t));
|
|
|
|
|
|
|
|
bios_linker_loader_alloc(tables->linker,
|
|
|
|
ACPI_BUILD_TABLE_FILE, tables_blob,
|
|
|
|
64, false);
|
|
|
|
|
|
|
|
/* DSDT is pointed to by FADT */
|
|
|
|
dsdt = tables_blob->len;
|
|
|
|
build_dsdt(tables_blob, tables->linker, s);
|
|
|
|
|
|
|
|
/* FADT and others pointed to by XSDT */
|
|
|
|
acpi_add_table(table_offsets, tables_blob);
|
|
|
|
build_fadt_rev6(tables_blob, tables->linker, s, dsdt);
|
|
|
|
|
2023-03-02 12:12:09 +03:00
|
|
|
acpi_add_table(table_offsets, tables_blob);
|
|
|
|
build_madt(tables_blob, tables->linker, s);
|
|
|
|
|
2023-03-02 12:12:10 +03:00
|
|
|
acpi_add_table(table_offsets, tables_blob);
|
|
|
|
build_rhct(tables_blob, tables->linker, s);
|
|
|
|
|
2023-03-02 12:12:08 +03:00
|
|
|
/* XSDT is pointed to by RSDP */
|
|
|
|
xsdt = tables_blob->len;
|
|
|
|
build_xsdt(tables_blob, tables->linker, table_offsets, s->oem_id,
|
|
|
|
s->oem_table_id);
|
|
|
|
|
|
|
|
/* RSDP is in FSEG memory, so allocate it separately */
|
|
|
|
{
|
|
|
|
AcpiRsdpData rsdp_data = {
|
|
|
|
.revision = 2,
|
|
|
|
.oem_id = s->oem_id,
|
|
|
|
.xsdt_tbl_offset = &xsdt,
|
|
|
|
.rsdt_tbl_offset = NULL,
|
|
|
|
};
|
|
|
|
build_rsdp(tables->rsdp, tables->linker, &rsdp_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The align size is 128, warn if 64k is not enough therefore
|
|
|
|
* the align size could be resized.
|
|
|
|
*/
|
|
|
|
if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) {
|
|
|
|
warn_report("ACPI table size %u exceeds %d bytes,"
|
|
|
|
" migration may not work",
|
|
|
|
tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2);
|
|
|
|
error_printf("Try removing some objects.");
|
|
|
|
}
|
|
|
|
|
|
|
|
acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE);
|
|
|
|
|
|
|
|
/* Clean up memory that's no longer used */
|
|
|
|
g_array_free(table_offsets, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void acpi_ram_update(MemoryRegion *mr, GArray *data)
|
|
|
|
{
|
|
|
|
uint32_t size = acpi_data_len(data);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Make sure RAM size is correct - in case it got changed
|
|
|
|
* e.g. by migration
|
|
|
|
*/
|
|
|
|
memory_region_ram_resize(mr, size, &error_abort);
|
|
|
|
|
|
|
|
memcpy(memory_region_get_ram_ptr(mr), data->data, size);
|
|
|
|
memory_region_set_dirty(mr, 0, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virt_acpi_build_update(void *build_opaque)
|
|
|
|
{
|
|
|
|
AcpiBuildState *build_state = build_opaque;
|
|
|
|
AcpiBuildTables tables;
|
|
|
|
|
|
|
|
/* No state to update or already patched? Nothing to do. */
|
|
|
|
if (!build_state || build_state->patched) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
build_state->patched = true;
|
|
|
|
|
|
|
|
acpi_build_tables_init(&tables);
|
|
|
|
|
|
|
|
virt_acpi_build(RISCV_VIRT_MACHINE(qdev_get_machine()), &tables);
|
|
|
|
|
|
|
|
acpi_ram_update(build_state->table_mr, tables.table_data);
|
|
|
|
acpi_ram_update(build_state->rsdp_mr, tables.rsdp);
|
|
|
|
acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob);
|
|
|
|
|
|
|
|
acpi_build_tables_cleanup(&tables, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void virt_acpi_build_reset(void *build_opaque)
|
|
|
|
{
|
|
|
|
AcpiBuildState *build_state = build_opaque;
|
|
|
|
build_state->patched = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_virt_acpi_build = {
|
|
|
|
.name = "virt_acpi_build",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
2023-12-21 06:16:29 +03:00
|
|
|
.fields = (const VMStateField[]) {
|
2023-03-02 12:12:08 +03:00
|
|
|
VMSTATE_BOOL(patched, AcpiBuildState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
void virt_acpi_setup(RISCVVirtState *s)
|
|
|
|
{
|
|
|
|
AcpiBuildTables tables;
|
|
|
|
AcpiBuildState *build_state;
|
|
|
|
|
|
|
|
build_state = g_malloc0(sizeof *build_state);
|
|
|
|
|
|
|
|
acpi_build_tables_init(&tables);
|
|
|
|
virt_acpi_build(s, &tables);
|
|
|
|
|
|
|
|
/* Now expose it all to Guest */
|
|
|
|
build_state->table_mr = acpi_add_rom_blob(virt_acpi_build_update,
|
|
|
|
build_state, tables.table_data,
|
|
|
|
ACPI_BUILD_TABLE_FILE);
|
|
|
|
assert(build_state->table_mr != NULL);
|
|
|
|
|
|
|
|
build_state->linker_mr = acpi_add_rom_blob(virt_acpi_build_update,
|
|
|
|
build_state,
|
|
|
|
tables.linker->cmd_blob,
|
|
|
|
ACPI_BUILD_LOADER_FILE);
|
|
|
|
|
|
|
|
build_state->rsdp_mr = acpi_add_rom_blob(virt_acpi_build_update,
|
|
|
|
build_state, tables.rsdp,
|
|
|
|
ACPI_BUILD_RSDP_FILE);
|
|
|
|
|
|
|
|
qemu_register_reset(virt_acpi_build_reset, build_state);
|
|
|
|
virt_acpi_build_reset(build_state);
|
|
|
|
vmstate_register(NULL, 0, &vmstate_virt_acpi_build, build_state);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Clean up tables but don't free the memory: we track it
|
|
|
|
* in build_state.
|
|
|
|
*/
|
|
|
|
acpi_build_tables_cleanup(&tables, false);
|
|
|
|
}
|