2007-10-29 13:34:01 +03:00
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/*
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2007-11-03 03:41:31 +03:00
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* TI TSC2102 (touchscreen/sensors/audio controller) emulator.
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2008-04-15 01:28:11 +04:00
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* TI TSC2301 (touchscreen/sensors/keypad).
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2007-10-29 13:34:01 +03:00
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*
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* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
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2008-04-15 01:28:11 +04:00
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* Copyright (C) 2008 Nokia Corporation
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2007-10-29 13:34:01 +03:00
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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2008-04-15 01:28:11 +04:00
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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2007-10-29 13:34:01 +03:00
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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2009-01-05 01:05:52 +03:00
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* You should have received a copy of the GNU General Public License along
|
2009-07-17 00:47:01 +04:00
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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2007-10-29 13:34:01 +03:00
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*/
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2016-01-26 21:17:28 +03:00
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#include "qemu/osdep.h"
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2022-02-07 11:27:56 +03:00
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#include "qemu/log.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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2007-11-17 20:14:51 +03:00
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#include "audio/audio.h"
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2012-12-17 21:20:00 +04:00
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#include "qemu/timer.h"
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hw/input/tsc210x: Don't abort on bad SPI word widths
The tsc210x doesn't support anything other than 16-bit reads on the
SPI bus, but the guest can program the SPI controller to attempt
them anyway. If this happens, don't abort QEMU, just log this as
a guest error.
This fixes our machine_arm_n8x0.py:N8x0Machine.test_n800
acceptance test, which hits this assertion.
The reason we hit the assertion is because the guest kernel thinks
there is a TSC2005 on this SPI bus address, not a TSC210x. (The n810
*does* have a TSC2005 at this address.) The TSC2005 supports the
24-bit accesses which the guest driver makes, and the TSC210x does
not (that is, our TSC210x emulation is not missing support for a word
width the hardware can handle). It's not clear whether the problem
here is that the guest kernel incorrectly thinks the n800 has the
same device at this SPI bus address as the n810, or that QEMU's n810
board model doesn't get the SPI devices right. At this late date
there no longer appears to be any reliable information on the web
about the hardware behaviour, but I am inclined to think this is a
guest kernel bug. In any case, we prefer not to abort QEMU for
guest-triggerable conditions, so logging the error is the right thing
to do.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/736
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20220221140750.514557-1-peter.maydell@linaro.org
2022-02-21 17:07:50 +03:00
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#include "qemu/log.h"
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2019-08-12 08:23:38 +03:00
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#include "sysemu/reset.h"
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2012-11-28 15:06:30 +04:00
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#include "ui/console.h"
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2019-04-12 19:54:12 +03:00
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#include "hw/arm/omap.h" /* For I2SCodec */
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#include "hw/input/tsc2xxx.h"
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2019-08-12 08:23:42 +03:00
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#include "hw/irq.h"
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2019-08-12 08:23:45 +03:00
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#include "migration/vmstate.h"
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2007-10-29 13:34:01 +03:00
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#define TSC_DATA_REGISTERS_PAGE 0x0
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#define TSC_CONTROL_REGISTERS_PAGE 0x1
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#define TSC_AUDIO_REGISTERS_PAGE 0x2
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#define TSC_VERBOSE
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#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
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2009-05-10 04:44:56 +04:00
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typedef struct {
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2007-10-29 13:34:01 +03:00
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qemu_irq pint;
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2008-04-15 01:28:11 +04:00
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qemu_irq kbint;
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qemu_irq davint;
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2007-10-29 13:34:01 +03:00
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QEMUTimer *timer;
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2007-11-05 01:53:50 +03:00
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QEMUSoundCard card;
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2009-05-10 04:44:56 +04:00
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uWireSlave chip;
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I2SCodec codec;
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2007-11-05 01:53:50 +03:00
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uint8_t in_fifo[16384];
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uint8_t out_fifo[16384];
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2008-04-15 01:28:11 +04:00
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uint16_t model;
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2007-10-29 13:34:01 +03:00
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2016-10-04 15:28:08 +03:00
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int32_t x, y;
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bool pressure;
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uint8_t page, offset;
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uint16_t dav;
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bool state;
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bool irq;
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bool command;
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bool busy;
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bool enabled;
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bool host_mode;
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uint8_t function, nextfunction;
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uint8_t precision, nextprecision;
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uint8_t filter;
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uint8_t pin_func;
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uint8_t ref;
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uint8_t timing;
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uint8_t noise;
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2007-10-29 13:34:01 +03:00
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uint16_t audio_ctrl1;
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uint16_t audio_ctrl2;
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uint16_t audio_ctrl3;
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2008-04-15 01:28:11 +04:00
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uint16_t pll[3];
|
2007-10-29 13:34:01 +03:00
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uint16_t volume;
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int64_t volume_change;
|
2016-10-04 15:28:08 +03:00
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bool softstep;
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2007-10-29 13:34:01 +03:00
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uint16_t dac_power;
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int64_t powerdown;
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uint16_t filter_data[0x14];
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2007-11-05 01:53:50 +03:00
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const char *name;
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SWVoiceIn *adc_voice[1];
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SWVoiceOut *dac_voice[1];
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int i2s_rx_rate;
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int i2s_tx_rate;
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2008-04-15 01:28:11 +04:00
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int tr[8];
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struct {
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uint16_t down;
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uint16_t mask;
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int scan;
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int debounce;
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int mode;
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int intr;
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} kb;
|
2016-10-04 15:28:08 +03:00
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int64_t now; /* Time at migration */
|
2009-05-10 04:44:56 +04:00
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} TSC210xState;
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2007-10-29 13:34:01 +03:00
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static const int resolution[4] = { 12, 8, 10, 12 };
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#define TSC_MODE_NO_SCAN 0x0
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#define TSC_MODE_XY_SCAN 0x1
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#define TSC_MODE_XYZ_SCAN 0x2
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#define TSC_MODE_X 0x3
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#define TSC_MODE_Y 0x4
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#define TSC_MODE_Z 0x5
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#define TSC_MODE_BAT1 0x6
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#define TSC_MODE_BAT2 0x7
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#define TSC_MODE_AUX 0x8
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#define TSC_MODE_AUX_SCAN 0x9
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#define TSC_MODE_TEMP1 0xa
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#define TSC_MODE_PORT_SCAN 0xb
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#define TSC_MODE_TEMP2 0xc
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#define TSC_MODE_XX_DRV 0xd
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#define TSC_MODE_YY_DRV 0xe
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#define TSC_MODE_YX_DRV 0xf
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static const uint16_t mode_regs[16] = {
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0x0000, /* No scan */
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0x0600, /* X, Y scan */
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0x0780, /* X, Y, Z scan */
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0x0400, /* X */
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0x0200, /* Y */
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0x0180, /* Z */
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0x0040, /* BAT1 */
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0x0030, /* BAT2 */
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0x0010, /* AUX */
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0x0010, /* AUX scan */
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0x0004, /* TEMP1 */
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0x0070, /* Port scan */
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0x0002, /* TEMP2 */
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0x0000, /* X+, X- drivers */
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0x0000, /* Y+, Y- drivers */
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0x0000, /* Y+, X- drivers */
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};
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2008-04-15 01:28:11 +04:00
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#define X_TRANSFORM(s) \
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((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
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#define Y_TRANSFORM(s) \
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((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
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2007-10-29 13:34:01 +03:00
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#define Z1_TRANSFORM(s) \
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2007-11-25 21:46:17 +03:00
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((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
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2007-10-29 13:34:01 +03:00
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#define Z2_TRANSFORM(s) \
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2007-11-25 21:46:17 +03:00
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((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
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2007-10-29 13:34:01 +03:00
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#define BAT1_VAL 0x8660
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#define BAT2_VAL 0x0000
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#define AUX1_VAL 0x35c0
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#define AUX2_VAL 0xffff
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#define TEMP1_VAL 0x8c70
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#define TEMP2_VAL 0xa5b0
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#define TSC_POWEROFF_DELAY 50
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#define TSC_SOFTSTEP_DELAY 50
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2009-05-10 04:44:56 +04:00
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static void tsc210x_reset(TSC210xState *s)
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2007-10-29 13:34:01 +03:00
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{
|
2016-10-04 15:28:08 +03:00
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s->state = false;
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2007-10-29 13:34:01 +03:00
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s->pin_func = 2;
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2016-10-04 15:28:08 +03:00
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s->enabled = false;
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s->busy = false;
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2007-10-29 13:34:01 +03:00
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s->nextfunction = 0;
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s->ref = 0;
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s->timing = 0;
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2016-10-04 15:28:08 +03:00
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s->irq = false;
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2007-10-29 13:34:01 +03:00
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s->dav = 0;
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s->audio_ctrl1 = 0x0000;
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s->audio_ctrl2 = 0x4410;
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s->audio_ctrl3 = 0x0000;
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s->pll[0] = 0x1004;
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s->pll[1] = 0x0000;
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2008-04-15 01:28:11 +04:00
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s->pll[2] = 0x1fff;
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2007-10-29 13:34:01 +03:00
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s->volume = 0xffff;
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s->dac_power = 0x8540;
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2016-10-04 15:28:08 +03:00
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s->softstep = true;
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2007-10-29 13:34:01 +03:00
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s->volume_change = 0;
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s->powerdown = 0;
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s->filter_data[0x00] = 0x6be3;
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s->filter_data[0x01] = 0x9666;
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s->filter_data[0x02] = 0x675d;
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s->filter_data[0x03] = 0x6be3;
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s->filter_data[0x04] = 0x9666;
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s->filter_data[0x05] = 0x675d;
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s->filter_data[0x06] = 0x7d83;
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s->filter_data[0x07] = 0x84ee;
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s->filter_data[0x08] = 0x7d83;
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s->filter_data[0x09] = 0x84ee;
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s->filter_data[0x0a] = 0x6be3;
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s->filter_data[0x0b] = 0x9666;
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s->filter_data[0x0c] = 0x675d;
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s->filter_data[0x0d] = 0x6be3;
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s->filter_data[0x0e] = 0x9666;
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s->filter_data[0x0f] = 0x675d;
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s->filter_data[0x10] = 0x7d83;
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s->filter_data[0x11] = 0x84ee;
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s->filter_data[0x12] = 0x7d83;
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s->filter_data[0x13] = 0x84ee;
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2007-11-05 01:53:50 +03:00
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s->i2s_tx_rate = 0;
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s->i2s_rx_rate = 0;
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2008-04-15 01:28:11 +04:00
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s->kb.scan = 1;
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s->kb.debounce = 0;
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s->kb.mask = 0x0000;
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s->kb.mode = 3;
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s->kb.intr = 0;
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2007-11-03 03:41:31 +03:00
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qemu_set_irq(s->pint, !s->irq);
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2008-04-15 01:28:11 +04:00
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qemu_set_irq(s->davint, !s->dav);
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qemu_irq_raise(s->kbint);
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2007-10-29 13:34:01 +03:00
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}
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2009-05-10 04:44:56 +04:00
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typedef struct {
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2007-11-05 01:53:50 +03:00
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int rate;
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int dsor;
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int fsref;
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2009-05-10 04:44:56 +04:00
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} TSC210xRateInfo;
|
2007-11-05 01:53:50 +03:00
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/* { rate, dsor, fsref } */
|
2009-05-10 04:44:56 +04:00
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static const TSC210xRateInfo tsc2102_rates[] = {
|
2007-11-05 01:53:50 +03:00
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/* Fsref / 6.0 */
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{ 7350, 63, 1 },
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{ 8000, 63, 0 },
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/* Fsref / 6.0 */
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{ 7350, 54, 1 },
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{ 8000, 54, 0 },
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/* Fsref / 5.0 */
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{ 8820, 45, 1 },
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{ 9600, 45, 0 },
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/* Fsref / 4.0 */
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{ 11025, 36, 1 },
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{ 12000, 36, 0 },
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/* Fsref / 3.0 */
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{ 14700, 27, 1 },
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{ 16000, 27, 0 },
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/* Fsref / 2.0 */
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{ 22050, 18, 1 },
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{ 24000, 18, 0 },
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/* Fsref / 1.5 */
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{ 29400, 9, 1 },
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{ 32000, 9, 0 },
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/* Fsref */
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{ 44100, 0, 1 },
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{ 48000, 0, 0 },
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{ 0, 0, 0 },
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};
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|
2009-05-10 04:44:56 +04:00
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static inline void tsc210x_out_flush(TSC210xState *s, int len)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
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uint8_t *data = s->codec.out.fifo + s->codec.out.start;
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uint8_t *end = data + len;
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while (data < end)
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data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
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s->codec.out.len -= len;
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if (s->codec.out.len)
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|
memmove(s->codec.out.fifo, end, s->codec.out.len);
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|
s->codec.out.start = 0;
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|
}
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|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
|
|
|
|
if (s->codec.out.len >= free_b) {
|
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|
|
tsc210x_out_flush(s, free_b);
|
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|
return;
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|
}
|
|
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|
|
s->codec.out.size = MIN(free_b, 16384);
|
|
|
|
qemu_irq_raise(s->codec.tx_start);
|
|
|
|
}
|
|
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|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc2102_audio_rate_update(TSC210xState *s)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
const TSC210xRateInfo *rate;
|
2007-11-19 06:43:51 +03:00
|
|
|
|
|
|
|
s->codec.tx_rate = 0;
|
|
|
|
s->codec.rx_rate = 0;
|
|
|
|
if (s->dac_power & (1 << 15)) /* PWDNC */
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (rate = tsc2102_rates; rate->rate; rate ++)
|
|
|
|
if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
|
|
|
|
rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
|
|
|
|
break;
|
|
|
|
if (!rate->rate) {
|
2017-11-09 01:56:31 +03:00
|
|
|
printf("%s: unknown sampling rate configured\n", __func__);
|
2007-11-19 06:43:51 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->codec.tx_rate = rate->rate;
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc2102_audio_output_update(TSC210xState *s)
|
2007-11-19 06:43:51 +03:00
|
|
|
{
|
|
|
|
int enable;
|
2008-12-04 01:48:44 +03:00
|
|
|
struct audsettings fmt;
|
2007-11-05 01:53:50 +03:00
|
|
|
|
|
|
|
if (s->dac_voice[0]) {
|
|
|
|
tsc210x_out_flush(s, s->codec.out.len);
|
|
|
|
s->codec.out.size = 0;
|
|
|
|
AUD_set_active_out(s->dac_voice[0], 0);
|
|
|
|
AUD_close_out(&s->card, s->dac_voice[0]);
|
2009-09-21 22:11:34 +04:00
|
|
|
s->dac_voice[0] = NULL;
|
2007-11-05 01:53:50 +03:00
|
|
|
}
|
2007-11-19 06:43:51 +03:00
|
|
|
s->codec.cts = 0;
|
2007-11-05 01:53:50 +03:00
|
|
|
|
|
|
|
enable =
|
|
|
|
(~s->dac_power & (1 << 15)) && /* PWDNC */
|
|
|
|
(~s->dac_power & (1 << 10)); /* DAPWDN */
|
2007-11-19 06:43:51 +03:00
|
|
|
if (!enable || !s->codec.tx_rate)
|
2007-11-05 01:53:50 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
/* Force our own sampling rate even in slave DAC mode */
|
|
|
|
fmt.endianness = 0;
|
|
|
|
fmt.nchannels = 2;
|
2007-11-19 06:43:51 +03:00
|
|
|
fmt.freq = s->codec.tx_rate;
|
2019-03-09 01:34:13 +03:00
|
|
|
fmt.fmt = AUDIO_FORMAT_S16;
|
2007-11-05 01:53:50 +03:00
|
|
|
|
|
|
|
s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
|
|
|
|
"tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
|
2007-11-19 06:43:51 +03:00
|
|
|
if (s->dac_voice[0]) {
|
|
|
|
s->codec.cts = 1;
|
2007-11-05 01:53:50 +03:00
|
|
|
AUD_set_active_out(s->dac_voice[0], 1);
|
2007-11-19 06:43:51 +03:00
|
|
|
}
|
2007-11-05 01:53:50 +03:00
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* X */
|
|
|
|
s->dav &= 0xfbff;
|
2008-04-15 01:28:11 +04:00
|
|
|
return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
|
2007-10-29 13:34:01 +03:00
|
|
|
(s->noise & 3);
|
|
|
|
|
|
|
|
case 0x01: /* Y */
|
|
|
|
s->noise ++;
|
|
|
|
s->dav &= 0xfdff;
|
2008-04-15 01:28:11 +04:00
|
|
|
return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
|
2007-10-29 13:34:01 +03:00
|
|
|
(s->noise & 3);
|
|
|
|
|
|
|
|
case 0x02: /* Z1 */
|
|
|
|
s->dav &= 0xfeff;
|
|
|
|
return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
|
|
|
|
(s->noise & 3);
|
|
|
|
|
|
|
|
case 0x03: /* Z2 */
|
|
|
|
s->dav &= 0xff7f;
|
|
|
|
return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
|
|
|
|
(s->noise & 3);
|
|
|
|
|
|
|
|
case 0x04: /* KPData */
|
2008-04-15 01:28:11 +04:00
|
|
|
if ((s->model & 0xff00) == 0x2300) {
|
|
|
|
if (s->kb.intr && (s->kb.mode & 2)) {
|
|
|
|
s->kb.intr = 0;
|
|
|
|
qemu_irq_raise(s->kbint);
|
|
|
|
}
|
|
|
|
return s->kb.down;
|
|
|
|
}
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
return 0xffff;
|
|
|
|
|
|
|
|
case 0x05: /* BAT1 */
|
|
|
|
s->dav &= 0xffbf;
|
2007-11-25 21:46:17 +03:00
|
|
|
return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
|
|
|
|
(s->noise & 6);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
case 0x06: /* BAT2 */
|
|
|
|
s->dav &= 0xffdf;
|
|
|
|
return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
|
|
|
|
|
|
|
|
case 0x07: /* AUX1 */
|
|
|
|
s->dav &= 0xffef;
|
|
|
|
return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
|
|
|
|
|
|
|
|
case 0x08: /* AUX2 */
|
|
|
|
s->dav &= 0xfff7;
|
|
|
|
return 0xffff;
|
|
|
|
|
|
|
|
case 0x09: /* TEMP1 */
|
|
|
|
s->dav &= 0xfffb;
|
2007-11-25 21:46:17 +03:00
|
|
|
return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
|
|
|
|
(s->noise & 5);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
case 0x0a: /* TEMP2 */
|
|
|
|
s->dav &= 0xfffd;
|
2007-11-25 21:46:17 +03:00
|
|
|
return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
|
|
|
|
(s->noise & 3);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
case 0x0b: /* DAC */
|
|
|
|
s->dav &= 0xfffe;
|
|
|
|
return 0xffff;
|
|
|
|
|
|
|
|
default:
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
fprintf(stderr, "tsc2102_data_register_read: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
|
|
|
#endif
|
|
|
|
return 0xffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint16_t tsc2102_control_register_read(
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s, int reg)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* TSC ADC */
|
|
|
|
return (s->pressure << 15) | ((!s->busy) << 14) |
|
|
|
|
(s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
case 0x01: /* Status / Keypad Control */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
return (s->pin_func << 14) | ((!s->enabled) << 13) |
|
|
|
|
(s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
|
|
|
|
else
|
|
|
|
return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
|
|
|
|
(s->kb.debounce << 11);
|
|
|
|
|
|
|
|
case 0x02: /* DAC Control */
|
|
|
|
if ((s->model & 0xff00) == 0x2300)
|
|
|
|
return s->dac_power & 0x8000;
|
|
|
|
else
|
|
|
|
goto bad_reg;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
case 0x03: /* Reference */
|
|
|
|
return s->ref;
|
|
|
|
|
|
|
|
case 0x04: /* Reset */
|
|
|
|
return 0xffff;
|
|
|
|
|
|
|
|
case 0x05: /* Configuration */
|
|
|
|
return s->timing;
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
case 0x06: /* Secondary configuration */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
goto bad_reg;
|
|
|
|
return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
|
|
|
|
|
|
|
|
case 0x10: /* Keypad Mask */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
goto bad_reg;
|
|
|
|
return s->kb.mask;
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
default:
|
2008-04-15 01:28:11 +04:00
|
|
|
bad_reg:
|
2007-10-29 13:34:01 +03:00
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
fprintf(stderr, "tsc2102_control_register_read: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
|
|
|
#endif
|
|
|
|
return 0xffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
int l_ch, r_ch;
|
|
|
|
uint16_t val;
|
|
|
|
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* Audio Control 1 */
|
|
|
|
return s->audio_ctrl1;
|
|
|
|
|
|
|
|
case 0x01:
|
|
|
|
return 0xff00;
|
|
|
|
|
|
|
|
case 0x02: /* DAC Volume Control */
|
|
|
|
return s->volume;
|
|
|
|
|
|
|
|
case 0x03:
|
|
|
|
return 0x8b00;
|
|
|
|
|
|
|
|
case 0x04: /* Audio Control 2 */
|
|
|
|
l_ch = 1;
|
|
|
|
r_ch = 1;
|
|
|
|
if (s->softstep && !(s->dac_power & (1 << 10))) {
|
2013-08-21 19:03:08 +04:00
|
|
|
l_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
|
2007-10-29 13:34:01 +03:00
|
|
|
s->volume_change + TSC_SOFTSTEP_DELAY);
|
2013-08-21 19:03:08 +04:00
|
|
|
r_ch = (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
|
2007-10-29 13:34:01 +03:00
|
|
|
s->volume_change + TSC_SOFTSTEP_DELAY);
|
|
|
|
}
|
|
|
|
|
|
|
|
return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
|
|
|
|
|
|
|
|
case 0x05: /* Stereo DAC Power Control */
|
|
|
|
return 0x2aa0 | s->dac_power |
|
|
|
|
(((s->dac_power & (1 << 10)) &&
|
2013-08-21 19:03:08 +04:00
|
|
|
(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >
|
2007-10-29 13:34:01 +03:00
|
|
|
s->powerdown + TSC_POWEROFF_DELAY)) << 6);
|
|
|
|
|
|
|
|
case 0x06: /* Audio Control 3 */
|
|
|
|
val = s->audio_ctrl3 | 0x0001;
|
|
|
|
s->audio_ctrl3 &= 0xff3f;
|
|
|
|
return val;
|
|
|
|
|
|
|
|
case 0x07: /* LCH_BASS_BOOST_N0 */
|
|
|
|
case 0x08: /* LCH_BASS_BOOST_N1 */
|
|
|
|
case 0x09: /* LCH_BASS_BOOST_N2 */
|
|
|
|
case 0x0a: /* LCH_BASS_BOOST_N3 */
|
|
|
|
case 0x0b: /* LCH_BASS_BOOST_N4 */
|
|
|
|
case 0x0c: /* LCH_BASS_BOOST_N5 */
|
|
|
|
case 0x0d: /* LCH_BASS_BOOST_D1 */
|
|
|
|
case 0x0e: /* LCH_BASS_BOOST_D2 */
|
|
|
|
case 0x0f: /* LCH_BASS_BOOST_D4 */
|
|
|
|
case 0x10: /* LCH_BASS_BOOST_D5 */
|
|
|
|
case 0x11: /* RCH_BASS_BOOST_N0 */
|
|
|
|
case 0x12: /* RCH_BASS_BOOST_N1 */
|
|
|
|
case 0x13: /* RCH_BASS_BOOST_N2 */
|
|
|
|
case 0x14: /* RCH_BASS_BOOST_N3 */
|
|
|
|
case 0x15: /* RCH_BASS_BOOST_N4 */
|
|
|
|
case 0x16: /* RCH_BASS_BOOST_N5 */
|
|
|
|
case 0x17: /* RCH_BASS_BOOST_D1 */
|
|
|
|
case 0x18: /* RCH_BASS_BOOST_D2 */
|
|
|
|
case 0x19: /* RCH_BASS_BOOST_D4 */
|
|
|
|
case 0x1a: /* RCH_BASS_BOOST_D5 */
|
|
|
|
return s->filter_data[reg - 0x07];
|
|
|
|
|
|
|
|
case 0x1b: /* PLL Programmability 1 */
|
|
|
|
return s->pll[0];
|
|
|
|
|
|
|
|
case 0x1c: /* PLL Programmability 2 */
|
|
|
|
return s->pll[1];
|
|
|
|
|
|
|
|
case 0x1d: /* Audio Control 4 */
|
|
|
|
return (!s->softstep) << 14;
|
|
|
|
|
|
|
|
default:
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_read: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
|
|
|
#endif
|
|
|
|
return 0xffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc2102_data_register_write(
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s, int reg, uint16_t value)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* X */
|
|
|
|
case 0x01: /* Y */
|
|
|
|
case 0x02: /* Z1 */
|
|
|
|
case 0x03: /* Z2 */
|
|
|
|
case 0x05: /* BAT1 */
|
|
|
|
case 0x06: /* BAT2 */
|
|
|
|
case 0x07: /* AUX1 */
|
|
|
|
case 0x08: /* AUX2 */
|
|
|
|
case 0x09: /* TEMP1 */
|
|
|
|
case 0x0a: /* TEMP2 */
|
|
|
|
return;
|
|
|
|
|
|
|
|
default:
|
2019-02-04 23:45:17 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_data_register_write: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc2102_control_register_write(
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s, int reg, uint16_t value)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* TSC ADC */
|
|
|
|
s->host_mode = value >> 15;
|
|
|
|
s->enabled = !(value & 0x4000);
|
|
|
|
if (s->busy && !s->enabled)
|
2013-08-21 19:03:08 +04:00
|
|
|
timer_del(s->timer);
|
2016-10-04 15:28:08 +03:00
|
|
|
s->busy = s->busy && s->enabled;
|
2007-10-29 13:34:01 +03:00
|
|
|
s->nextfunction = (value >> 10) & 0xf;
|
|
|
|
s->nextprecision = (value >> 8) & 3;
|
|
|
|
s->filter = value & 0xff;
|
|
|
|
return;
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
case 0x01: /* Status / Keypad Control */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
s->pin_func = value >> 14;
|
2018-12-14 01:37:37 +03:00
|
|
|
else {
|
2008-04-15 01:28:11 +04:00
|
|
|
s->kb.scan = (value >> 14) & 1;
|
|
|
|
s->kb.debounce = (value >> 11) & 7;
|
|
|
|
if (s->kb.intr && s->kb.scan) {
|
|
|
|
s->kb.intr = 0;
|
|
|
|
qemu_irq_raise(s->kbint);
|
|
|
|
}
|
|
|
|
}
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
case 0x02: /* DAC Control */
|
|
|
|
if ((s->model & 0xff00) == 0x2300) {
|
|
|
|
s->dac_power &= 0x7fff;
|
|
|
|
s->dac_power |= 0x8000 & value;
|
|
|
|
} else
|
|
|
|
goto bad_reg;
|
|
|
|
break;
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
case 0x03: /* Reference */
|
|
|
|
s->ref = value & 0x1f;
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x04: /* Reset */
|
|
|
|
if (value == 0xbb00) {
|
|
|
|
if (s->busy)
|
2013-08-21 19:03:08 +04:00
|
|
|
timer_del(s->timer);
|
2007-10-29 13:34:01 +03:00
|
|
|
tsc210x_reset(s);
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
} else {
|
|
|
|
fprintf(stderr, "tsc2102_control_register_write: "
|
|
|
|
"wrong value written into RESET\n");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x05: /* Configuration */
|
|
|
|
s->timing = value & 0x3f;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0x3f)
|
|
|
|
fprintf(stderr, "tsc2102_control_register_write: "
|
|
|
|
"wrong value written into CONFIG\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
case 0x06: /* Secondary configuration */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
goto bad_reg;
|
|
|
|
s->kb.mode = value >> 14;
|
|
|
|
s->pll[2] = value & 0x3ffff;
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x10: /* Keypad Mask */
|
|
|
|
if ((s->model & 0xff00) == 0x2100)
|
|
|
|
goto bad_reg;
|
|
|
|
s->kb.mask = value;
|
|
|
|
return;
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
default:
|
2008-04-15 01:28:11 +04:00
|
|
|
bad_reg:
|
2019-02-04 23:45:17 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_control_register_write: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc2102_audio_register_write(
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s, int reg, uint16_t value)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
switch (reg) {
|
|
|
|
case 0x00: /* Audio Control 1 */
|
|
|
|
s->audio_ctrl1 = value & 0x0f3f;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into Audio 1\n");
|
|
|
|
#endif
|
2007-11-19 06:43:51 +03:00
|
|
|
tsc2102_audio_rate_update(s);
|
2009-05-12 15:33:04 +04:00
|
|
|
tsc2102_audio_output_update(s);
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x01:
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value != 0xff00)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into reg 0x01\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x02: /* DAC Volume Control */
|
|
|
|
s->volume = value;
|
2013-08-21 19:03:08 +04:00
|
|
|
s->volume_change = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x03:
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value != 0x8b00)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into reg 0x03\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x04: /* Audio Control 2 */
|
|
|
|
s->audio_ctrl2 = value & 0xf7f2;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0xf7fd)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into Audio 2\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x05: /* Stereo DAC Power Control */
|
|
|
|
if ((value & ~s->dac_power) & (1 << 10))
|
2013-08-21 19:03:08 +04:00
|
|
|
s->powerdown = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
s->dac_power = value & 0x9543;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if ((value & ~0x9543) != 0x2aa0)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into Power\n");
|
|
|
|
#endif
|
2007-11-19 06:43:51 +03:00
|
|
|
tsc2102_audio_rate_update(s);
|
2009-05-12 15:33:04 +04:00
|
|
|
tsc2102_audio_output_update(s);
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x06: /* Audio Control 3 */
|
|
|
|
s->audio_ctrl3 &= 0x00c0;
|
|
|
|
s->audio_ctrl3 |= value & 0xf800;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0xf8c7)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into Audio 3\n");
|
|
|
|
#endif
|
2009-05-12 15:33:04 +04:00
|
|
|
tsc2102_audio_output_update(s);
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x07: /* LCH_BASS_BOOST_N0 */
|
|
|
|
case 0x08: /* LCH_BASS_BOOST_N1 */
|
|
|
|
case 0x09: /* LCH_BASS_BOOST_N2 */
|
|
|
|
case 0x0a: /* LCH_BASS_BOOST_N3 */
|
|
|
|
case 0x0b: /* LCH_BASS_BOOST_N4 */
|
|
|
|
case 0x0c: /* LCH_BASS_BOOST_N5 */
|
|
|
|
case 0x0d: /* LCH_BASS_BOOST_D1 */
|
|
|
|
case 0x0e: /* LCH_BASS_BOOST_D2 */
|
|
|
|
case 0x0f: /* LCH_BASS_BOOST_D4 */
|
|
|
|
case 0x10: /* LCH_BASS_BOOST_D5 */
|
|
|
|
case 0x11: /* RCH_BASS_BOOST_N0 */
|
|
|
|
case 0x12: /* RCH_BASS_BOOST_N1 */
|
|
|
|
case 0x13: /* RCH_BASS_BOOST_N2 */
|
|
|
|
case 0x14: /* RCH_BASS_BOOST_N3 */
|
|
|
|
case 0x15: /* RCH_BASS_BOOST_N4 */
|
|
|
|
case 0x16: /* RCH_BASS_BOOST_N5 */
|
|
|
|
case 0x17: /* RCH_BASS_BOOST_D1 */
|
|
|
|
case 0x18: /* RCH_BASS_BOOST_D2 */
|
|
|
|
case 0x19: /* RCH_BASS_BOOST_D4 */
|
|
|
|
case 0x1a: /* RCH_BASS_BOOST_D5 */
|
|
|
|
s->filter_data[reg - 0x07] = value;
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x1b: /* PLL Programmability 1 */
|
|
|
|
s->pll[0] = value & 0xfffc;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0xfffc)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into PLL 1\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x1c: /* PLL Programmability 2 */
|
|
|
|
s->pll[1] = value & 0xfffc;
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0xfffc)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into PLL 2\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
case 0x1d: /* Audio Control 4 */
|
|
|
|
s->softstep = !(value & 0x4000);
|
|
|
|
#ifdef TSC_VERBOSE
|
|
|
|
if (value & ~0x4000)
|
|
|
|
fprintf(stderr, "tsc2102_audio_register_write: "
|
|
|
|
"wrong value written into Audio 4\n");
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
|
|
|
|
default:
|
2019-02-04 23:45:17 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "tsc2102_audio_register_write: "
|
|
|
|
"no such register: 0x%02x\n", reg);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* This handles most of the chip logic. */
|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc210x_pin_update(TSC210xState *s)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
int64_t expires;
|
2016-10-04 15:28:08 +03:00
|
|
|
bool pin_state;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
switch (s->pin_func) {
|
|
|
|
case 0:
|
|
|
|
pin_state = s->pressure;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
pin_state = !!s->dav;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
default:
|
|
|
|
pin_state = s->pressure && !s->dav;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!s->enabled)
|
2016-10-04 15:28:08 +03:00
|
|
|
pin_state = false;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
if (pin_state != s->irq) {
|
|
|
|
s->irq = pin_state;
|
2007-11-03 03:41:31 +03:00
|
|
|
qemu_set_irq(s->pint, !s->irq);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (s->nextfunction) {
|
|
|
|
case TSC_MODE_XY_SCAN:
|
|
|
|
case TSC_MODE_XYZ_SCAN:
|
|
|
|
if (!s->pressure)
|
|
|
|
return;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TSC_MODE_X:
|
|
|
|
case TSC_MODE_Y:
|
|
|
|
case TSC_MODE_Z:
|
|
|
|
if (!s->pressure)
|
|
|
|
return;
|
|
|
|
/* Fall through */
|
|
|
|
case TSC_MODE_BAT1:
|
|
|
|
case TSC_MODE_BAT2:
|
|
|
|
case TSC_MODE_AUX:
|
|
|
|
case TSC_MODE_TEMP1:
|
|
|
|
case TSC_MODE_TEMP2:
|
|
|
|
if (s->dav)
|
2016-10-04 15:28:08 +03:00
|
|
|
s->enabled = false;
|
2007-10-29 13:34:01 +03:00
|
|
|
break;
|
|
|
|
|
|
|
|
case TSC_MODE_AUX_SCAN:
|
|
|
|
case TSC_MODE_PORT_SCAN:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TSC_MODE_NO_SCAN:
|
|
|
|
case TSC_MODE_XX_DRV:
|
|
|
|
case TSC_MODE_YY_DRV:
|
|
|
|
case TSC_MODE_YX_DRV:
|
|
|
|
default:
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
if (!s->enabled || s->busy || s->dav)
|
2007-10-29 13:34:01 +03:00
|
|
|
return;
|
|
|
|
|
2016-10-04 15:28:08 +03:00
|
|
|
s->busy = true;
|
2007-10-29 13:34:01 +03:00
|
|
|
s->precision = s->nextprecision;
|
|
|
|
s->function = s->nextfunction;
|
2016-03-21 19:02:30 +03:00
|
|
|
expires = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
|
|
|
|
(NANOSECONDS_PER_SECOND >> 10);
|
2013-08-21 19:03:08 +04:00
|
|
|
timer_mod(s->timer, expires);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static uint16_t tsc210x_read(TSC210xState *s)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
uint16_t ret = 0x0000;
|
|
|
|
|
|
|
|
if (!s->command)
|
|
|
|
fprintf(stderr, "tsc210x_read: SPI underrun!\n");
|
|
|
|
|
|
|
|
switch (s->page) {
|
|
|
|
case TSC_DATA_REGISTERS_PAGE:
|
|
|
|
ret = tsc2102_data_register_read(s, s->offset);
|
2008-04-15 01:28:11 +04:00
|
|
|
if (!s->dav)
|
|
|
|
qemu_irq_raise(s->davint);
|
2007-10-29 13:34:01 +03:00
|
|
|
break;
|
|
|
|
case TSC_CONTROL_REGISTERS_PAGE:
|
|
|
|
ret = tsc2102_control_register_read(s, s->offset);
|
|
|
|
break;
|
|
|
|
case TSC_AUDIO_REGISTERS_PAGE:
|
|
|
|
ret = tsc2102_audio_register_read(s, s->offset);
|
|
|
|
break;
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("tsc210x_read: wrong memory page\n");
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
tsc210x_pin_update(s);
|
|
|
|
|
|
|
|
/* Allow sequential reads. */
|
|
|
|
s->offset ++;
|
2016-10-04 15:28:08 +03:00
|
|
|
s->state = false;
|
2007-10-29 13:34:01 +03:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc210x_write(TSC210xState *s, uint16_t value)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* This is a two-state state machine for reading
|
|
|
|
* command and data every second time.
|
|
|
|
*/
|
|
|
|
if (!s->state) {
|
2016-10-04 15:28:08 +03:00
|
|
|
s->command = (value >> 15) != 0;
|
2007-10-29 13:34:01 +03:00
|
|
|
s->page = (value >> 11) & 0x0f;
|
|
|
|
s->offset = (value >> 5) & 0x3f;
|
2016-10-04 15:28:08 +03:00
|
|
|
s->state = true;
|
2007-10-29 13:34:01 +03:00
|
|
|
} else {
|
|
|
|
if (s->command)
|
|
|
|
fprintf(stderr, "tsc210x_write: SPI overrun!\n");
|
|
|
|
else
|
|
|
|
switch (s->page) {
|
|
|
|
case TSC_DATA_REGISTERS_PAGE:
|
|
|
|
tsc2102_data_register_write(s, s->offset, value);
|
|
|
|
break;
|
|
|
|
case TSC_CONTROL_REGISTERS_PAGE:
|
|
|
|
tsc2102_control_register_write(s, s->offset, value);
|
|
|
|
break;
|
|
|
|
case TSC_AUDIO_REGISTERS_PAGE:
|
|
|
|
tsc2102_audio_register_write(s, s->offset, value);
|
|
|
|
break;
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("tsc210x_write: wrong memory page\n");
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
tsc210x_pin_update(s);
|
2016-10-04 15:28:08 +03:00
|
|
|
s->state = false;
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-05-07 18:30:38 +04:00
|
|
|
uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
|
2008-04-15 01:28:11 +04:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = opaque;
|
2008-04-15 01:28:11 +04:00
|
|
|
uint32_t ret = 0;
|
|
|
|
|
hw/input/tsc210x: Don't abort on bad SPI word widths
The tsc210x doesn't support anything other than 16-bit reads on the
SPI bus, but the guest can program the SPI controller to attempt
them anyway. If this happens, don't abort QEMU, just log this as
a guest error.
This fixes our machine_arm_n8x0.py:N8x0Machine.test_n800
acceptance test, which hits this assertion.
The reason we hit the assertion is because the guest kernel thinks
there is a TSC2005 on this SPI bus address, not a TSC210x. (The n810
*does* have a TSC2005 at this address.) The TSC2005 supports the
24-bit accesses which the guest driver makes, and the TSC210x does
not (that is, our TSC210x emulation is not missing support for a word
width the hardware can handle). It's not clear whether the problem
here is that the guest kernel incorrectly thinks the n800 has the
same device at this SPI bus address as the n810, or that QEMU's n810
board model doesn't get the SPI devices right. At this late date
there no longer appears to be any reliable information on the web
about the hardware behaviour, but I am inclined to think this is a
guest kernel bug. In any case, we prefer not to abort QEMU for
guest-triggerable conditions, so logging the error is the right thing
to do.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/736
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20220221140750.514557-1-peter.maydell@linaro.org
2022-02-21 17:07:50 +03:00
|
|
|
if (len != 16) {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"%s: bad SPI word width %i\n", __func__, len);
|
|
|
|
return 0;
|
|
|
|
}
|
2008-05-07 18:30:38 +04:00
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
/* TODO: sequential reads etc - how do we make sure the host doesn't
|
|
|
|
* unintentionally read out a conversion result from a register while
|
|
|
|
* transmitting the command word of the next command? */
|
|
|
|
if (!value || (s->state && s->command))
|
|
|
|
ret = tsc210x_read(s);
|
|
|
|
if (value || (s->state && !s->command))
|
|
|
|
tsc210x_write(s, value);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
static void tsc210x_timer_tick(void *opaque)
|
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = opaque;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
/* Timer ticked -- a set of conversions has been finished. */
|
|
|
|
|
|
|
|
if (!s->busy)
|
|
|
|
return;
|
|
|
|
|
2016-10-04 15:28:08 +03:00
|
|
|
s->busy = false;
|
2007-10-29 13:34:01 +03:00
|
|
|
s->dav |= mode_regs[s->function];
|
|
|
|
tsc210x_pin_update(s);
|
2008-04-15 01:28:11 +04:00
|
|
|
qemu_irq_lower(s->davint);
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static void tsc210x_touchscreen_event(void *opaque,
|
|
|
|
int x, int y, int z, int buttons_state)
|
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = opaque;
|
2007-10-29 13:34:01 +03:00
|
|
|
int p = s->pressure;
|
|
|
|
|
|
|
|
if (buttons_state) {
|
|
|
|
s->x = x;
|
|
|
|
s->y = y;
|
|
|
|
}
|
|
|
|
s->pressure = !!buttons_state;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note: We would get better responsiveness in the guest by
|
|
|
|
* signaling TS events immediately, but for now we simulate
|
|
|
|
* the first conversion delay for sake of correctness.
|
|
|
|
*/
|
|
|
|
if (p != s->pressure)
|
|
|
|
tsc210x_pin_update(s);
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc210x_i2s_swallow(TSC210xState *s)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
|
|
|
|
if (s->dac_voice[0])
|
|
|
|
tsc210x_out_flush(s, s->codec.out.len);
|
|
|
|
else
|
|
|
|
s->codec.out.len = 0;
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
|
|
|
|
s->i2s_tx_rate = out;
|
|
|
|
s->i2s_rx_rate = in;
|
|
|
|
}
|
|
|
|
|
2017-09-25 14:29:12 +03:00
|
|
|
static int tsc210x_pre_save(void *opaque)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = (TSC210xState *) opaque;
|
2016-10-04 15:28:08 +03:00
|
|
|
s->now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
2017-09-25 14:29:12 +03:00
|
|
|
|
|
|
|
return 0;
|
2007-10-29 13:34:01 +03:00
|
|
|
}
|
|
|
|
|
2016-10-04 15:28:08 +03:00
|
|
|
static int tsc210x_post_load(void *opaque, int version_id)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = (TSC210xState *) opaque;
|
2013-08-21 19:03:08 +04:00
|
|
|
int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
2016-10-04 15:28:08 +03:00
|
|
|
if (s->function >= ARRAY_SIZE(mode_regs)) {
|
2014-04-03 20:52:09 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2016-10-04 15:28:08 +03:00
|
|
|
if (s->nextfunction >= ARRAY_SIZE(mode_regs)) {
|
2014-04-03 20:52:09 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2016-10-04 15:28:08 +03:00
|
|
|
if (s->precision >= ARRAY_SIZE(resolution)) {
|
2014-04-03 20:52:09 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2016-10-04 15:28:08 +03:00
|
|
|
if (s->nextprecision >= ARRAY_SIZE(resolution)) {
|
2014-04-03 20:52:09 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2016-10-04 15:28:08 +03:00
|
|
|
|
|
|
|
s->volume_change -= s->now;
|
|
|
|
s->volume_change += now;
|
|
|
|
s->powerdown -= s->now;
|
|
|
|
s->powerdown += now;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
2013-08-21 19:02:39 +04:00
|
|
|
s->busy = timer_pending(s->timer);
|
2007-11-03 03:41:31 +03:00
|
|
|
qemu_set_irq(s->pint, !s->irq);
|
2008-04-15 01:28:11 +04:00
|
|
|
qemu_set_irq(s->davint, !s->dav);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-10-04 15:28:08 +03:00
|
|
|
static VMStateField vmstatefields_tsc210x[] = {
|
|
|
|
VMSTATE_BOOL(enabled, TSC210xState),
|
|
|
|
VMSTATE_BOOL(host_mode, TSC210xState),
|
|
|
|
VMSTATE_BOOL(irq, TSC210xState),
|
|
|
|
VMSTATE_BOOL(command, TSC210xState),
|
|
|
|
VMSTATE_BOOL(pressure, TSC210xState),
|
|
|
|
VMSTATE_BOOL(softstep, TSC210xState),
|
|
|
|
VMSTATE_BOOL(state, TSC210xState),
|
|
|
|
VMSTATE_UINT16(dav, TSC210xState),
|
|
|
|
VMSTATE_INT32(x, TSC210xState),
|
|
|
|
VMSTATE_INT32(y, TSC210xState),
|
|
|
|
VMSTATE_UINT8(offset, TSC210xState),
|
|
|
|
VMSTATE_UINT8(page, TSC210xState),
|
|
|
|
VMSTATE_UINT8(filter, TSC210xState),
|
|
|
|
VMSTATE_UINT8(pin_func, TSC210xState),
|
|
|
|
VMSTATE_UINT8(ref, TSC210xState),
|
|
|
|
VMSTATE_UINT8(timing, TSC210xState),
|
|
|
|
VMSTATE_UINT8(noise, TSC210xState),
|
|
|
|
VMSTATE_UINT8(function, TSC210xState),
|
|
|
|
VMSTATE_UINT8(nextfunction, TSC210xState),
|
|
|
|
VMSTATE_UINT8(precision, TSC210xState),
|
|
|
|
VMSTATE_UINT8(nextprecision, TSC210xState),
|
|
|
|
VMSTATE_UINT16(audio_ctrl1, TSC210xState),
|
|
|
|
VMSTATE_UINT16(audio_ctrl2, TSC210xState),
|
|
|
|
VMSTATE_UINT16(audio_ctrl3, TSC210xState),
|
|
|
|
VMSTATE_UINT16_ARRAY(pll, TSC210xState, 3),
|
|
|
|
VMSTATE_UINT16(volume, TSC210xState),
|
|
|
|
VMSTATE_UINT16(dac_power, TSC210xState),
|
|
|
|
VMSTATE_INT64(volume_change, TSC210xState),
|
|
|
|
VMSTATE_INT64(powerdown, TSC210xState),
|
|
|
|
VMSTATE_INT64(now, TSC210xState),
|
|
|
|
VMSTATE_UINT16_ARRAY(filter_data, TSC210xState, 0x14),
|
|
|
|
VMSTATE_TIMER_PTR(timer, TSC210xState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_tsc2102 = {
|
|
|
|
.name = "tsc2102",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.pre_save = tsc210x_pre_save,
|
|
|
|
.post_load = tsc210x_post_load,
|
|
|
|
.fields = vmstatefields_tsc210x,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_tsc2301 = {
|
|
|
|
.name = "tsc2301",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.pre_save = tsc210x_pre_save,
|
|
|
|
.post_load = tsc210x_post_load,
|
|
|
|
.fields = vmstatefields_tsc210x,
|
|
|
|
};
|
|
|
|
|
2009-05-12 15:33:04 +04:00
|
|
|
uWireSlave *tsc2102_init(qemu_irq pint)
|
2007-10-29 13:34:01 +03:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s;
|
2007-10-29 13:34:01 +03:00
|
|
|
|
2015-10-09 18:56:36 +03:00
|
|
|
s = g_new0(TSC210xState, 1);
|
2007-10-29 13:34:01 +03:00
|
|
|
s->x = 160;
|
|
|
|
s->y = 160;
|
|
|
|
s->pressure = 0;
|
|
|
|
s->precision = s->nextprecision = 0;
|
2013-08-21 19:03:08 +04:00
|
|
|
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
|
2007-10-29 13:34:01 +03:00
|
|
|
s->pint = pint;
|
2008-04-15 01:28:11 +04:00
|
|
|
s->model = 0x2102;
|
2007-11-05 01:53:50 +03:00
|
|
|
s->name = "tsc2102";
|
2007-10-29 13:34:01 +03:00
|
|
|
|
2008-04-15 01:28:11 +04:00
|
|
|
s->tr[0] = 0;
|
|
|
|
s->tr[1] = 1;
|
2008-05-07 18:30:38 +04:00
|
|
|
s->tr[2] = 1;
|
|
|
|
s->tr[3] = 0;
|
2008-04-15 01:28:11 +04:00
|
|
|
s->tr[4] = 1;
|
|
|
|
s->tr[5] = 0;
|
2008-05-07 18:30:38 +04:00
|
|
|
s->tr[6] = 1;
|
|
|
|
s->tr[7] = 0;
|
2008-04-15 01:28:11 +04:00
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
s->chip.opaque = s;
|
|
|
|
s->chip.send = (void *) tsc210x_write;
|
|
|
|
s->chip.receive = (void *) tsc210x_read;
|
|
|
|
|
2007-11-05 01:53:50 +03:00
|
|
|
s->codec.opaque = s;
|
|
|
|
s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
|
|
|
|
s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
|
|
|
|
s->codec.in.fifo = s->in_fifo;
|
|
|
|
s->codec.out.fifo = s->out_fifo;
|
|
|
|
|
2007-10-29 13:34:01 +03:00
|
|
|
tsc210x_reset(s);
|
|
|
|
|
|
|
|
qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
|
|
|
|
"QEMU TSC2102-driven Touchscreen");
|
|
|
|
|
2009-05-14 03:11:35 +04:00
|
|
|
AUD_register_card(s->name, &s->card);
|
2007-11-05 01:53:50 +03:00
|
|
|
|
2009-06-27 11:25:07 +04:00
|
|
|
qemu_register_reset((void *) tsc210x_reset, s);
|
2016-10-04 15:28:08 +03:00
|
|
|
vmstate_register(NULL, 0, &vmstate_tsc2102, s);
|
2007-10-29 13:34:01 +03:00
|
|
|
|
|
|
|
return &s->chip;
|
|
|
|
}
|
2007-11-05 01:53:50 +03:00
|
|
|
|
2009-05-12 15:33:04 +04:00
|
|
|
uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
|
2008-04-15 01:28:11 +04:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s;
|
2008-04-15 01:28:11 +04:00
|
|
|
|
2015-10-09 18:56:36 +03:00
|
|
|
s = g_new0(TSC210xState, 1);
|
2008-04-15 01:28:11 +04:00
|
|
|
s->x = 400;
|
|
|
|
s->y = 240;
|
|
|
|
s->pressure = 0;
|
|
|
|
s->precision = s->nextprecision = 0;
|
2013-08-21 19:03:08 +04:00
|
|
|
s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, tsc210x_timer_tick, s);
|
2008-04-15 01:28:11 +04:00
|
|
|
s->pint = penirq;
|
|
|
|
s->kbint = kbirq;
|
|
|
|
s->davint = dav;
|
|
|
|
s->model = 0x2301;
|
|
|
|
s->name = "tsc2301";
|
|
|
|
|
|
|
|
s->tr[0] = 0;
|
|
|
|
s->tr[1] = 1;
|
2008-05-07 18:30:38 +04:00
|
|
|
s->tr[2] = 1;
|
|
|
|
s->tr[3] = 0;
|
2008-04-15 01:28:11 +04:00
|
|
|
s->tr[4] = 1;
|
|
|
|
s->tr[5] = 0;
|
2008-05-07 18:30:38 +04:00
|
|
|
s->tr[6] = 1;
|
|
|
|
s->tr[7] = 0;
|
2008-04-15 01:28:11 +04:00
|
|
|
|
|
|
|
s->chip.opaque = s;
|
|
|
|
s->chip.send = (void *) tsc210x_write;
|
|
|
|
s->chip.receive = (void *) tsc210x_read;
|
|
|
|
|
|
|
|
s->codec.opaque = s;
|
|
|
|
s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
|
|
|
|
s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
|
|
|
|
s->codec.in.fifo = s->in_fifo;
|
|
|
|
s->codec.out.fifo = s->out_fifo;
|
|
|
|
|
|
|
|
tsc210x_reset(s);
|
|
|
|
|
|
|
|
qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
|
|
|
|
"QEMU TSC2301-driven Touchscreen");
|
|
|
|
|
2009-05-14 03:11:35 +04:00
|
|
|
AUD_register_card(s->name, &s->card);
|
2008-04-15 01:28:11 +04:00
|
|
|
|
2009-06-27 11:25:07 +04:00
|
|
|
qemu_register_reset((void *) tsc210x_reset, s);
|
2016-10-04 15:28:08 +03:00
|
|
|
vmstate_register(NULL, 0, &vmstate_tsc2301, s);
|
2008-04-15 01:28:11 +04:00
|
|
|
|
|
|
|
return &s->chip;
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
I2SCodec *tsc210x_codec(uWireSlave *chip)
|
2007-11-05 01:53:50 +03:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = (TSC210xState *) chip->opaque;
|
2007-11-05 01:53:50 +03:00
|
|
|
|
|
|
|
return &s->codec;
|
|
|
|
}
|
2008-04-15 01:28:11 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Use tslib generated calibration data to generate ADC input values
|
|
|
|
* from the touchscreen. Assuming 12-bit precision was used during
|
|
|
|
* tslib calibration.
|
|
|
|
*/
|
2022-12-20 17:25:18 +03:00
|
|
|
void tsc210x_set_transform(uWireSlave *chip, const MouseTransformInfo *info)
|
2008-04-15 01:28:11 +04:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = (TSC210xState *) chip->opaque;
|
2008-04-15 01:28:11 +04:00
|
|
|
#if 0
|
|
|
|
int64_t ltr[8];
|
|
|
|
|
|
|
|
ltr[0] = (int64_t) info->a[1] * info->y;
|
|
|
|
ltr[1] = (int64_t) info->a[4] * info->x;
|
|
|
|
ltr[2] = (int64_t) info->a[1] * info->a[3] -
|
|
|
|
(int64_t) info->a[4] * info->a[0];
|
|
|
|
ltr[3] = (int64_t) info->a[2] * info->a[4] -
|
|
|
|
(int64_t) info->a[5] * info->a[1];
|
|
|
|
ltr[4] = (int64_t) info->a[0] * info->y;
|
|
|
|
ltr[5] = (int64_t) info->a[3] * info->x;
|
|
|
|
ltr[6] = (int64_t) info->a[4] * info->a[0] -
|
|
|
|
(int64_t) info->a[1] * info->a[3];
|
|
|
|
ltr[7] = (int64_t) info->a[2] * info->a[3] -
|
|
|
|
(int64_t) info->a[5] * info->a[0];
|
|
|
|
|
|
|
|
/* Avoid integer overflow */
|
|
|
|
s->tr[0] = ltr[0] >> 11;
|
|
|
|
s->tr[1] = ltr[1] >> 11;
|
|
|
|
s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
|
|
|
|
s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
|
|
|
|
s->tr[4] = ltr[4] >> 11;
|
|
|
|
s->tr[5] = ltr[5] >> 11;
|
|
|
|
s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
|
|
|
|
s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
|
|
|
|
#else
|
|
|
|
|
|
|
|
/* This version assumes touchscreen X & Y axis are parallel or
|
|
|
|
* perpendicular to LCD's X & Y axis in some way. */
|
|
|
|
if (abs(info->a[0]) > abs(info->a[1])) {
|
|
|
|
s->tr[0] = 0;
|
|
|
|
s->tr[1] = -info->a[6] * info->x;
|
|
|
|
s->tr[2] = info->a[0];
|
|
|
|
s->tr[3] = -info->a[2] / info->a[0];
|
|
|
|
s->tr[4] = info->a[6] * info->y;
|
|
|
|
s->tr[5] = 0;
|
|
|
|
s->tr[6] = info->a[4];
|
|
|
|
s->tr[7] = -info->a[5] / info->a[4];
|
|
|
|
} else {
|
|
|
|
s->tr[0] = info->a[6] * info->y;
|
|
|
|
s->tr[1] = 0;
|
|
|
|
s->tr[2] = info->a[1];
|
|
|
|
s->tr[3] = -info->a[2] / info->a[1];
|
|
|
|
s->tr[4] = 0;
|
|
|
|
s->tr[5] = -info->a[6] * info->x;
|
|
|
|
s->tr[6] = info->a[3];
|
|
|
|
s->tr[7] = -info->a[5] / info->a[3];
|
|
|
|
}
|
|
|
|
|
|
|
|
s->tr[0] >>= 11;
|
|
|
|
s->tr[1] >>= 11;
|
|
|
|
s->tr[3] <<= 4;
|
|
|
|
s->tr[4] >>= 11;
|
|
|
|
s->tr[5] >>= 11;
|
|
|
|
s->tr[7] <<= 4;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2009-05-10 04:44:56 +04:00
|
|
|
void tsc210x_key_event(uWireSlave *chip, int key, int down)
|
2008-04-15 01:28:11 +04:00
|
|
|
{
|
2009-05-10 04:44:56 +04:00
|
|
|
TSC210xState *s = (TSC210xState *) chip->opaque;
|
2008-04-15 01:28:11 +04:00
|
|
|
|
|
|
|
if (down)
|
|
|
|
s->kb.down |= 1 << key;
|
|
|
|
else
|
|
|
|
s->kb.down &= ~(1 << key);
|
|
|
|
|
|
|
|
if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
|
|
|
|
s->kb.intr = 1;
|
|
|
|
qemu_irq_lower(s->kbint);
|
|
|
|
} else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
|
|
|
|
!(s->kb.mode & 1)) {
|
|
|
|
s->kb.intr = 0;
|
|
|
|
qemu_irq_raise(s->kbint);
|
|
|
|
}
|
|
|
|
}
|