qemu/target/riscv/cpu_vendorid.h

#ifndef TARGET_RISCV_CPU_VENDORID_H
#define TARGET_RISCV_CPU_VENDORID_H

#define THEAD_VENDOR_ID         0x5b7

#endif /*  TARGET_RISCV_CPU_VENDORID_H */
RISC-V: Add initial support for T-Head C906 This patch adds the T-Head C906 to the list of known CPUs. Selecting this CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-Id: <20230131202013.2541053-13-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> 2023-01-31 23:20:11 +03:00			`#ifndef TARGET_RISCV_CPU_VENDORID_H`
			`#define TARGET_RISCV_CPU_VENDORID_H`

			`#define THEAD_VENDOR_ID 0x5b7`

			`#endif /* TARGET_RISCV_CPU_VENDORID_H */`