2018-04-24 22:26:16 +03:00
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/*
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* Emulation of Linux signals
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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2018-04-24 22:26:32 +03:00
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "signal-common.h"
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#include "linux-user/trace.h"
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2021-04-26 05:53:23 +03:00
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/* A Sparc register window */
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struct target_reg_window {
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2018-04-24 22:26:32 +03:00
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abi_ulong locals[8];
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abi_ulong ins[8];
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2021-04-26 05:53:23 +03:00
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};
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/* A Sparc stack frame. */
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struct target_stackf {
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/*
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* Since qemu does not reference fp or callers_pc directly,
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* it's simpler to treat fp and callers_pc as elements of ins[],
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* and then bundle locals[] and ins[] into reg_window.
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*/
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struct target_reg_window win;
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/*
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* Similarly, bundle structptr and xxargs into xargs[].
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* This portion of the struct is part of the function call abi,
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* and belongs to the callee for spilling argument registers.
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*/
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abi_ulong xargs[8];
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2018-04-24 22:26:32 +03:00
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};
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2021-04-26 05:53:27 +03:00
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struct target_siginfo_fpu {
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/* It is more convenient for qemu to move doubles, not singles. */
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uint64_t si_double_regs[16];
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uint32_t si_fsr;
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uint32_t si_fpqdepth;
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2018-04-24 22:26:32 +03:00
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struct {
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2021-04-26 05:53:27 +03:00
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uint32_t insn_addr;
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uint32_t insn;
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2018-04-24 22:26:32 +03:00
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} si_fpqueue [16];
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2021-04-26 05:53:27 +03:00
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};
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2018-04-24 22:26:32 +03:00
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struct target_signal_frame {
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2021-04-26 05:53:23 +03:00
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struct target_stackf ss;
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2021-04-26 05:53:24 +03:00
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struct target_pt_regs regs;
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2021-04-26 05:53:27 +03:00
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uint32_t si_mask;
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abi_ulong fpu_save;
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uint32_t insns[2] QEMU_ALIGNED(8);
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abi_ulong extramask[TARGET_NSIG_WORDS - 1];
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abi_ulong extra_size; /* Should be 0 */
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2021-04-26 05:53:28 +03:00
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abi_ulong rwin_save;
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2018-04-24 22:26:32 +03:00
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};
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2021-04-26 05:53:26 +03:00
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static abi_ulong get_sigframe(struct target_sigaction *sa,
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CPUSPARCState *env,
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size_t framesize)
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2018-04-24 22:26:32 +03:00
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{
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2018-04-11 22:23:47 +03:00
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abi_ulong sp = get_sp_from_cpustate(env);
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2018-04-24 22:26:32 +03:00
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2018-04-11 22:23:47 +03:00
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/*
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* If we are on the alternate signal stack and would overflow it, don't.
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* Return an always-bogus address instead so we will die with SIGSEGV.
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2021-04-26 05:53:26 +03:00
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*/
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2018-04-11 22:23:47 +03:00
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if (on_sig_stack(sp) && !likely(on_sig_stack(sp - framesize))) {
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2021-04-26 05:53:26 +03:00
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return -1;
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2018-04-11 22:23:47 +03:00
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}
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2018-04-24 22:26:32 +03:00
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/* This is the X/Open sanctioned signal stack switching. */
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2018-04-11 22:23:47 +03:00
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sp = target_sigsp(sp, sa) - framesize;
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2021-04-26 05:53:26 +03:00
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/*
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* Always align the stack frame. This handles two cases. First,
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2018-04-11 22:23:47 +03:00
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* sigaltstack need not be mindful of platform specific stack
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* alignment. Second, if we took this signal because the stack
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* is not aligned properly, we'd like to take the signal cleanly
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* and report that.
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*/
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sp &= ~15UL;
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return sp;
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2018-04-24 22:26:32 +03:00
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}
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2021-04-26 05:53:24 +03:00
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static void save_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env)
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2018-04-24 22:26:32 +03:00
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{
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2021-04-26 05:53:24 +03:00
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int i;
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
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__put_user(sparc64_tstate(env), ®s->tstate);
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/* TODO: magic should contain PT_REG_MAGIC + %tt. */
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__put_user(0, ®s->magic);
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#else
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__put_user(cpu_get_psr(env), ®s->psr);
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#endif
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__put_user(env->pc, ®s->pc);
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__put_user(env->npc, ®s->npc);
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__put_user(env->y, ®s->y);
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for (i = 0; i < 8; i++) {
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__put_user(env->gregs[i], ®s->u_regs[i]);
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2018-04-24 22:26:32 +03:00
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}
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2021-04-26 05:53:24 +03:00
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for (i = 0; i < 8; i++) {
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__put_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]);
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}
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}
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static void restore_pt_regs(struct target_pt_regs *regs, CPUSPARCState *env)
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{
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int i;
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#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
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/* User can only change condition codes and %asi in %tstate. */
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uint64_t tstate;
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__get_user(tstate, ®s->tstate);
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cpu_put_ccr(env, tstate >> 32);
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env->asi = extract64(tstate, 24, 8);
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#else
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/*
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* User can only change condition codes and FPU enabling in %psr.
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* But don't bother with FPU enabling, since a real kernel would
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* just re-enable the FPU upon the next fpu trap.
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*/
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uint32_t psr;
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__get_user(psr, ®s->psr);
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env->psr = (psr & PSR_ICC) | (env->psr & ~PSR_ICC);
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#endif
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/* Note that pc and npc are handled in the caller. */
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__get_user(env->y, ®s->y);
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for (i = 0; i < 8; i++) {
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__get_user(env->gregs[i], ®s->u_regs[i]);
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}
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for (i = 0; i < 8; i++) {
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__get_user(env->regwptr[WREG_O0 + i], ®s->u_regs[i + 8]);
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2018-04-24 22:26:32 +03:00
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}
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}
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2021-04-26 05:53:25 +03:00
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static void save_reg_win(struct target_reg_window *win, CPUSPARCState *env)
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{
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int i;
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for (i = 0; i < 8; i++) {
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__put_user(env->regwptr[i + WREG_L0], &win->locals[i]);
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}
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for (i = 0; i < 8; i++) {
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__put_user(env->regwptr[i + WREG_I0], &win->ins[i]);
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}
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}
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2021-04-26 05:53:27 +03:00
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static void save_fpu(struct target_siginfo_fpu *fpu, CPUSPARCState *env)
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{
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int i;
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for (i = 0; i < 16; ++i) {
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__put_user(env->fpr[i].ll, &fpu->si_double_regs[i]);
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}
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__put_user(env->fsr, &fpu->si_fsr);
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__put_user(0, &fpu->si_fpqdepth);
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}
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static void restore_fpu(struct target_siginfo_fpu *fpu, CPUSPARCState *env)
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{
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int i;
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for (i = 0; i < 16; ++i) {
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__get_user(env->fpr[i].ll, &fpu->si_double_regs[i]);
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}
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__get_user(env->fsr, &fpu->si_fsr);
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}
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2018-04-24 22:26:32 +03:00
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void setup_frame(int sig, struct target_sigaction *ka,
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target_sigset_t *set, CPUSPARCState *env)
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{
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abi_ulong sf_addr;
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struct target_signal_frame *sf;
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2021-04-26 05:53:27 +03:00
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size_t sf_size = sizeof(*sf) + sizeof(struct target_siginfo_fpu);
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int i;
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2018-04-24 22:26:32 +03:00
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2021-04-26 05:53:27 +03:00
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sf_addr = get_sigframe(ka, env, sf_size);
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2018-04-24 22:26:32 +03:00
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trace_user_setup_frame(env, sf_addr);
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2021-04-26 05:53:27 +03:00
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sf = lock_user(VERIFY_WRITE, sf_addr, sf_size, 0);
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2018-04-24 22:26:32 +03:00
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if (!sf) {
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2021-04-26 05:53:29 +03:00
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force_sigsegv(sig);
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return;
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2018-04-24 22:26:32 +03:00
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}
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2021-04-26 05:53:27 +03:00
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2018-04-24 22:26:32 +03:00
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/* 2. Save the current process state */
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2021-04-26 05:53:24 +03:00
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save_pt_regs(&sf->regs, env);
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2018-04-24 22:26:32 +03:00
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__put_user(0, &sf->extra_size);
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2021-04-26 05:53:27 +03:00
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save_fpu((struct target_siginfo_fpu *)(sf + 1), env);
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__put_user(sf_addr + sizeof(*sf), &sf->fpu_save);
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2018-04-24 22:26:32 +03:00
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2021-04-26 05:53:28 +03:00
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__put_user(0, &sf->rwin_save); /* TODO: save_rwin_state */
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2021-04-26 05:53:24 +03:00
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__put_user(set->sig[0], &sf->si_mask);
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2018-04-24 22:26:32 +03:00
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for (i = 0; i < TARGET_NSIG_WORDS - 1; i++) {
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__put_user(set->sig[i + 1], &sf->extramask[i]);
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}
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2021-04-26 05:53:25 +03:00
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save_reg_win(&sf->ss.win, env);
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2018-04-24 22:26:32 +03:00
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/* 3. signal handler back-trampoline and parameters */
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2019-11-06 14:33:12 +03:00
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env->regwptr[WREG_SP] = sf_addr;
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2019-11-06 14:33:11 +03:00
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env->regwptr[WREG_O0] = sig;
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env->regwptr[WREG_O1] = sf_addr +
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2021-04-26 05:53:24 +03:00
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offsetof(struct target_signal_frame, regs);
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2019-11-06 14:33:11 +03:00
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env->regwptr[WREG_O2] = sf_addr +
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2021-04-26 05:53:24 +03:00
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offsetof(struct target_signal_frame, regs);
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2018-04-24 22:26:32 +03:00
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/* 4. signal handler */
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env->pc = ka->_sa_handler;
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2021-04-26 05:53:29 +03:00
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env->npc = env->pc + 4;
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2018-04-24 22:26:32 +03:00
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/* 5. return to kernel instructions */
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if (ka->ka_restorer) {
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2019-11-06 14:33:11 +03:00
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env->regwptr[WREG_O7] = ka->ka_restorer;
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2018-04-24 22:26:32 +03:00
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} else {
|
2019-11-06 14:33:11 +03:00
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env->regwptr[WREG_O7] = sf_addr +
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2018-04-24 22:26:32 +03:00
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offsetof(struct target_signal_frame, insns) - 2 * 4;
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/* mov __NR_sigreturn, %g1 */
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2021-04-26 05:53:29 +03:00
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__put_user(0x821020d8u, &sf->insns[0]);
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2018-04-24 22:26:32 +03:00
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/* t 0x10 */
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2021-04-26 05:53:29 +03:00
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__put_user(0x91d02010u, &sf->insns[1]);
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2018-04-24 22:26:32 +03:00
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}
|
2021-04-26 05:53:27 +03:00
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unlock_user(sf, sf_addr, sf_size);
|
2018-04-24 22:26:32 +03:00
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}
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void setup_rt_frame(int sig, struct target_sigaction *ka,
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target_siginfo_t *info,
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target_sigset_t *set, CPUSPARCState *env)
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{
|
2018-07-06 18:51:26 +03:00
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qemu_log_mask(LOG_UNIMP, "setup_rt_frame: not implemented\n");
|
2018-04-24 22:26:32 +03:00
|
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}
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long do_sigreturn(CPUSPARCState *env)
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|
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{
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abi_ulong sf_addr;
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struct target_signal_frame *sf;
|
2021-04-26 05:53:27 +03:00
|
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abi_ulong pc, npc, ptr;
|
2018-04-24 22:26:32 +03:00
|
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target_sigset_t set;
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sigset_t host_set;
|
2018-11-15 14:46:16 +03:00
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int i;
|
2018-04-24 22:26:32 +03:00
|
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|
|
2019-11-06 14:33:12 +03:00
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sf_addr = env->regwptr[WREG_SP];
|
2018-04-24 22:26:32 +03:00
|
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trace_user_do_sigreturn(env, sf_addr);
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if (!lock_user_struct(VERIFY_READ, sf, sf_addr, 1)) {
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goto segv_and_exit;
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}
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/* 1. Make sure we are not getting garbage from the user */
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if (sf_addr & 3)
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goto segv_and_exit;
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|
2021-04-26 05:53:24 +03:00
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__get_user(pc, &sf->regs.pc);
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__get_user(npc, &sf->regs.npc);
|
2018-04-24 22:26:32 +03:00
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if ((pc | npc) & 3) {
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goto segv_and_exit;
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}
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|
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|
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/* 2. Restore the state */
|
2021-04-26 05:53:24 +03:00
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restore_pt_regs(&sf->regs, env);
|
2018-04-24 22:26:32 +03:00
|
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env->pc = pc;
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env->npc = npc;
|
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|
|
2021-04-26 05:53:27 +03:00
|
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__get_user(ptr, &sf->fpu_save);
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if (ptr) {
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struct target_siginfo_fpu *fpu;
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if ((ptr & 3) || !lock_user_struct(VERIFY_READ, fpu, ptr, 1)) {
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|
|
goto segv_and_exit;
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|
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}
|
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|
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restore_fpu(fpu, env);
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|
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unlock_user_struct(fpu, ptr, 0);
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|
|
|
}
|
2018-04-24 22:26:32 +03:00
|
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|
|
2021-04-26 05:53:28 +03:00
|
|
|
__get_user(ptr, &sf->rwin_save);
|
|
|
|
if (ptr) {
|
|
|
|
goto segv_and_exit; /* TODO: restore_rwin */
|
|
|
|
}
|
|
|
|
|
2021-04-26 05:53:24 +03:00
|
|
|
__get_user(set.sig[0], &sf->si_mask);
|
|
|
|
for (i = 1; i < TARGET_NSIG_WORDS; i++) {
|
2018-04-24 22:26:32 +03:00
|
|
|
__get_user(set.sig[i], &sf->extramask[i - 1]);
|
|
|
|
}
|
|
|
|
|
|
|
|
target_to_host_sigset_internal(&host_set, &set);
|
|
|
|
set_sigmask(&host_set);
|
|
|
|
|
|
|
|
unlock_user_struct(sf, sf_addr, 0);
|
|
|
|
return -TARGET_QEMU_ESIGRETURN;
|
|
|
|
|
|
|
|
segv_and_exit:
|
|
|
|
unlock_user_struct(sf, sf_addr, 0);
|
|
|
|
force_sig(TARGET_SIGSEGV);
|
|
|
|
return -TARGET_QEMU_ESIGRETURN;
|
|
|
|
}
|
|
|
|
|
|
|
|
long do_rt_sigreturn(CPUSPARCState *env)
|
|
|
|
{
|
|
|
|
trace_user_do_rt_sigreturn(env, 0);
|
2018-07-06 18:51:26 +03:00
|
|
|
qemu_log_mask(LOG_UNIMP, "do_rt_sigreturn: not implemented\n");
|
2018-04-24 22:26:32 +03:00
|
|
|
return -TARGET_ENOSYS;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
|
|
|
#define SPARC_MC_TSTATE 0
|
|
|
|
#define SPARC_MC_PC 1
|
|
|
|
#define SPARC_MC_NPC 2
|
|
|
|
#define SPARC_MC_Y 3
|
|
|
|
#define SPARC_MC_G1 4
|
|
|
|
#define SPARC_MC_G2 5
|
|
|
|
#define SPARC_MC_G3 6
|
|
|
|
#define SPARC_MC_G4 7
|
|
|
|
#define SPARC_MC_G5 8
|
|
|
|
#define SPARC_MC_G6 9
|
|
|
|
#define SPARC_MC_G7 10
|
|
|
|
#define SPARC_MC_O0 11
|
|
|
|
#define SPARC_MC_O1 12
|
|
|
|
#define SPARC_MC_O2 13
|
|
|
|
#define SPARC_MC_O3 14
|
|
|
|
#define SPARC_MC_O4 15
|
|
|
|
#define SPARC_MC_O5 16
|
|
|
|
#define SPARC_MC_O6 17
|
|
|
|
#define SPARC_MC_O7 18
|
|
|
|
#define SPARC_MC_NGREG 19
|
|
|
|
|
|
|
|
typedef abi_ulong target_mc_greg_t;
|
|
|
|
typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG];
|
|
|
|
|
|
|
|
struct target_mc_fq {
|
2020-11-06 00:23:12 +03:00
|
|
|
abi_ulong mcfq_addr;
|
2018-04-24 22:26:32 +03:00
|
|
|
uint32_t mcfq_insn;
|
|
|
|
};
|
|
|
|
|
2020-11-06 00:23:12 +03:00
|
|
|
/*
|
|
|
|
* Note the manual 16-alignment; the kernel gets this because it
|
|
|
|
* includes a "long double qregs[16]" in the mcpu_fregs union,
|
|
|
|
* which we can't do.
|
|
|
|
*/
|
2018-04-24 22:26:32 +03:00
|
|
|
struct target_mc_fpu {
|
|
|
|
union {
|
|
|
|
uint32_t sregs[32];
|
|
|
|
uint64_t dregs[32];
|
|
|
|
//uint128_t qregs[16];
|
|
|
|
} mcfpu_fregs;
|
|
|
|
abi_ulong mcfpu_fsr;
|
|
|
|
abi_ulong mcfpu_fprs;
|
|
|
|
abi_ulong mcfpu_gsr;
|
2020-11-06 00:23:12 +03:00
|
|
|
abi_ulong mcfpu_fq;
|
2018-04-24 22:26:32 +03:00
|
|
|
unsigned char mcfpu_qcnt;
|
|
|
|
unsigned char mcfpu_qentsz;
|
|
|
|
unsigned char mcfpu_enab;
|
2020-11-06 00:23:12 +03:00
|
|
|
} __attribute__((aligned(16)));
|
2018-04-24 22:26:32 +03:00
|
|
|
typedef struct target_mc_fpu target_mc_fpu_t;
|
|
|
|
|
|
|
|
typedef struct {
|
|
|
|
target_mc_gregset_t mc_gregs;
|
|
|
|
target_mc_greg_t mc_fp;
|
|
|
|
target_mc_greg_t mc_i7;
|
|
|
|
target_mc_fpu_t mc_fpregs;
|
|
|
|
} target_mcontext_t;
|
|
|
|
|
|
|
|
struct target_ucontext {
|
2020-11-06 00:23:12 +03:00
|
|
|
abi_ulong tuc_link;
|
2018-04-24 22:26:32 +03:00
|
|
|
abi_ulong tuc_flags;
|
|
|
|
target_sigset_t tuc_sigmask;
|
|
|
|
target_mcontext_t tuc_mcontext;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* {set, get}context() needed for 64-bit SparcLinux userland. */
|
|
|
|
void sparc64_set_context(CPUSPARCState *env)
|
|
|
|
{
|
|
|
|
abi_ulong ucp_addr;
|
|
|
|
struct target_ucontext *ucp;
|
|
|
|
target_mc_gregset_t *grp;
|
2020-11-06 18:27:35 +03:00
|
|
|
target_mc_fpu_t *fpup;
|
2018-04-24 22:26:32 +03:00
|
|
|
abi_ulong pc, npc, tstate;
|
|
|
|
unsigned int i;
|
2020-11-06 18:27:35 +03:00
|
|
|
unsigned char fenab;
|
2018-04-24 22:26:32 +03:00
|
|
|
|
2019-11-06 14:33:11 +03:00
|
|
|
ucp_addr = env->regwptr[WREG_O0];
|
2018-04-24 22:26:32 +03:00
|
|
|
if (!lock_user_struct(VERIFY_READ, ucp, ucp_addr, 1)) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
|
|
|
grp = &ucp->tuc_mcontext.mc_gregs;
|
|
|
|
__get_user(pc, &((*grp)[SPARC_MC_PC]));
|
|
|
|
__get_user(npc, &((*grp)[SPARC_MC_NPC]));
|
|
|
|
if ((pc | npc) & 3) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
2019-11-06 14:33:11 +03:00
|
|
|
if (env->regwptr[WREG_O1]) {
|
2018-04-24 22:26:32 +03:00
|
|
|
target_sigset_t target_set;
|
|
|
|
sigset_t set;
|
|
|
|
|
|
|
|
if (TARGET_NSIG_WORDS == 1) {
|
|
|
|
__get_user(target_set.sig[0], &ucp->tuc_sigmask.sig[0]);
|
|
|
|
} else {
|
|
|
|
abi_ulong *src, *dst;
|
|
|
|
src = ucp->tuc_sigmask.sig;
|
|
|
|
dst = target_set.sig;
|
|
|
|
for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) {
|
|
|
|
__get_user(*dst, src);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
target_to_host_sigset_internal(&set, &target_set);
|
|
|
|
set_sigmask(&set);
|
|
|
|
}
|
|
|
|
env->pc = pc;
|
|
|
|
env->npc = npc;
|
|
|
|
__get_user(env->y, &((*grp)[SPARC_MC_Y]));
|
|
|
|
__get_user(tstate, &((*grp)[SPARC_MC_TSTATE]));
|
2020-11-06 18:27:38 +03:00
|
|
|
/* Honour TSTATE_ASI, TSTATE_ICC and TSTATE_XCC only */
|
2018-04-24 22:26:32 +03:00
|
|
|
env->asi = (tstate >> 24) & 0xff;
|
2020-11-06 18:27:38 +03:00
|
|
|
cpu_put_ccr(env, (tstate >> 32) & 0xff);
|
2018-04-24 22:26:32 +03:00
|
|
|
__get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1]));
|
|
|
|
__get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2]));
|
|
|
|
__get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3]));
|
|
|
|
__get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4]));
|
|
|
|
__get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5]));
|
|
|
|
__get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6]));
|
2020-11-06 18:27:37 +03:00
|
|
|
/* Skip g7 as that's the thread register in userspace */
|
2020-11-06 00:23:13 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that unlike the kernel, we didn't need to mess with the
|
|
|
|
* guest register window state to save it into a pt_regs to run
|
|
|
|
* the kernel. So for us the guest's O regs are still in WREG_O*
|
|
|
|
* (unlike the kernel which has put them in UREG_I* in a pt_regs)
|
|
|
|
* and the fp and i7 are still in WREG_I6 and WREG_I7 and don't
|
|
|
|
* need to be written back to userspace memory.
|
|
|
|
*/
|
2019-11-06 14:33:11 +03:00
|
|
|
__get_user(env->regwptr[WREG_O0], (&(*grp)[SPARC_MC_O0]));
|
|
|
|
__get_user(env->regwptr[WREG_O1], (&(*grp)[SPARC_MC_O1]));
|
|
|
|
__get_user(env->regwptr[WREG_O2], (&(*grp)[SPARC_MC_O2]));
|
|
|
|
__get_user(env->regwptr[WREG_O3], (&(*grp)[SPARC_MC_O3]));
|
|
|
|
__get_user(env->regwptr[WREG_O4], (&(*grp)[SPARC_MC_O4]));
|
|
|
|
__get_user(env->regwptr[WREG_O5], (&(*grp)[SPARC_MC_O5]));
|
|
|
|
__get_user(env->regwptr[WREG_O6], (&(*grp)[SPARC_MC_O6]));
|
|
|
|
__get_user(env->regwptr[WREG_O7], (&(*grp)[SPARC_MC_O7]));
|
2018-04-24 22:26:32 +03:00
|
|
|
|
2020-11-06 00:23:13 +03:00
|
|
|
__get_user(env->regwptr[WREG_FP], &(ucp->tuc_mcontext.mc_fp));
|
|
|
|
__get_user(env->regwptr[WREG_I7], &(ucp->tuc_mcontext.mc_i7));
|
2018-04-24 22:26:32 +03:00
|
|
|
|
2020-11-06 18:27:35 +03:00
|
|
|
fpup = &ucp->tuc_mcontext.mc_fpregs;
|
|
|
|
|
|
|
|
__get_user(fenab, &(fpup->mcfpu_enab));
|
|
|
|
if (fenab) {
|
|
|
|
abi_ulong fprs;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We use the FPRS from the guest only in deciding whether
|
|
|
|
* to restore the upper, lower, or both banks of the FPU regs.
|
|
|
|
* The kernel here writes the FPU register data into the
|
|
|
|
* process's current_thread_info state and unconditionally
|
|
|
|
* clears FPRS and TSTATE_PEF: this disables the FPU so that the
|
|
|
|
* next FPU-disabled trap will copy the data out of
|
|
|
|
* current_thread_info and into the real FPU registers.
|
|
|
|
* QEMU doesn't need to handle lazy-FPU-state-restoring like that,
|
|
|
|
* so we always load the data directly into the FPU registers
|
|
|
|
* and leave FPRS and TSTATE_PEF alone (so the FPU stays enabled).
|
|
|
|
* Note that because we (and the kernel) always write zeroes for
|
|
|
|
* the fenab and fprs in sparc64_get_context() none of this code
|
|
|
|
* will execute unless the guest manually constructed or changed
|
|
|
|
* the context structure.
|
|
|
|
*/
|
|
|
|
__get_user(fprs, &(fpup->mcfpu_fprs));
|
|
|
|
if (fprs & FPRS_DL) {
|
|
|
|
for (i = 0; i < 16; i++) {
|
|
|
|
__get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i]));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (fprs & FPRS_DU) {
|
|
|
|
for (i = 16; i < 32; i++) {
|
|
|
|
__get_user(env->fpr[i].ll, &(fpup->mcfpu_fregs.dregs[i]));
|
2018-04-24 22:26:32 +03:00
|
|
|
}
|
|
|
|
}
|
2020-11-06 18:27:35 +03:00
|
|
|
__get_user(env->fsr, &(fpup->mcfpu_fsr));
|
|
|
|
__get_user(env->gsr, &(fpup->mcfpu_gsr));
|
2018-04-24 22:26:32 +03:00
|
|
|
}
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 0);
|
|
|
|
return;
|
|
|
|
do_sigsegv:
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 0);
|
|
|
|
force_sig(TARGET_SIGSEGV);
|
|
|
|
}
|
|
|
|
|
|
|
|
void sparc64_get_context(CPUSPARCState *env)
|
|
|
|
{
|
|
|
|
abi_ulong ucp_addr;
|
|
|
|
struct target_ucontext *ucp;
|
|
|
|
target_mc_gregset_t *grp;
|
|
|
|
target_mcontext_t *mcp;
|
|
|
|
int err;
|
|
|
|
unsigned int i;
|
|
|
|
target_sigset_t target_set;
|
|
|
|
sigset_t set;
|
|
|
|
|
2019-11-06 14:33:11 +03:00
|
|
|
ucp_addr = env->regwptr[WREG_O0];
|
2018-04-24 22:26:32 +03:00
|
|
|
if (!lock_user_struct(VERIFY_WRITE, ucp, ucp_addr, 0)) {
|
|
|
|
goto do_sigsegv;
|
|
|
|
}
|
2020-11-06 18:27:35 +03:00
|
|
|
|
|
|
|
memset(ucp, 0, sizeof(*ucp));
|
|
|
|
|
2018-04-24 22:26:32 +03:00
|
|
|
mcp = &ucp->tuc_mcontext;
|
|
|
|
grp = &mcp->mc_gregs;
|
|
|
|
|
|
|
|
/* Skip over the trap instruction, first. */
|
|
|
|
env->pc = env->npc;
|
|
|
|
env->npc += 4;
|
|
|
|
|
|
|
|
/* If we're only reading the signal mask then do_sigprocmask()
|
|
|
|
* is guaranteed not to fail, which is important because we don't
|
|
|
|
* have any way to signal a failure or restart this operation since
|
|
|
|
* this is not a normal syscall.
|
|
|
|
*/
|
|
|
|
err = do_sigprocmask(0, NULL, &set);
|
|
|
|
assert(err == 0);
|
|
|
|
host_to_target_sigset_internal(&target_set, &set);
|
|
|
|
if (TARGET_NSIG_WORDS == 1) {
|
|
|
|
__put_user(target_set.sig[0],
|
|
|
|
(abi_ulong *)&ucp->tuc_sigmask);
|
|
|
|
} else {
|
|
|
|
abi_ulong *src, *dst;
|
|
|
|
src = target_set.sig;
|
|
|
|
dst = ucp->tuc_sigmask.sig;
|
|
|
|
for (i = 0; i < TARGET_NSIG_WORDS; i++, dst++, src++) {
|
|
|
|
__put_user(*src, dst);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-11-06 18:27:38 +03:00
|
|
|
__put_user(sparc64_tstate(env), &((*grp)[SPARC_MC_TSTATE]));
|
2018-04-24 22:26:32 +03:00
|
|
|
__put_user(env->pc, &((*grp)[SPARC_MC_PC]));
|
|
|
|
__put_user(env->npc, &((*grp)[SPARC_MC_NPC]));
|
|
|
|
__put_user(env->y, &((*grp)[SPARC_MC_Y]));
|
|
|
|
__put_user(env->gregs[1], &((*grp)[SPARC_MC_G1]));
|
|
|
|
__put_user(env->gregs[2], &((*grp)[SPARC_MC_G2]));
|
|
|
|
__put_user(env->gregs[3], &((*grp)[SPARC_MC_G3]));
|
|
|
|
__put_user(env->gregs[4], &((*grp)[SPARC_MC_G4]));
|
|
|
|
__put_user(env->gregs[5], &((*grp)[SPARC_MC_G5]));
|
|
|
|
__put_user(env->gregs[6], &((*grp)[SPARC_MC_G6]));
|
|
|
|
__put_user(env->gregs[7], &((*grp)[SPARC_MC_G7]));
|
2020-11-06 00:23:13 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that unlike the kernel, we didn't need to mess with the
|
|
|
|
* guest register window state to save it into a pt_regs to run
|
|
|
|
* the kernel. So for us the guest's O regs are still in WREG_O*
|
|
|
|
* (unlike the kernel which has put them in UREG_I* in a pt_regs)
|
|
|
|
* and the fp and i7 are still in WREG_I6 and WREG_I7 and don't
|
|
|
|
* need to be fished out of userspace memory.
|
|
|
|
*/
|
2019-11-06 14:33:11 +03:00
|
|
|
__put_user(env->regwptr[WREG_O0], &((*grp)[SPARC_MC_O0]));
|
|
|
|
__put_user(env->regwptr[WREG_O1], &((*grp)[SPARC_MC_O1]));
|
|
|
|
__put_user(env->regwptr[WREG_O2], &((*grp)[SPARC_MC_O2]));
|
|
|
|
__put_user(env->regwptr[WREG_O3], &((*grp)[SPARC_MC_O3]));
|
|
|
|
__put_user(env->regwptr[WREG_O4], &((*grp)[SPARC_MC_O4]));
|
|
|
|
__put_user(env->regwptr[WREG_O5], &((*grp)[SPARC_MC_O5]));
|
|
|
|
__put_user(env->regwptr[WREG_O6], &((*grp)[SPARC_MC_O6]));
|
|
|
|
__put_user(env->regwptr[WREG_O7], &((*grp)[SPARC_MC_O7]));
|
|
|
|
|
2020-11-06 00:23:13 +03:00
|
|
|
__put_user(env->regwptr[WREG_FP], &(mcp->mc_fp));
|
|
|
|
__put_user(env->regwptr[WREG_I7], &(mcp->mc_i7));
|
2018-04-24 22:26:32 +03:00
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|
|
|
2020-11-06 18:27:35 +03:00
|
|
|
/*
|
|
|
|
* We don't write out the FPU state. This matches the kernel's
|
|
|
|
* implementation (which has the code for doing this but
|
|
|
|
* hidden behind an "if (fenab)" where fenab is always 0).
|
|
|
|
*/
|
2018-04-24 22:26:32 +03:00
|
|
|
|
|
|
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unlock_user_struct(ucp, ucp_addr, 1);
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|
|
|
return;
|
|
|
|
do_sigsegv:
|
|
|
|
unlock_user_struct(ucp, ucp_addr, 1);
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|
|
force_sig(TARGET_SIGSEGV);
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|
|
}
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#endif
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