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qemu/tcg/s390x/tcg-target-con-set.h

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tcg/s390: Split out constraint sets to tcg-target-con-set.h Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-17 21:15:40 +03:00
/* SPDX-License-Identifier: MIT */
/*
* Define S390 target-specific constraint sets.
* Copyright (c) 2021 Linaro
*/
/*
* C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
* Each operand should be a sequence of constraint letters as defined by
* tcg-target-con-str.h; the constraint combination is inclusive or.
*/
C_O0_I1(r)
C_O0_I2(L, L)
C_O0_I2(r, r)
C_O0_I2(r, ri)
tcg/s390x: Add host vector framework Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 02:33:14 +03:00
C_O0_I2(v, r)
tcg/s390: Split out constraint sets to tcg-target-con-set.h Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-17 21:15:40 +03:00
C_O1_I1(r, L)
C_O1_I1(r, r)
tcg/s390x: Add host vector framework Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 02:33:14 +03:00
C_O1_I1(v, r)
tcg/s390x: Implement andc, orc, abs, neg, not vector operations These logical and arithmetic operations are optional but trivial. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 04:23:16 +03:00
C_O1_I1(v, v)
tcg/s390x: Add host vector framework Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 02:33:14 +03:00
C_O1_I1(v, vr)
tcg/s390: Split out constraint sets to tcg-target-con-set.h Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-17 21:15:40 +03:00
C_O1_I2(r, 0, ri)
C_O1_I2(r, 0, rI)
C_O1_I2(r, 0, rJ)
C_O1_I2(r, r, ri)
C_O1_I2(r, rZ, r)
tcg/s390x: Implement vector shift operations Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 05:00:38 +03:00
C_O1_I2(v, v, r)
tcg/s390x: Add host vector framework Add registers and function stubs. The functionality is disabled via squashing s390_facilities[2] to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 02:33:14 +03:00
C_O1_I2(v, v, v)
tcg/s390x: Implement TCG_TARGET_HAS_bitsel_vec Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-15 06:36:36 +03:00
C_O1_I3(v, v, v, v)
tcg/s390: Split out constraint sets to tcg-target-con-set.h Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-17 21:15:40 +03:00
C_O1_I4(r, r, ri, r, 0)
C_O1_I4(r, r, ri, rI, 0)
C_O2_I2(b, a, 0, r)
C_O2_I3(b, a, 0, 1, r)
C_O2_I4(r, r, 0, 1, rA, r)
C_O2_I4(r, r, 0, 1, ri, r)
C_O2_I4(r, r, 0, 1, r, r)
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