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qemu/include/hw/i386/apic.h

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Move x86 specific PC declarations to a separate file x86 definitions (especially CPUState uses) prevent many files from being compiled within libhw. Move x86 specific declarations (APIC stuff) to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21 22:46:26 +03:00
#ifndef APIC_H
#define APIC_H
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
apic: avoid passing CPUState from devices Pass only APICState from pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:42:08 +04:00
/* apic.c */
apic: add support for x2APIC mode This commit extends the APIC ID to 32-bit long and remove the 255 max APIC ID limit in userspace APIC. The array that manages local APICs is now dynamically allocated based on the max APIC ID of created x86 machine. Also, new x2APIC IPI destination determination scheme, self IPI and x2APIC mode register access are supported. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-3-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-01-11 18:43:59 +03:00
void apic_set_max_apic_id(uint32_t max_apic_id);
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
int apic_accept_pic_intr(DeviceState *s);
void apic_deliver_pic_intr(DeviceState *s, int level);
apic: Inject external NMI events via LINT1 On real hardware, NMI button events are injected via the LINT1 line of the APICs. E.g. kdump expect this wiring and gets upset if the per-APIC LINT1 mask is not respected, i.e. if NMIs are injected to VCPUs that should not receive them. Change the APIC emulation code to reflect this. Based on qemu-kvm patch by Lai Jiangshan. CC: Lai Jiangshan <laijs@cn.fujitsu.com> Reported-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2011-10-17 20:00:06 +04:00
void apic_deliver_nmi(DeviceState *d);
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
int apic_get_interrupt(DeviceState *s);
apic, i386/tcg: add x2apic transitions This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-01-11 18:44:00 +03:00
int cpu_set_apic_base(DeviceState *s, uint64_t val);
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
uint64_t cpu_get_apic_base(DeviceState *s);
hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabled QEMU populates the apic_state attribute of x86 CPUs if supported by real hardware or if SMP is active. When handling interrupts, it just checks whether apic_state is populated to route the interrupt to the PIC or to the APIC. However, chapter 10.4.3 of [1] requires that: When IA32_APIC_BASE[11] is 0, the processor is functionally equivalent to an IA-32 processor without an on-chip APIC. This means that when apic_state is populated, QEMU needs to check for the MSR_IA32_APICBASE_ENABLE flag in addition. Implement this which fixes some real-world BIOSes. [1] Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3A: System Programming Guide, Part 1 Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240106132546.21248-3-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-01-06 16:25:45 +03:00
bool cpu_is_apic_enabled(DeviceState *s);
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
uint8_t cpu_get_apic_tpr(DeviceState *s);
void apic_init_reset(DeviceState *s);
void apic_sipi(DeviceState *s);
apic: Defer interrupt updates to VCPU thread KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-09 18:42:32 +04:00
void apic_poll_irq(DeviceState *d);
target-i386: clear bsp bit when designating bsp Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it changes the BSP bit. An additional fix is required for QEMU tcg to allow software to change the BSP bit. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Message-Id: <1427932716-11800-1-git-send-email-namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-04-02 02:58:36 +03:00
void apic_designate_bsp(DeviceState *d, bool bsp);
apic: add function to apic that will be used by hvf This patch adds the function apic_get_highest_priority_irr to apic.c and exports it through the interface in apic.h for use by hvf. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-8-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-13 12:05:15 +03:00
int apic_get_highest_priority_irr(DeviceState *dev);
i386/tcg: implement x2APIC registers MSR access This commit creates apic_register_read/write which are used by both apic_mem_read/write for MMIO access and apic_msr_read/write for MSR access. The apic_msr_read/write returns -1 on error, accelerator can use this to raise the appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-2-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-01-11 18:43:58 +03:00
int apic_msr_read(int index, uint64_t *val);
int apic_msr_write(int index, uint64_t val);
bool is_x2apic_mode(DeviceState *d);
Move x86 specific PC declarations to a separate file x86 definitions (especially CPUState uses) prevent many files from being compiled within libhw. Move x86 specific declarations (APIC stuff) to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21 22:46:26 +03:00
apic: avoid using CPUState internals Move the actual CPUState contents handling to cpu.h and cpuid.c. Handle CPU reset and set env->halted in pc.c. Add a function to get the local APIC state of the current CPU for the MMIO. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:42:34 +04:00
/* pc.c */
apic: qdev conversion cleanup Make APICState completely private to apic.c by using DeviceState in external APIs. Move apic_init() to pc.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-19 11:47:42 +04:00
DeviceState *cpu_get_current_apic(void);
Move x86 specific PC declarations to a separate file x86 definitions (especially CPUState uses) prevent many files from being compiled within libhw. Move x86 specific declarations (APIC stuff) to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-21 22:46:26 +03:00
#endif
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