2007-01-17 23:03:15 +03:00
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Unsolved issues/bugs in the mips/mipsel backend
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-----------------------------------------------
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2007-01-19 20:56:23 +03:00
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General
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-------
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2007-01-17 23:03:15 +03:00
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- [ls][dw][lr] report broken (aligned) BadVAddr
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- Missing per-CPU instruction decoding, currently all implemented
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instructions are regarded as valid
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- pcnet32 does not work for little endian emulation on big endian host
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(probably not mips specific, but observable for mips-malta)
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2007-03-17 18:39:48 +03:00
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- CP1 enable/disable is checked at translation time, not at execution
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time, so it will have delayed effect.
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2007-01-17 23:03:15 +03:00
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2007-01-19 20:56:23 +03:00
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MIPS64
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------
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- No 64bit TLB support
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- no 64bit wide registers for FPU
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- 64bit mul/div handling broken
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"Generic" 4Kc system emulation
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------------------------------
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- Doesn't correspond to any real hardware.
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MALTA system emulation
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----------------------
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2007-01-17 23:03:15 +03:00
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- We fake firmware support instead of doing the real thing
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2007-02-02 05:56:33 +03:00
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- Real firmware falls over when trying to init RAM, presumably due
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to lacking I2C emulation.
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