2012-10-30 15:20:06 +04:00
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/*
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* QEMU USB EHCI Emulation
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or(at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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2016-01-26 21:17:12 +03:00
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#include "qemu/osdep.h"
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2012-10-30 15:20:06 +04:00
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#include "hw/usb/hcd-ehci.h"
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2012-12-17 21:20:00 +04:00
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#include "qemu/range.h"
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2012-10-30 15:20:06 +04:00
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2012-10-30 15:53:17 +04:00
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typedef struct EHCIPCIInfo {
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const char *name;
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uint16_t vendor_id;
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uint16_t device_id;
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uint8_t revision;
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2014-08-29 16:40:08 +04:00
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bool companion;
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2012-10-30 15:53:17 +04:00
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} EHCIPCIInfo;
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2015-01-19 17:52:30 +03:00
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static void usb_ehci_pci_realize(PCIDevice *dev, Error **errp)
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2012-10-30 15:20:06 +04:00
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{
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2012-12-16 07:49:43 +04:00
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EHCIPCIState *i = PCI_EHCI(dev);
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2012-10-30 15:20:06 +04:00
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EHCIState *s = &i->ehci;
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uint8_t *pci_conf = dev->config;
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pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
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/* capabilities pointer */
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pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
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/* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
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pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
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pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
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pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
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/* pci_conf[0x50] = 0x01; *//* power management caps */
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pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
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pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
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pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
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pci_conf[0x64] = 0x00;
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pci_conf[0x65] = 0x00;
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pci_conf[0x66] = 0x00;
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pci_conf[0x67] = 0x00;
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pci_conf[0x68] = 0x01;
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pci_conf[0x69] = 0x00;
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pci_conf[0x6a] = 0x00;
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pci_conf[0x6b] = 0x00; /* USBLEGSUP */
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pci_conf[0x6c] = 0x00;
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pci_conf[0x6d] = 0x00;
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pci_conf[0x6e] = 0x00;
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pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
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2013-10-07 11:36:39 +04:00
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s->irq = pci_allocate_irq(dev);
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2013-04-10 20:15:49 +04:00
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s->as = pci_get_address_space(dev);
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2012-10-30 15:20:06 +04:00
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2013-06-06 17:41:09 +04:00
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usb_ehci_realize(s, DEVICE(dev), NULL);
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2012-10-30 15:20:06 +04:00
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
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}
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2013-06-06 17:41:10 +04:00
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static void usb_ehci_pci_init(Object *obj)
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{
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2014-08-29 16:40:08 +04:00
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DeviceClass *dc = OBJECT_GET_CLASS(DeviceClass, obj, TYPE_DEVICE);
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2013-06-06 17:41:10 +04:00
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EHCIPCIState *i = PCI_EHCI(obj);
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EHCIState *s = &i->ehci;
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s->caps[0x09] = 0x68; /* EECP */
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s->capsbase = 0x00;
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s->opregbase = 0x20;
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2013-06-06 17:41:12 +04:00
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s->portscbase = 0x44;
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s->portnr = NB_PORTS;
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2013-06-06 17:41:10 +04:00
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2014-08-29 16:40:08 +04:00
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if (!dc->hotpluggable) {
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s->companion_enable = true;
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}
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2013-06-06 17:41:10 +04:00
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usb_ehci_init(s, DEVICE(obj));
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}
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2017-02-08 05:42:55 +03:00
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static void usb_ehci_pci_finalize(Object *obj)
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{
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EHCIPCIState *i = PCI_EHCI(obj);
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EHCIState *s = &i->ehci;
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usb_ehci_finalize(s);
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}
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2014-06-04 12:31:52 +04:00
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static void usb_ehci_pci_exit(PCIDevice *dev)
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{
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EHCIPCIState *i = PCI_EHCI(dev);
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EHCIState *s = &i->ehci;
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usb_ehci_unrealize(s, DEVICE(dev), NULL);
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2015-08-26 15:02:53 +03:00
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g_free(s->irq);
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s->irq = NULL;
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2014-06-04 12:31:52 +04:00
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}
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2015-03-18 12:33:47 +03:00
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static void usb_ehci_pci_reset(DeviceState *dev)
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{
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PCIDevice *pci_dev = PCI_DEVICE(dev);
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EHCIPCIState *i = PCI_EHCI(pci_dev);
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EHCIState *s = &i->ehci;
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ehci_reset(s);
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}
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2012-11-15 16:07:49 +04:00
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static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
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uint32_t val, int l)
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{
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2012-12-16 07:49:43 +04:00
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EHCIPCIState *i = PCI_EHCI(dev);
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2012-11-15 16:07:49 +04:00
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bool busmaster;
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pci_default_write_config(dev, addr, val, l);
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if (!range_covers_byte(addr, l, PCI_COMMAND)) {
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return;
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}
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busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
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2013-04-10 20:15:49 +04:00
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i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory;
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2012-11-15 16:07:49 +04:00
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}
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2012-10-30 15:20:06 +04:00
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static Property ehci_pci_properties[] = {
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DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
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DEFINE_PROP_END_OF_LIST(),
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};
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static const VMStateDescription vmstate_ehci_pci = {
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.name = "ehci",
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.version_id = 2,
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.minimum_version_id = 1,
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2014-04-16 15:31:26 +04:00
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.fields = (VMStateField[]) {
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2012-10-30 15:20:06 +04:00
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VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
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VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
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2012-11-08 13:14:46 +04:00
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VMSTATE_END_OF_LIST()
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2012-10-30 15:20:06 +04:00
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}
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};
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static void ehci_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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2015-01-19 17:52:30 +03:00
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k->realize = usb_ehci_pci_realize;
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2014-06-04 12:31:52 +04:00
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k->exit = usb_ehci_pci_exit;
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2012-10-30 15:20:06 +04:00
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k->class_id = PCI_CLASS_SERIAL_USB;
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2012-11-15 16:07:49 +04:00
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k->config_write = usb_ehci_pci_write_config;
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2012-11-08 13:14:46 +04:00
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dc->vmsd = &vmstate_ehci_pci;
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2012-10-30 15:20:06 +04:00
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dc->props = ehci_pci_properties;
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2015-03-18 12:33:47 +03:00
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dc->reset = usb_ehci_pci_reset;
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2012-10-30 15:20:06 +04:00
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}
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2012-12-16 07:49:43 +04:00
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static const TypeInfo ehci_pci_type_info = {
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.name = TYPE_PCI_EHCI,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(EHCIPCIState),
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2013-06-06 17:41:10 +04:00
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.instance_init = usb_ehci_pci_init,
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2017-02-08 05:42:55 +03:00
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.instance_finalize = usb_ehci_pci_finalize,
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2012-12-16 07:49:43 +04:00
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.abstract = true,
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.class_init = ehci_class_init,
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2017-09-27 22:56:34 +03:00
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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2012-12-16 07:49:43 +04:00
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};
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static void ehci_data_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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2013-07-29 18:17:45 +04:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2012-12-16 07:49:43 +04:00
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EHCIPCIInfo *i = data;
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k->vendor_id = i->vendor_id;
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k->device_id = i->device_id;
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k->revision = i->revision;
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2013-07-29 18:17:45 +04:00
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set_bit(DEVICE_CATEGORY_USB, dc->categories);
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2014-08-29 16:40:08 +04:00
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if (i->companion) {
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dc->hotpluggable = false;
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}
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2012-12-16 07:49:43 +04:00
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}
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2012-10-30 15:53:17 +04:00
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static struct EHCIPCIInfo ehci_pci_info[] = {
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{
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.name = "usb-ehci",
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
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.revision = 0x10,
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},{
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2012-10-30 16:17:46 +04:00
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.name = "ich9-usb-ehci1", /* 00:1d.7 */
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2012-10-30 15:53:17 +04:00
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
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.revision = 0x03,
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2014-08-29 16:40:08 +04:00
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.companion = true,
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2012-10-30 16:17:46 +04:00
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},{
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.name = "ich9-usb-ehci2", /* 00:1a.7 */
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.vendor_id = PCI_VENDOR_ID_INTEL,
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.device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
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.revision = 0x03,
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2014-08-29 16:40:08 +04:00
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.companion = true,
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2012-10-30 15:53:17 +04:00
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}
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2012-10-30 15:20:06 +04:00
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};
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static void ehci_pci_register_types(void)
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{
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2012-10-30 15:53:17 +04:00
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TypeInfo ehci_type_info = {
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2012-12-16 07:49:43 +04:00
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.parent = TYPE_PCI_EHCI,
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.class_init = ehci_data_class_init,
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2012-10-30 15:53:17 +04:00
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};
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int i;
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2012-12-16 07:49:43 +04:00
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type_register_static(&ehci_pci_type_info);
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2012-10-30 15:53:17 +04:00
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for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
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ehci_type_info.name = ehci_pci_info[i].name;
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ehci_type_info.class_data = ehci_pci_info + i;
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type_register(&ehci_type_info);
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}
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2012-10-30 15:20:06 +04:00
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}
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type_init(ehci_pci_register_types)
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