2004-06-03 22:46:20 +04:00
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/*
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2007-10-29 02:42:18 +03:00
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* QEMU PowerMac CUDA device support
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2007-09-17 01:08:06 +04:00
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*
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2007-10-29 02:42:18 +03:00
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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2007-09-17 01:08:06 +04:00
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*
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2004-06-03 22:46:20 +04:00
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 21:16:58 +03:00
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#include "qemu/osdep.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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#include "hw/ppc/mac.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/input/adb.h"
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2018-02-09 21:51:40 +03:00
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#include "hw/misc/mos6522.h"
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2018-02-09 21:51:41 +03:00
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#include "hw/misc/macio/cuda.h"
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2012-12-17 21:20:00 +04:00
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#include "qemu/timer.h"
|
2012-12-17 21:20:04 +04:00
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|
#include "sysemu/sysemu.h"
|
2016-03-20 20:16:19 +03:00
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#include "qemu/cutils.h"
|
2015-12-15 15:16:16 +03:00
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#include "qemu/log.h"
|
2018-02-09 21:51:42 +03:00
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#include "trace.h"
|
2008-12-24 12:38:16 +03:00
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2004-06-03 22:46:20 +04:00
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/* Bits in B data register: all active low */
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2018-02-09 21:51:40 +03:00
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#define TREQ 0x08 /* Transfer request (input) */
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#define TACK 0x10 /* Transfer acknowledge (output) */
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#define TIP 0x20 /* Transfer in progress (output) */
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2004-06-03 22:46:20 +04:00
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/* commands (1st byte) */
|
2018-02-09 21:51:40 +03:00
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#define ADB_PACKET 0
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#define CUDA_PACKET 1
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#define ERROR_PACKET 2
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#define TIMER_PACKET 3
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#define POWER_PACKET 4
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#define MACIIC_PACKET 5
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#define PMU_PACKET 6
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2004-06-03 22:46:20 +04:00
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#define CUDA_TIMER_FREQ (4700000 / 6)
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|
2005-02-09 03:07:08 +03:00
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/* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
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#define RTC_OFFSET 2082844800
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|
2007-09-17 01:08:06 +04:00
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static void cuda_receive_packet_from_host(CUDAState *s,
|
2004-06-03 22:46:20 +04:00
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const uint8_t *data, int len);
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|
2018-02-09 21:51:40 +03:00
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/* MacOS uses timer 1 for calibration on startup, so we use
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* the timebase frequency and cuda_get_counter_value() with
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* cuda_get_load_time() to steer MacOS to calculate calibrate its timers
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* correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
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* timer to expose tbfreq to guest" for more information) */
|
2004-06-03 22:46:20 +04:00
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|
2018-02-09 21:51:40 +03:00
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static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
|
2014-07-14 00:31:53 +04:00
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|
|
{
|
2018-02-09 21:51:40 +03:00
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MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
|
2018-06-07 20:17:49 +03:00
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CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
|
2018-02-09 21:51:40 +03:00
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|
2018-02-09 21:51:38 +03:00
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/* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
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uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
|
2018-02-09 21:51:40 +03:00
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cs->tb_frequency, NANOSECONDS_PER_SECOND) -
|
2018-02-09 21:51:38 +03:00
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|
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ti->load_time;
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|
2018-02-09 21:51:40 +03:00
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return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
|
2018-02-09 21:51:38 +03:00
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|
}
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|
2018-02-09 21:51:40 +03:00
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static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
|
2018-02-09 21:51:38 +03:00
|
|
|
{
|
2018-02-09 21:51:40 +03:00
|
|
|
MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
|
2018-06-07 20:17:49 +03:00
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CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
|
2018-02-09 21:51:40 +03:00
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|
2018-02-09 21:51:38 +03:00
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uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
|
2018-02-09 21:51:40 +03:00
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|
cs->tb_frequency, NANOSECONDS_PER_SECOND);
|
2018-02-09 21:51:38 +03:00
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|
return load_time;
|
2014-07-14 00:31:53 +04:00
|
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|
}
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|
2015-11-12 01:49:51 +03:00
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static void cuda_set_sr_int(void *opaque)
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|
|
{
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|
CUDAState *s = opaque;
|
2018-06-07 20:17:49 +03:00
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|
MOS6522CUDAState *mcs = &s->mos6522_cuda;
|
2018-02-09 21:51:40 +03:00
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MOS6522State *ms = MOS6522(mcs);
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MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
|
2015-11-12 01:49:51 +03:00
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|
2018-02-09 21:51:40 +03:00
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mdc->set_sr_int(ms);
|
2015-11-12 01:49:51 +03:00
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}
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static void cuda_delay_set_sr_int(CUDAState *s)
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{
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int64_t expire;
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|
2018-02-09 21:51:42 +03:00
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trace_cuda_delay_set_sr_int();
|
2015-11-12 01:49:51 +03:00
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2018-02-09 21:51:40 +03:00
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expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
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2015-11-12 01:49:51 +03:00
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timer_mod(s->sr_delay_timer, expire);
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}
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2004-06-03 22:46:20 +04:00
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/* NOTE: TIP and TREQ are negated */
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static void cuda_update(CUDAState *s)
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{
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2018-06-07 20:17:49 +03:00
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MOS6522CUDAState *mcs = &s->mos6522_cuda;
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2018-02-09 21:51:40 +03:00
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MOS6522State *ms = MOS6522(mcs);
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2004-06-21 20:47:13 +04:00
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int packet_received, len;
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packet_received = 0;
|
2018-02-09 21:51:40 +03:00
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if (!(ms->b & TIP)) {
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2004-06-21 20:47:13 +04:00
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/* transfer requested from host */
|
2004-06-03 22:46:20 +04:00
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|
2018-02-09 21:51:40 +03:00
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if (ms->acr & SR_OUT) {
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2004-06-21 20:47:13 +04:00
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/* data output */
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2018-02-09 21:51:40 +03:00
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if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
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2004-06-21 20:47:13 +04:00
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if (s->data_out_index < sizeof(s->data_out)) {
|
2018-02-09 21:51:42 +03:00
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trace_cuda_data_send(ms->sr);
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2018-02-09 21:51:40 +03:00
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s->data_out[s->data_out_index++] = ms->sr;
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2015-11-12 01:49:51 +03:00
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cuda_delay_set_sr_int(s);
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2004-06-21 20:47:13 +04:00
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}
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}
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} else {
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if (s->data_in_index < s->data_in_size) {
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/* data input */
|
2018-02-09 21:51:40 +03:00
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if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
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ms->sr = s->data_in[s->data_in_index++];
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2018-02-09 21:51:42 +03:00
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trace_cuda_data_recv(ms->sr);
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2004-06-21 20:47:13 +04:00
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/* indicate end of transfer */
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if (s->data_in_index >= s->data_in_size) {
|
2018-02-09 21:51:40 +03:00
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ms->b = (ms->b | TREQ);
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2004-06-21 20:47:13 +04:00
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}
|
2015-11-12 01:49:51 +03:00
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cuda_delay_set_sr_int(s);
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2004-06-21 20:47:13 +04:00
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}
|
2004-06-03 22:46:20 +04:00
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}
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2004-06-21 20:47:13 +04:00
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}
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} else {
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/* no transfer requested: handle sync case */
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2018-02-09 21:51:40 +03:00
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if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
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2004-06-21 20:47:13 +04:00
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/* update TREQ state each time TACK change state */
|
2018-02-09 21:51:40 +03:00
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if (ms->b & TACK) {
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ms->b = (ms->b | TREQ);
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} else {
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ms->b = (ms->b & ~TREQ);
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}
|
2015-11-12 01:49:51 +03:00
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cuda_delay_set_sr_int(s);
|
2004-06-21 20:47:13 +04:00
|
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} else {
|
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if (!(s->last_b & TIP)) {
|
2007-06-03 17:35:16 +04:00
|
|
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/* handle end of host to cuda transfer */
|
2004-06-21 20:47:13 +04:00
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packet_received = (s->data_out_index > 0);
|
2007-06-03 17:35:16 +04:00
|
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/* always an IRQ at the end of transfer */
|
2015-11-12 01:49:51 +03:00
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cuda_delay_set_sr_int(s);
|
2004-06-21 20:47:13 +04:00
|
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}
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/* signal if there is data to read */
|
|
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if (s->data_in_index < s->data_in_size) {
|
2018-02-09 21:51:40 +03:00
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ms->b = (ms->b & ~TREQ);
|
2004-06-21 20:47:13 +04:00
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}
|
2004-06-03 22:46:20 +04:00
|
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}
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}
|
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|
2018-02-09 21:51:40 +03:00
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s->last_acr = ms->acr;
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s->last_b = ms->b;
|
2004-06-21 20:47:13 +04:00
|
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/* NOTE: cuda_receive_packet_from_host() can call cuda_update()
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recursively */
|
|
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|
if (packet_received) {
|
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len = s->data_out_index;
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|
s->data_out_index = 0;
|
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cuda_receive_packet_from_host(s, s->data_out, len);
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}
|
2004-06-03 22:46:20 +04:00
|
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}
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|
2007-09-17 01:08:06 +04:00
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static void cuda_send_packet_to_host(CUDAState *s,
|
2004-06-03 22:46:20 +04:00
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const uint8_t *data, int len)
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{
|
2018-02-09 21:51:42 +03:00
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int i;
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trace_cuda_packet_send(len);
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for (i = 0; i < len; i++) {
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trace_cuda_packet_send_data(i, data[i]);
|
2004-06-21 20:47:13 +04:00
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}
|
2018-02-09 21:51:42 +03:00
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|
2004-06-03 22:46:20 +04:00
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memcpy(s->data_in, data, len);
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s->data_in_size = len;
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s->data_in_index = 0;
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cuda_update(s);
|
2015-11-12 01:49:51 +03:00
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cuda_delay_set_sr_int(s);
|
2004-06-03 22:46:20 +04:00
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}
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2004-07-07 00:57:47 +04:00
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static void cuda_adb_poll(void *opaque)
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2004-06-22 02:46:10 +04:00
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{
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CUDAState *s = opaque;
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uint8_t obuf[ADB_MAX_OUT_LEN + 2];
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int olen;
|
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|
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|
2016-02-07 23:34:08 +03:00
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olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask);
|
2004-06-22 02:46:10 +04:00
|
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if (olen > 0) {
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obuf[0] = ADB_PACKET;
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obuf[1] = 0x40; /* polled data */
|
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cuda_send_packet_to_host(s, obuf, olen + 2);
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}
|
2018-02-09 21:51:40 +03:00
|
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timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
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(NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
|
2004-06-22 02:46:10 +04:00
|
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|
}
|
|
|
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|
2016-02-07 23:34:04 +03:00
|
|
|
/* description of commands */
|
|
|
|
typedef struct CudaCommand {
|
|
|
|
uint8_t command;
|
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|
|
const char *name;
|
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|
|
bool (*handler)(CUDAState *s,
|
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|
|
const uint8_t *in_args, int in_len,
|
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|
|
uint8_t *out_args, int *out_len);
|
|
|
|
} CudaCommand;
|
|
|
|
|
2016-02-07 23:34:06 +03:00
|
|
|
static bool cuda_cmd_autopoll(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
int autopoll;
|
|
|
|
|
|
|
|
if (in_len != 1) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
autopoll = (in_data[0] != 0);
|
|
|
|
if (autopoll != s->autopoll) {
|
|
|
|
s->autopoll = autopoll;
|
|
|
|
if (autopoll) {
|
|
|
|
timer_mod(s->adb_poll_timer,
|
|
|
|
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
|
2016-03-21 19:02:30 +03:00
|
|
|
(NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
|
2016-02-07 23:34:06 +03:00
|
|
|
} else {
|
|
|
|
timer_del(s->adb_poll_timer);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:07 +03:00
|
|
|
static bool cuda_cmd_set_autorate(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 1) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* we don't want a period of 0 ms */
|
|
|
|
/* FIXME: check what real hardware does */
|
|
|
|
if (in_data[0] == 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->autopoll_rate_ms = in_data[0];
|
|
|
|
if (s->autopoll) {
|
|
|
|
timer_mod(s->adb_poll_timer,
|
|
|
|
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
|
2016-03-21 19:02:30 +03:00
|
|
|
(NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
|
2016-02-07 23:34:07 +03:00
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:08 +03:00
|
|
|
static bool cuda_cmd_set_device_list(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 2) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:09 +03:00
|
|
|
static bool cuda_cmd_powerdown(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-05-16 00:41:13 +03:00
|
|
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
2016-02-07 23:34:09 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:10 +03:00
|
|
|
static bool cuda_cmd_reset_system(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-05-16 00:41:13 +03:00
|
|
|
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
|
2016-02-07 23:34:10 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:11 +03:00
|
|
|
static bool cuda_cmd_set_file_server_flag(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 1) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
|
|
|
|
in_data[0]);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:12 +03:00
|
|
|
static bool cuda_cmd_set_power_message(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
if (in_len != 1) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
qemu_log_mask(LOG_UNIMP,
|
|
|
|
"CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
|
|
|
|
in_data[0]);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:13 +03:00
|
|
|
static bool cuda_cmd_get_time(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
uint32_t ti;
|
|
|
|
|
|
|
|
if (in_len != 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
|
2016-03-21 19:02:30 +03:00
|
|
|
/ NANOSECONDS_PER_SECOND);
|
2016-02-07 23:34:13 +03:00
|
|
|
out_data[0] = ti >> 24;
|
|
|
|
out_data[1] = ti >> 16;
|
|
|
|
out_data[2] = ti >> 8;
|
|
|
|
out_data[3] = ti;
|
|
|
|
*out_len = 4;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:14 +03:00
|
|
|
static bool cuda_cmd_set_time(CUDAState *s,
|
|
|
|
const uint8_t *in_data, int in_len,
|
|
|
|
uint8_t *out_data, int *out_len)
|
|
|
|
{
|
|
|
|
uint32_t ti;
|
|
|
|
|
|
|
|
if (in_len != 4) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-04-18 11:07:45 +03:00
|
|
|
ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
|
|
|
|
+ (((uint32_t)in_data[2]) << 8) + in_data[3];
|
2016-02-07 23:34:14 +03:00
|
|
|
s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
|
2016-03-21 19:02:30 +03:00
|
|
|
/ NANOSECONDS_PER_SECOND);
|
2016-02-07 23:34:14 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:04 +03:00
|
|
|
static const CudaCommand handlers[] = {
|
2016-02-07 23:34:06 +03:00
|
|
|
{ CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
|
2016-02-07 23:34:07 +03:00
|
|
|
{ CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate },
|
2016-02-07 23:34:08 +03:00
|
|
|
{ CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
|
2016-02-07 23:34:09 +03:00
|
|
|
{ CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
|
2016-02-07 23:34:10 +03:00
|
|
|
{ CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
|
2016-02-07 23:34:11 +03:00
|
|
|
{ CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
|
|
|
|
cuda_cmd_set_file_server_flag },
|
2016-02-07 23:34:12 +03:00
|
|
|
{ CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
|
|
|
|
cuda_cmd_set_power_message },
|
2016-02-07 23:34:13 +03:00
|
|
|
{ CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
|
2016-02-07 23:34:14 +03:00
|
|
|
{ CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
|
2016-02-07 23:34:04 +03:00
|
|
|
};
|
|
|
|
|
2007-09-17 01:08:06 +04:00
|
|
|
static void cuda_receive_packet(CUDAState *s,
|
2004-06-03 22:46:20 +04:00
|
|
|
const uint8_t *data, int len)
|
|
|
|
{
|
2015-11-12 01:49:43 +03:00
|
|
|
uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
|
2016-02-07 23:34:04 +03:00
|
|
|
int i, out_len = 0;
|
2004-06-03 22:46:20 +04:00
|
|
|
|
2016-02-07 23:34:04 +03:00
|
|
|
for (i = 0; i < ARRAY_SIZE(handlers); i++) {
|
|
|
|
const CudaCommand *desc = &handlers[i];
|
|
|
|
if (desc->command == data[0]) {
|
2018-02-09 21:51:42 +03:00
|
|
|
trace_cuda_receive_packet_cmd(desc->name);
|
2016-02-07 23:34:04 +03:00
|
|
|
out_len = 0;
|
|
|
|
if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
|
|
|
|
cuda_send_packet_to_host(s, obuf, 3 + out_len);
|
|
|
|
} else {
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
"CUDA: %s: wrong parameters %d\n",
|
|
|
|
desc->name, len);
|
|
|
|
obuf[0] = ERROR_PACKET;
|
|
|
|
obuf[1] = 0x5; /* bad parameters */
|
|
|
|
obuf[2] = CUDA_PACKET;
|
|
|
|
obuf[3] = data[0];
|
|
|
|
cuda_send_packet_to_host(s, obuf, 4);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-02-07 23:34:05 +03:00
|
|
|
qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
|
|
|
|
obuf[0] = ERROR_PACKET;
|
|
|
|
obuf[1] = 0x2; /* unknown command */
|
|
|
|
obuf[2] = CUDA_PACKET;
|
|
|
|
obuf[3] = data[0];
|
|
|
|
cuda_send_packet_to_host(s, obuf, 4);
|
2004-06-03 22:46:20 +04:00
|
|
|
}
|
|
|
|
|
2007-09-17 01:08:06 +04:00
|
|
|
static void cuda_receive_packet_from_host(CUDAState *s,
|
2004-06-03 22:46:20 +04:00
|
|
|
const uint8_t *data, int len)
|
|
|
|
{
|
2018-02-09 21:51:42 +03:00
|
|
|
int i;
|
|
|
|
|
|
|
|
trace_cuda_packet_receive(len);
|
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
trace_cuda_packet_receive_data(i, data[i]);
|
2004-06-21 20:47:13 +04:00
|
|
|
}
|
2018-02-09 21:51:42 +03:00
|
|
|
|
2004-06-03 22:46:20 +04:00
|
|
|
switch(data[0]) {
|
|
|
|
case ADB_PACKET:
|
2004-06-22 02:46:10 +04:00
|
|
|
{
|
2015-11-12 01:49:42 +03:00
|
|
|
uint8_t obuf[ADB_MAX_OUT_LEN + 3];
|
2004-06-22 02:46:10 +04:00
|
|
|
int olen;
|
2013-01-24 03:04:05 +04:00
|
|
|
olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
|
2004-07-13 00:16:00 +04:00
|
|
|
if (olen > 0) {
|
2004-06-22 02:46:10 +04:00
|
|
|
obuf[0] = ADB_PACKET;
|
|
|
|
obuf[1] = 0x00;
|
2015-11-12 01:49:42 +03:00
|
|
|
cuda_send_packet_to_host(s, obuf, olen + 2);
|
2004-06-22 02:46:10 +04:00
|
|
|
} else {
|
2004-07-13 00:16:00 +04:00
|
|
|
/* error */
|
2004-06-22 02:46:10 +04:00
|
|
|
obuf[0] = ADB_PACKET;
|
2004-07-13 00:16:00 +04:00
|
|
|
obuf[1] = -olen;
|
2015-11-12 01:49:42 +03:00
|
|
|
obuf[2] = data[1];
|
2004-07-13 00:16:00 +04:00
|
|
|
olen = 0;
|
2015-11-12 01:49:42 +03:00
|
|
|
cuda_send_packet_to_host(s, obuf, olen + 3);
|
2004-06-22 02:46:10 +04:00
|
|
|
}
|
|
|
|
}
|
2004-06-03 22:46:20 +04:00
|
|
|
break;
|
|
|
|
case CUDA_PACKET:
|
|
|
|
cuda_receive_packet(s, data + 1, len - 1);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
|
|
|
|
{
|
|
|
|
CUDAState *s = opaque;
|
2018-06-07 20:17:49 +03:00
|
|
|
MOS6522CUDAState *mcs = &s->mos6522_cuda;
|
2018-02-09 21:51:40 +03:00
|
|
|
MOS6522State *ms = MOS6522(mcs);
|
2004-06-03 22:46:20 +04:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
addr = (addr >> 9) & 0xf;
|
|
|
|
return mos6522_read(ms, addr, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
|
|
|
|
unsigned size)
|
2008-12-30 22:01:19 +03:00
|
|
|
{
|
2018-02-09 21:51:40 +03:00
|
|
|
CUDAState *s = opaque;
|
2018-06-07 20:17:49 +03:00
|
|
|
MOS6522CUDAState *mcs = &s->mos6522_cuda;
|
2018-02-09 21:51:40 +03:00
|
|
|
MOS6522State *ms = MOS6522(mcs);
|
2008-12-30 22:01:19 +03:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
addr = (addr >> 9) & 0xf;
|
|
|
|
mos6522_write(ms, addr, val, size);
|
2008-12-30 22:01:19 +03:00
|
|
|
}
|
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
static const MemoryRegionOps mos6522_cuda_ops = {
|
|
|
|
.read = mos6522_cuda_read,
|
|
|
|
.write = mos6522_cuda_write,
|
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
|
|
|
.valid = {
|
|
|
|
.min_access_size = 1,
|
|
|
|
.max_access_size = 1,
|
|
|
|
},
|
2010-12-02 15:53:24 +03:00
|
|
|
};
|
2008-12-30 22:01:19 +03:00
|
|
|
|
2010-12-02 15:53:24 +03:00
|
|
|
static const VMStateDescription vmstate_cuda = {
|
|
|
|
.name = "cuda",
|
2018-06-07 20:17:49 +03:00
|
|
|
.version_id = 5,
|
|
|
|
.minimum_version_id = 5,
|
2014-04-16 18:01:33 +04:00
|
|
|
.fields = (VMStateField[]) {
|
2018-06-07 20:17:49 +03:00
|
|
|
VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
|
|
|
|
MOS6522State),
|
2016-01-06 23:37:26 +03:00
|
|
|
VMSTATE_UINT8(last_b, CUDAState),
|
|
|
|
VMSTATE_UINT8(last_acr, CUDAState),
|
2010-12-02 15:53:24 +03:00
|
|
|
VMSTATE_INT32(data_in_size, CUDAState),
|
|
|
|
VMSTATE_INT32(data_in_index, CUDAState),
|
|
|
|
VMSTATE_INT32(data_out_index, CUDAState),
|
|
|
|
VMSTATE_UINT8(autopoll, CUDAState),
|
2016-02-07 23:34:07 +03:00
|
|
|
VMSTATE_UINT8(autopoll_rate_ms, CUDAState),
|
2016-02-07 23:34:08 +03:00
|
|
|
VMSTATE_UINT16(adb_poll_mask, CUDAState),
|
2010-12-02 15:53:24 +03:00
|
|
|
VMSTATE_BUFFER(data_in, CUDAState),
|
|
|
|
VMSTATE_BUFFER(data_out, CUDAState),
|
|
|
|
VMSTATE_UINT32(tick_offset, CUDAState),
|
2015-02-10 01:40:46 +03:00
|
|
|
VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState),
|
2016-01-06 23:37:26 +03:00
|
|
|
VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
|
2010-12-02 15:53:24 +03:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
2008-12-30 22:01:19 +03:00
|
|
|
|
2013-01-24 03:04:02 +04:00
|
|
|
static void cuda_reset(DeviceState *dev)
|
2008-12-28 21:27:10 +03:00
|
|
|
{
|
2013-01-24 03:04:02 +04:00
|
|
|
CUDAState *s = CUDA(dev);
|
2008-12-28 21:27:10 +03:00
|
|
|
|
|
|
|
s->data_in_size = 0;
|
|
|
|
s->data_in_index = 0;
|
|
|
|
s->data_out_index = 0;
|
|
|
|
s->autopoll = 0;
|
|
|
|
}
|
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
static void cuda_realize(DeviceState *dev, Error **errp)
|
2004-06-03 22:46:20 +04:00
|
|
|
{
|
2013-01-24 03:04:02 +04:00
|
|
|
CUDAState *s = CUDA(dev);
|
2018-02-09 21:51:40 +03:00
|
|
|
SysBusDevice *sbd;
|
|
|
|
MOS6522State *ms;
|
|
|
|
DeviceState *d;
|
2009-01-15 21:57:15 +03:00
|
|
|
struct tm tm;
|
2004-06-21 20:47:13 +04:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
/* Pass IRQ from 6522 */
|
2018-06-07 20:17:49 +03:00
|
|
|
d = DEVICE(&s->mos6522_cuda);
|
2018-02-09 21:51:40 +03:00
|
|
|
ms = MOS6522(d);
|
|
|
|
sbd = SYS_BUS_DEVICE(s);
|
|
|
|
sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));
|
2005-07-08 01:45:18 +04:00
|
|
|
|
2009-01-18 15:16:26 +03:00
|
|
|
qemu_get_timedate(&tm, 0);
|
|
|
|
s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
|
2009-01-15 21:57:15 +03:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
|
2019-02-10 20:44:21 +03:00
|
|
|
s->sr_delay_ns = 20 * SCALE_US;
|
2018-02-09 21:51:40 +03:00
|
|
|
|
2013-08-21 19:03:08 +04:00
|
|
|
s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
|
2016-02-07 23:34:08 +03:00
|
|
|
s->adb_poll_mask = 0xffff;
|
2018-02-09 21:51:40 +03:00
|
|
|
s->autopoll_rate_ms = 20;
|
2013-01-24 03:04:02 +04:00
|
|
|
}
|
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
static void cuda_init(Object *obj)
|
2013-01-24 03:04:02 +04:00
|
|
|
{
|
|
|
|
CUDAState *s = CUDA(obj);
|
2018-02-09 21:51:40 +03:00
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
|
2013-01-24 03:04:02 +04:00
|
|
|
|
2018-07-17 17:51:54 +03:00
|
|
|
sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda,
|
|
|
|
sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA);
|
2018-06-07 20:17:49 +03:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
|
|
|
|
sysbus_init_mmio(sbd, &s->mem);
|
2013-01-24 03:04:03 +04:00
|
|
|
|
2013-08-24 02:02:27 +04:00
|
|
|
qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
|
|
|
|
DEVICE(obj), "adb.0");
|
2013-01-24 03:04:02 +04:00
|
|
|
}
|
|
|
|
|
2014-07-14 00:31:53 +04:00
|
|
|
static Property cuda_properties[] = {
|
2018-02-09 21:51:35 +03:00
|
|
|
DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
|
2014-07-14 00:31:53 +04:00
|
|
|
DEFINE_PROP_END_OF_LIST()
|
|
|
|
};
|
|
|
|
|
2013-01-24 03:04:02 +04:00
|
|
|
static void cuda_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
2011-09-08 20:51:17 +04:00
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
dc->realize = cuda_realize;
|
2013-01-24 03:04:02 +04:00
|
|
|
dc->reset = cuda_reset;
|
|
|
|
dc->vmsd = &vmstate_cuda;
|
2014-07-14 00:31:53 +04:00
|
|
|
dc->props = cuda_properties;
|
2015-09-26 19:22:07 +03:00
|
|
|
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
|
2004-06-03 22:46:20 +04:00
|
|
|
}
|
2013-01-24 03:04:02 +04:00
|
|
|
|
|
|
|
static const TypeInfo cuda_type_info = {
|
|
|
|
.name = TYPE_CUDA,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(CUDAState),
|
2018-02-09 21:51:40 +03:00
|
|
|
.instance_init = cuda_init,
|
2013-01-24 03:04:02 +04:00
|
|
|
.class_init = cuda_class_init,
|
|
|
|
};
|
|
|
|
|
2018-02-09 21:51:40 +03:00
|
|
|
static void mos6522_cuda_portB_write(MOS6522State *s)
|
|
|
|
{
|
|
|
|
MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
|
2018-06-07 20:17:49 +03:00
|
|
|
CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
|
2018-02-09 21:51:40 +03:00
|
|
|
|
2018-06-07 20:17:49 +03:00
|
|
|
cuda_update(cs);
|
2018-02-09 21:51:40 +03:00
|
|
|
}
|
|
|
|
|
2018-06-07 20:17:50 +03:00
|
|
|
static void mos6522_cuda_reset(DeviceState *dev)
|
2018-02-09 21:51:40 +03:00
|
|
|
{
|
|
|
|
MOS6522State *ms = MOS6522(dev);
|
|
|
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
|
|
|
|
|
2018-06-07 20:17:50 +03:00
|
|
|
mdc->parent_reset(dev);
|
2018-02-09 21:51:40 +03:00
|
|
|
|
|
|
|
ms->timers[0].frequency = CUDA_TIMER_FREQ;
|
|
|
|
ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(oc);
|
|
|
|
MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
|
|
|
|
|
2018-06-07 20:17:50 +03:00
|
|
|
dc->reset = mos6522_cuda_reset;
|
2018-02-09 21:51:40 +03:00
|
|
|
mdc->portB_write = mos6522_cuda_portB_write;
|
|
|
|
mdc->get_timer1_counter_value = cuda_get_counter_value;
|
|
|
|
mdc->get_timer2_counter_value = cuda_get_counter_value;
|
|
|
|
mdc->get_timer1_load_time = cuda_get_load_time;
|
|
|
|
mdc->get_timer2_load_time = cuda_get_load_time;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo mos6522_cuda_type_info = {
|
|
|
|
.name = TYPE_MOS6522_CUDA,
|
|
|
|
.parent = TYPE_MOS6522,
|
|
|
|
.instance_size = sizeof(MOS6522CUDAState),
|
|
|
|
.class_init = mos6522_cuda_class_init,
|
|
|
|
};
|
|
|
|
|
2013-01-24 03:04:02 +04:00
|
|
|
static void cuda_register_types(void)
|
|
|
|
{
|
2018-02-09 21:51:40 +03:00
|
|
|
type_register_static(&mos6522_cuda_type_info);
|
2013-01-24 03:04:02 +04:00
|
|
|
type_register_static(&cuda_type_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(cuda_register_types)
|