2019-05-29 22:21:21 +03:00
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/*
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* QEMU TCG support -- s390x vector floating point instruction support
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*
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* Copyright (C) 2019 Red Hat Inc
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*
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* Authors:
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* David Hildenbrand <david@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "internal.h"
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#include "vec.h"
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#include "tcg_s390x.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#include "fpu/softfloat.h"
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#define VIC_INVALID 0x1
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#define VIC_DIVBYZERO 0x2
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#define VIC_OVERFLOW 0x3
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#define VIC_UNDERFLOW 0x4
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#define VIC_INEXACT 0x5
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/* returns the VEX. If the VEX is 0, there is no trap */
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static uint8_t check_ieee_exc(CPUS390XState *env, uint8_t enr, bool XxC,
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uint8_t *vec_exc)
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{
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uint8_t vece_exc = 0, trap_exc;
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unsigned qemu_exc;
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/* Retrieve and clear the softfloat exceptions */
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qemu_exc = env->fpu_status.float_exception_flags;
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if (qemu_exc == 0) {
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return 0;
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}
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env->fpu_status.float_exception_flags = 0;
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vece_exc = s390_softfloat_exc_to_ieee(qemu_exc);
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/* Add them to the vector-wide s390x exception bits */
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*vec_exc |= vece_exc;
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/* Check for traps and construct the VXC */
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trap_exc = vece_exc & env->fpc >> 24;
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if (trap_exc) {
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if (trap_exc & S390_IEEE_MASK_INVALID) {
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return enr << 4 | VIC_INVALID;
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} else if (trap_exc & S390_IEEE_MASK_DIVBYZERO) {
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return enr << 4 | VIC_DIVBYZERO;
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} else if (trap_exc & S390_IEEE_MASK_OVERFLOW) {
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return enr << 4 | VIC_OVERFLOW;
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} else if (trap_exc & S390_IEEE_MASK_UNDERFLOW) {
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return enr << 4 | VIC_UNDERFLOW;
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} else if (!XxC) {
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g_assert(trap_exc & S390_IEEE_MASK_INEXACT);
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/* inexact has lowest priority on traps */
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return enr << 4 | VIC_INEXACT;
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}
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}
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return 0;
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}
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static void handle_ieee_exc(CPUS390XState *env, uint8_t vxc, uint8_t vec_exc,
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uintptr_t retaddr)
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{
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if (vxc) {
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/* on traps, the fpc flags are not updated, instruction is suppressed */
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tcg_s390_vector_exception(env, vxc, retaddr);
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}
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if (vec_exc) {
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/* indicate exceptions for all elements combined */
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env->fpc |= vec_exc << 16;
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}
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}
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2021-06-08 12:23:14 +03:00
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static float64 s390_vec_read_float64(const S390Vector *v, uint8_t enr)
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{
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return make_float64(s390_vec_read_element64(v, enr));
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}
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static void s390_vec_write_float64(S390Vector *v, uint8_t enr, float64 data)
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{
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return s390_vec_write_element64(v, enr, data);
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}
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2021-06-08 12:23:15 +03:00
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typedef float64 (*vop64_2_fn)(float64 a, float_status *s);
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2019-05-29 22:42:05 +03:00
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static void vop64_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, bool XxC, uint8_t erm, vop64_2_fn fn,
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uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int i, old_mode;
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old_mode = s390_swap_bfp_rounding_mode(env, erm);
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for (i = 0; i < 2; i++) {
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2021-06-08 12:23:15 +03:00
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const float64 a = s390_vec_read_float64(v2, i);
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2019-05-29 22:42:05 +03:00
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2021-06-08 12:23:15 +03:00
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s390_vec_write_float64(&tmp, i, fn(a, &env->fpu_status));
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2019-05-29 22:42:05 +03:00
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vxc = check_ieee_exc(env, i, XxC, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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s390_restore_bfp_rounding_mode(env, old_mode);
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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2021-06-08 12:23:15 +03:00
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static float64 vcdg64(float64 a, float_status *s)
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{
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return int64_to_float64(a, s);
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}
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static float64 vcdlg64(float64 a, float_status *s)
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{
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return uint64_to_float64(a, s);
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}
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static float64 vcgd64(float64 a, float_status *s)
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{
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const float64 tmp = float64_to_int64(a, s);
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return float64_is_any_nan(a) ? INT64_MIN : tmp;
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}
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static float64 vclgd64(float64 a, float_status *s)
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{
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const float64 tmp = float64_to_uint64(a, s);
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return float64_is_any_nan(a) ? 0 : tmp;
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}
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#define DEF_GVEC_VOP2_FN(NAME, FN, BITS) \
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void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, CPUS390XState *env, \
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uint32_t desc) \
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{ \
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const uint8_t erm = extract32(simd_data(desc), 4, 4); \
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const bool se = extract32(simd_data(desc), 3, 1); \
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const bool XxC = extract32(simd_data(desc), 2, 1); \
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\
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vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC()); \
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}
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#define DEF_GVEC_VOP2_64(NAME) \
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DEF_GVEC_VOP2_FN(NAME, NAME##64, 64)
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#define DEF_GVEC_VOP2(NAME, OP) \
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DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64)
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DEF_GVEC_VOP2_64(vcdg)
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DEF_GVEC_VOP2_64(vcdlg)
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DEF_GVEC_VOP2_64(vcgd)
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DEF_GVEC_VOP2_64(vclgd)
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DEF_GVEC_VOP2(vfi, round_to_int)
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DEF_GVEC_VOP2(vfsq, sqrt)
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2021-06-08 12:23:14 +03:00
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typedef float64 (*vop64_3_fn)(float64 a, float64 b, float_status *s);
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2019-05-29 22:21:21 +03:00
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static void vop64_3(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vop64_3_fn fn,
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uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int i;
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for (i = 0; i < 2; i++) {
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2021-06-08 12:23:14 +03:00
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const float64 a = s390_vec_read_float64(v2, i);
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const float64 b = s390_vec_read_float64(v3, i);
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2019-05-29 22:21:21 +03:00
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2021-06-08 12:23:14 +03:00
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s390_vec_write_float64(&tmp, i, fn(a, b, &env->fpu_status));
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2019-05-29 22:21:21 +03:00
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vxc = check_ieee_exc(env, i, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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2021-06-08 12:23:14 +03:00
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#define DEF_GVEC_VOP3(NAME, OP) \
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void HELPER(gvec_##NAME##64)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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\
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vop64_3(v1, v2, v3, env, se, float64_##OP, GETPC()); \
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2019-05-29 22:21:21 +03:00
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}
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2021-06-08 12:23:14 +03:00
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DEF_GVEC_VOP3(vfa, add)
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DEF_GVEC_VOP3(vfs, sub)
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DEF_GVEC_VOP3(vfd, div)
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DEF_GVEC_VOP3(vfm, mul)
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2019-05-29 22:30:56 +03:00
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static int wfc64(const S390Vector *v1, const S390Vector *v2,
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CPUS390XState *env, bool signal, uintptr_t retaddr)
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{
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/* only the zero-indexed elements are compared */
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const float64 a = s390_vec_read_element64(v1, 0);
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const float64 b = s390_vec_read_element64(v2, 0);
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uint8_t vxc, vec_exc = 0;
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int cmp;
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if (signal) {
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cmp = float64_compare(a, b, &env->fpu_status);
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} else {
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cmp = float64_compare_quiet(a, b, &env->fpu_status);
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}
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vxc = check_ieee_exc(env, 0, false, &vec_exc);
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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return float_comp_to_cc(env, cmp);
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}
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void HELPER(gvec_wfc64)(const void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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env->cc_op = wfc64(v1, v2, env, false, GETPC());
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}
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void HELPER(gvec_wfk64)(const void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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env->cc_op = wfc64(v1, v2, env, true, GETPC());
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}
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2019-05-29 22:35:08 +03:00
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2020-05-05 20:40:23 +03:00
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typedef bool (*vfc64_fn)(float64 a, float64 b, float_status *status);
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2019-05-29 22:35:08 +03:00
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static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
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CPUS390XState *env, bool s, vfc64_fn fn, uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int match = 0;
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int i;
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for (i = 0; i < 2; i++) {
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2021-06-08 12:23:16 +03:00
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const float64 a = s390_vec_read_float64(v2, i);
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const float64 b = s390_vec_read_float64(v3, i);
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2019-05-29 22:35:08 +03:00
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/* swap the order of the parameters, so we can use existing functions */
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if (fn(b, a, &env->fpu_status)) {
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match++;
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s390_vec_write_element64(&tmp, i, -1ull);
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}
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vxc = check_ieee_exc(env, i, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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if (match) {
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return s || match == 2 ? 0 : 1;
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}
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return 3;
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}
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2021-06-08 12:23:16 +03:00
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#define DEF_GVEC_VFC_B(NAME, OP, BITS) \
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void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
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\
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vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
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} \
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\
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void HELPER(gvec_##NAME##BITS##_cc)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool se = extract32(simd_data(desc), 3, 1); \
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vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
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\
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env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
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2019-05-29 22:35:08 +03:00
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}
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2021-06-08 12:23:16 +03:00
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#define DEF_GVEC_VFC(NAME, OP) \
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DEF_GVEC_VFC_B(NAME, OP, 64)
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2019-05-29 22:35:08 +03:00
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2021-06-08 12:23:16 +03:00
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DEF_GVEC_VFC(vfce, eq)
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DEF_GVEC_VFC(vfch, lt)
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DEF_GVEC_VFC(vfche, le)
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2019-05-29 22:42:05 +03:00
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2019-05-29 23:02:09 +03:00
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static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
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bool s, uintptr_t retaddr)
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{
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uint8_t vxc, vec_exc = 0;
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S390Vector tmp = {};
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int i;
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for (i = 0; i < 2; i++) {
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/* load from even element */
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const float32 a = s390_vec_read_element32(v2, i * 2);
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const uint64_t ret = float32_to_float64(a, &env->fpu_status);
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s390_vec_write_element64(&tmp, i, ret);
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/* indicate the source element */
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vxc = check_ieee_exc(env, i * 2, false, &vec_exc);
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if (s || vxc) {
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break;
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}
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}
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handle_ieee_exc(env, vxc, vec_exc, retaddr);
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*v1 = tmp;
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}
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void HELPER(gvec_vfll32)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
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{
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vfll32(v1, v2, env, false, GETPC());
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}
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void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env,
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uint32_t desc)
|
|
|
|
{
|
|
|
|
vfll32(v1, v2, env, true, GETPC());
|
|
|
|
}
|
2019-05-29 23:06:42 +03:00
|
|
|
|
|
|
|
static void vflr64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
|
|
|
|
bool s, bool XxC, uint8_t erm, uintptr_t retaddr)
|
|
|
|
{
|
|
|
|
uint8_t vxc, vec_exc = 0;
|
|
|
|
S390Vector tmp = {};
|
|
|
|
int i, old_mode;
|
|
|
|
|
|
|
|
old_mode = s390_swap_bfp_rounding_mode(env, erm);
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
|
|
float64 a = s390_vec_read_element64(v2, i);
|
|
|
|
uint32_t ret = float64_to_float32(a, &env->fpu_status);
|
|
|
|
|
|
|
|
/* place at even element */
|
|
|
|
s390_vec_write_element32(&tmp, i * 2, ret);
|
|
|
|
/* indicate the source element */
|
|
|
|
vxc = check_ieee_exc(env, i, XxC, &vec_exc);
|
|
|
|
if (s || vxc) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
s390_restore_bfp_rounding_mode(env, old_mode);
|
|
|
|
handle_ieee_exc(env, vxc, vec_exc, retaddr);
|
|
|
|
*v1 = tmp;
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vflr64)(void *v1, const void *v2, CPUS390XState *env,
|
|
|
|
uint32_t desc)
|
|
|
|
{
|
|
|
|
const uint8_t erm = extract32(simd_data(desc), 4, 4);
|
|
|
|
const bool XxC = extract32(simd_data(desc), 2, 1);
|
|
|
|
|
|
|
|
vflr64(v1, v2, env, false, XxC, erm, GETPC());
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vflr64s)(void *v1, const void *v2, CPUS390XState *env,
|
|
|
|
uint32_t desc)
|
|
|
|
{
|
|
|
|
const uint8_t erm = extract32(simd_data(desc), 4, 4);
|
|
|
|
const bool XxC = extract32(simd_data(desc), 2, 1);
|
|
|
|
|
|
|
|
vflr64(v1, v2, env, true, XxC, erm, GETPC());
|
|
|
|
}
|
2019-05-29 23:09:33 +03:00
|
|
|
|
2019-05-29 23:17:09 +03:00
|
|
|
static void vfma64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
|
|
|
|
const S390Vector *v4, CPUS390XState *env, bool s, int flags,
|
|
|
|
uintptr_t retaddr)
|
|
|
|
{
|
|
|
|
uint8_t vxc, vec_exc = 0;
|
|
|
|
S390Vector tmp = {};
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
|
|
const uint64_t a = s390_vec_read_element64(v2, i);
|
|
|
|
const uint64_t b = s390_vec_read_element64(v3, i);
|
|
|
|
const uint64_t c = s390_vec_read_element64(v4, i);
|
|
|
|
uint64_t ret = float64_muladd(a, b, c, flags, &env->fpu_status);
|
|
|
|
|
|
|
|
s390_vec_write_element64(&tmp, i, ret);
|
|
|
|
vxc = check_ieee_exc(env, i, false, &vec_exc);
|
|
|
|
if (s || vxc) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
handle_ieee_exc(env, vxc, vec_exc, retaddr);
|
|
|
|
*v1 = tmp;
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vfma64)(void *v1, const void *v2, const void *v3,
|
|
|
|
const void *v4, CPUS390XState *env, uint32_t desc)
|
|
|
|
{
|
|
|
|
vfma64(v1, v2, v3, v4, env, false, 0, GETPC());
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vfma64s)(void *v1, const void *v2, const void *v3,
|
|
|
|
const void *v4, CPUS390XState *env, uint32_t desc)
|
|
|
|
{
|
|
|
|
vfma64(v1, v2, v3, v4, env, true, 0, GETPC());
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vfms64)(void *v1, const void *v2, const void *v3,
|
|
|
|
const void *v4, CPUS390XState *env, uint32_t desc)
|
|
|
|
{
|
|
|
|
vfma64(v1, v2, v3, v4, env, false, float_muladd_negate_c, GETPC());
|
|
|
|
}
|
|
|
|
|
|
|
|
void HELPER(gvec_vfms64s)(void *v1, const void *v2, const void *v3,
|
|
|
|
const void *v4, CPUS390XState *env, uint32_t desc)
|
|
|
|
{
|
|
|
|
vfma64(v1, v2, v3, v4, env, true, float_muladd_negate_c, GETPC());
|
|
|
|
}
|
2019-05-29 23:22:35 +03:00
|
|
|
|
2021-06-08 12:23:17 +03:00
|
|
|
void HELPER(gvec_vftci64)(void *v1, const void *v2, CPUS390XState *env,
|
|
|
|
uint32_t desc)
|
2019-05-29 23:27:21 +03:00
|
|
|
{
|
2021-06-08 12:23:17 +03:00
|
|
|
const uint16_t i3 = extract32(simd_data(desc), 4, 12);
|
|
|
|
const bool s = extract32(simd_data(desc), 3, 1);
|
2019-05-29 23:27:21 +03:00
|
|
|
int i, match = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < 2; i++) {
|
2021-06-08 12:23:17 +03:00
|
|
|
const float64 a = s390_vec_read_float64(v2, i);
|
2019-05-29 23:27:21 +03:00
|
|
|
|
|
|
|
if (float64_dcmask(env, a) & i3) {
|
|
|
|
match++;
|
|
|
|
s390_vec_write_element64(v1, i, -1ull);
|
|
|
|
} else {
|
|
|
|
s390_vec_write_element64(v1, i, 0);
|
|
|
|
}
|
|
|
|
if (s) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-06-08 12:23:17 +03:00
|
|
|
if (match == 2 || (s && match)) {
|
|
|
|
env->cc_op = 0;
|
|
|
|
} else if (match) {
|
|
|
|
env->cc_op = 1;
|
|
|
|
} else {
|
|
|
|
env->cc_op = 3;
|
2019-05-29 23:27:21 +03:00
|
|
|
}
|
|
|
|
}
|