2009-03-13 19:27:31 +03:00
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/*
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* PCI Class, Vendor and Device IDs
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*
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* Please keep sorted.
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*
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* Abbreviated version of linux/pci_ids.h
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*
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* QEMU-specific definitions belong in pci.h
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*/
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2016-06-29 16:29:06 +03:00
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2012-12-06 15:15:58 +04:00
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#ifndef HW_PCI_IDS_H
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2016-06-29 16:29:06 +03:00
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#define HW_PCI_IDS_H
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2009-03-13 19:27:31 +03:00
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/* Device classes and subclasses */
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_NOT_DEFINED 0x0000
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#define PCI_CLASS_NOT_DEFINED_VGA 0x0001
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2009-03-13 19:27:31 +03:00
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_STORAGE 0x01
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_STORAGE_SCSI 0x0100
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#define PCI_CLASS_STORAGE_IDE 0x0101
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_STORAGE_FLOPPY 0x0102
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#define PCI_CLASS_STORAGE_IPI 0x0103
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2012-05-29 15:51:17 +04:00
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#define PCI_CLASS_STORAGE_RAID 0x0104
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_STORAGE_ATA 0x0105
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2010-12-14 03:34:38 +03:00
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#define PCI_CLASS_STORAGE_SATA 0x0106
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_STORAGE_SAS 0x0107
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2013-06-04 19:17:10 +04:00
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#define PCI_CLASS_STORAGE_EXPRESS 0x0108
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_STORAGE_OTHER 0x0180
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_NETWORK 0x02
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_NETWORK_ETHERNET 0x0200
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201
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#define PCI_CLASS_NETWORK_FDDI 0x0202
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#define PCI_CLASS_NETWORK_ATM 0x0203
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#define PCI_CLASS_NETWORK_ISDN 0x0204
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#define PCI_CLASS_NETWORK_WORLDFIP 0x0205
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#define PCI_CLASS_NETWORK_PICMG214 0x0206
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2015-03-14 07:09:29 +03:00
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#define PCI_CLASS_NETWORK_OTHER 0x0280
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2009-03-13 19:27:31 +03:00
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_DISPLAY 0x03
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_DISPLAY_VGA 0x0300
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_DISPLAY_XGA 0x0301
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#define PCI_CLASS_DISPLAY_3D 0x0302
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_DISPLAY_OTHER 0x0380
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_MULTIMEDIA 0x04
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#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402
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#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480
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2009-03-13 19:27:31 +03:00
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_MEMORY 0x05
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_MEMORY_RAM 0x0500
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_MEMORY_FLASH 0x0501
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#define PCI_CLASS_MEMORY_OTHER 0x0580
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2009-03-13 19:27:31 +03:00
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_BRIDGE 0x06
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_BRIDGE_HOST 0x0600
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#define PCI_CLASS_BRIDGE_ISA 0x0601
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_BRIDGE_EISA 0x0602
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#define PCI_CLASS_BRIDGE_MC 0x0603
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_BRIDGE_PCI 0x0604
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2013-07-09 21:36:05 +04:00
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#define PCI_CLASS_BRIDGE_PCI_INF_SUB 0x01
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_BRIDGE_PCMCIA 0x0605
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#define PCI_CLASS_BRIDGE_NUBUS 0x0606
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#define PCI_CLASS_BRIDGE_CARDBUS 0x0607
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#define PCI_CLASS_BRIDGE_RACEWAY 0x0608
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#define PCI_CLASS_BRIDGE_PCI_SEMITP 0x0609
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#define PCI_CLASS_BRIDGE_IB_PCI 0x060a
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_BRIDGE_OTHER 0x0680
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_COMMUNICATION 0x07
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2012-10-17 11:54:20 +04:00
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#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
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#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702
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#define PCI_CLASS_COMMUNICATION_MODEM 0x0703
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#define PCI_CLASS_COMMUNICATION_GPIB 0x0704
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#define PCI_CLASS_COMMUNICATION_SC 0x0705
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2009-06-09 20:42:46 +04:00
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#define PCI_CLASS_COMMUNICATION_OTHER 0x0780
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_SYSTEM 0x08
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#define PCI_CLASS_SYSTEM_PIC 0x0800
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#define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010
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#define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020
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#define PCI_CLASS_SYSTEM_DMA 0x0801
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#define PCI_CLASS_SYSTEM_TIMER 0x0802
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#define PCI_CLASS_SYSTEM_RTC 0x0803
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#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804
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#define PCI_CLASS_SYSTEM_SDHCI 0x0805
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#define PCI_CLASS_SYSTEM_OTHER 0x0880
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#define PCI_BASE_CLASS_INPUT 0x09
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2015-06-04 13:34:40 +03:00
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#define PCI_CLASS_INPUT_KEYBOARD 0x0900
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#define PCI_CLASS_INPUT_PEN 0x0901
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#define PCI_CLASS_INPUT_MOUSE 0x0902
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#define PCI_CLASS_INPUT_SCANNER 0x0903
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#define PCI_CLASS_INPUT_GAMEPORT 0x0904
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#define PCI_CLASS_INPUT_OTHER 0x0980
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2017-02-17 16:31:33 +03:00
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#define PCI_BASE_CLASS_DOCKING 0x0a
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#define PCI_CLASS_DOCKING_GENERIC 0x0a00
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#define PCI_CLASS_DOCKING_OTHER 0x0a80
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#define PCI_BASE_CLASS_PROCESSOR 0x0b
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#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
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2017-02-17 16:31:33 +03:00
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#define PCI_CLASS_PROCESSOR_MIPS 0x0b30
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#define PCI_CLASS_PROCESSOR_CO 0x0b40
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#define PCI_BASE_CLASS_SERIAL 0x0c
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#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00
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#define PCI_CLASS_SERIAL_ACCESS 0x0c01
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#define PCI_CLASS_SERIAL_SSA 0x0c02
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#define PCI_CLASS_SERIAL_USB 0x0c03
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#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
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#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
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#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
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#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330
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#define PCI_CLASS_SERIAL_USB_UNKNOWN 0x0c0380
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#define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe
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#define PCI_CLASS_SERIAL_FIBER 0x0c04
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#define PCI_CLASS_SERIAL_SMBUS 0x0c05
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#define PCI_CLASS_SERIAL_IB 0x0c06
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#define PCI_CLASS_SERIAL_IPMI 0x0c07
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#define PCI_CLASS_SERIAL_SERCOS 0x0c08
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#define PCI_CLASS_SERIAL_CANBUS 0x0c09
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#define PCI_BASE_CLASS_WIRELESS 0x0d
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#define PCI_CLASS_WIRELESS_IRDA 0x0d00
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#define PCI_CLASS_WIRELESS_CIR 0x0d01
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#define PCI_CLASS_WIRELESS_RF_CONTROLLER 0x0d10
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#define PCI_CLASS_WIRELESS_BLUETOOTH 0x0d11
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#define PCI_CLASS_WIRELESS_BROADBAND 0x0d12
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#define PCI_CLASS_WIRELESS_OTHER 0x0d80
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#define PCI_BASE_CLASS_SATELLITE 0x0f
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#define PCI_CLASS_SATELLITE_TV 0x0f00
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#define PCI_CLASS_SATELLITE_AUDIO 0x0f01
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#define PCI_CLASS_SATELLITE_VOICE 0x0f03
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#define PCI_CLASS_SATELLITE_DATA 0x0f04
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#define PCI_BASE_CLASS_CRYPT 0x10
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#define PCI_CLASS_CRYPT_NETWORK 0x1000
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#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001
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#define PCI_CLASS_CRYPT_OTHER 0x1080
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#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11
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#define PCI_CLASS_SP_DPIO 0x1100
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#define PCI_CLASS_SP_PERF 0x1101
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#define PCI_CLASS_SP_SYNCH 0x1110
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#define PCI_CLASS_SP_MANAGEMENT 0x1120
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#define PCI_CLASS_SP_OTHER 0x1180
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2009-03-13 19:27:31 +03:00
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#define PCI_CLASS_OTHERS 0xff
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/* Vendors and devices. Sort key: vendor first, device next. */
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#define PCI_VENDOR_ID_LSI_LOGIC 0x1000
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2013-09-14 19:51:09 +04:00
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#define PCI_DEVICE_ID_LSI_53C810 0x0001
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2009-03-13 19:27:31 +03:00
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#define PCI_DEVICE_ID_LSI_53C895A 0x0012
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hw: Add support for LSI SAS1068 (mptsas) device
This adds the SAS1068 device, a SAS disk controller used in VMware that
is oldish but widely supported and has decent performance. Unlike
megasas, it presents itself as a SAS controller and not as a RAID
controller. The device corresponds to the mptsas kernel driver in
Linux.
A few small things in the device setup are based on Don Slutz's old
patch, but the device emulation was written from scratch based on Don's
SeaBIOS patch and on the FreeBSD and Linux drivers. It is 2400 lines
shorter than Don's patch (and roughly the same size as MegaSAS---also
because it doesn't support the similar SPI controller), implements SCSI
task management functions (with asynchronous cancellation), supports
big-endian hosts, has complete support for migration and follows the
QEMU coding standards much more closely.
To write the driver, I first split Don's patch in two parts, with
the configuration bits in one file and the rest in a separate file.
I first left mptconfig.c in place and rewrote the rest, then deleted
mptconfig.c as well. The configuration pages are still based mostly on
VirtualBox's, though not exactly the same. However, the implementation
is completely different. The contents of the pages themselves should
not be copyrightable.
Signed-off-by: Don Slutz <Don@CloudSwitch.com>
Message-Id: <1347382813-5662-1-git-send-email-Don@CloudSwitch.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-10-27 20:26:06 +03:00
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#define PCI_DEVICE_ID_LSI_SAS1068 0x0054
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2012-05-29 15:51:17 +04:00
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#define PCI_DEVICE_ID_LSI_SAS1078 0x0060
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2014-10-29 15:00:08 +03:00
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#define PCI_DEVICE_ID_LSI_SAS0079 0x0079
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_DEC 0x1011
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#define PCI_DEVICE_ID_DEC_21154 0x0026
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#define PCI_VENDOR_ID_CIRRUS 0x1013
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#define PCI_VENDOR_ID_IBM 0x1014
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#define PCI_VENDOR_ID_AMD 0x1022
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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2012-07-09 14:02:31 +04:00
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#define PCI_DEVICE_ID_AMD_SCSI 0x2020
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2009-03-13 19:27:31 +03:00
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2010-09-06 11:46:20 +04:00
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#define PCI_VENDOR_ID_TI 0x104c
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_MOTOROLA 0x1057
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#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
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#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
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#define PCI_VENDOR_ID_APPLE 0x106b
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#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
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2010-02-09 19:37:02 +03:00
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#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
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2017-09-06 21:19:55 +03:00
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#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_SUN 0x108e
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#define PCI_DEVICE_ID_SUN_EBUS 0x1000
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2017-09-08 16:31:21 +03:00
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#define PCI_DEVICE_ID_SUN_HME 0x1001
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2009-03-13 19:27:31 +03:00
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#define PCI_DEVICE_ID_SUN_SIMBA 0x5000
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#define PCI_DEVICE_ID_SUN_SABRE 0xa000
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#define PCI_VENDOR_ID_CMD 0x1095
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#define PCI_DEVICE_ID_CMD_646 0x0646
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#define PCI_VENDOR_ID_REALTEK 0x10ec
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#define PCI_DEVICE_ID_REALTEK_8139 0x8139
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#define PCI_VENDOR_ID_XILINX 0x10ee
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2010-06-29 06:49:29 +04:00
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#define PCI_VENDOR_ID_VIA 0x1106
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#define PCI_DEVICE_ID_VIA_ISA_BRIDGE 0x0686
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#define PCI_DEVICE_ID_VIA_IDE 0x0571
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#define PCI_DEVICE_ID_VIA_UHCI 0x3038
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#define PCI_DEVICE_ID_VIA_ACPI 0x3057
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#define PCI_DEVICE_ID_VIA_AC97 0x3058
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#define PCI_DEVICE_ID_VIA_MC97 0x3068
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_MARVELL 0x11ab
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2017-04-21 18:18:09 +03:00
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#define PCI_VENDOR_ID_SILICON_MOTION 0x126f
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#define PCI_DEVICE_ID_SM501 0x0501
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_ENSONIQ 0x1274
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#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
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2015-07-06 21:15:15 +03:00
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#define PCI_VENDOR_ID_CHELSIO 0x1425
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2009-03-13 19:27:31 +03:00
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#define PCI_VENDOR_ID_FREESCALE 0x1957
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#define PCI_DEVICE_ID_MPC8533E 0x0030
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#define PCI_VENDOR_ID_INTEL 0x8086
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2010-12-25 08:01:41 +03:00
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#define PCI_DEVICE_ID_INTEL_82378 0x0484
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2009-03-13 19:27:31 +03:00
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#define PCI_DEVICE_ID_INTEL_82441 0x1237
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#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415
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2012-10-20 00:43:31 +04:00
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#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e
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2010-12-03 18:17:28 +03:00
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#define PCI_DEVICE_ID_INTEL_82801D 0x24CD
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2009-10-15 03:12:25 +04:00
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#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
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2009-03-13 19:27:31 +03:00
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#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
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#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
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#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
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#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110
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#define PCI_DEVICE_ID_INTEL_82371AB 0x7111
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#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
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#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
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2012-11-23 07:05:06 +04:00
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#define PCI_DEVICE_ID_INTEL_ICH9_0 0x2910
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#define PCI_DEVICE_ID_INTEL_ICH9_1 0x2917
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#define PCI_DEVICE_ID_INTEL_ICH9_2 0x2912
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#define PCI_DEVICE_ID_INTEL_ICH9_3 0x2913
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#define PCI_DEVICE_ID_INTEL_ICH9_4 0x2914
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#define PCI_DEVICE_ID_INTEL_ICH9_5 0x2919
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#define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930
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#define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916
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#define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918
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2011-07-01 13:45:02 +04:00
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI1 0x2934
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI2 0x2935
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI3 0x2936
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI4 0x2937
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI5 0x2938
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#define PCI_DEVICE_ID_INTEL_82801I_UHCI6 0x2939
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#define PCI_DEVICE_ID_INTEL_82801I_EHCI1 0x293a
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#define PCI_DEVICE_ID_INTEL_82801I_EHCI2 0x293c
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2012-06-21 19:31:47 +04:00
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#define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
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2011-06-16 20:05:17 +04:00
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2012-11-15 00:54:06 +04:00
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#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0
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2013-07-29 14:58:01 +04:00
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#define PCI_VENDOR_ID_XEN 0x5853
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#define PCI_DEVICE_ID_XEN_PLATFORM 0x0001
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2011-02-27 23:09:09 +03:00
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#define PCI_VENDOR_ID_NEC 0x1033
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#define PCI_DEVICE_ID_NEC_UPD720200 0x0194
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2012-12-06 15:15:58 +04:00
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2013-01-11 21:25:29 +04:00
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#define PCI_VENDOR_ID_TEWS 0x1498
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#define PCI_DEVICE_ID_TEWS_TPCI200 0x30C8
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2012-12-06 15:15:58 +04:00
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#endif
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