2022-06-24 06:10:41 +03:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU LoongArch user cpu_loop.
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "qemu.h"
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#include "user-internals.h"
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#include "cpu_loop-common.h"
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#include "signal-common.h"
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void cpu_loop(CPULoongArchState *env)
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{
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CPUState *cs = env_cpu(env);
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int trapnr, si_code;
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abi_long ret;
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for (;;) {
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cpu_exec_start(cs);
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trapnr = cpu_exec(cs);
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cpu_exec_end(cs);
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process_queued_cpu_work(cs);
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switch (trapnr) {
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case EXCP_INTERRUPT:
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/* just indicate that signals should be handled asap */
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break;
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case EXCCODE_SYS:
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env->pc += 4;
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ret = do_syscall(env, env->gpr[11],
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env->gpr[4], env->gpr[5],
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env->gpr[6], env->gpr[7],
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env->gpr[8], env->gpr[9],
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-1, -1);
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if (ret == -QEMU_ERESTARTSYS) {
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env->pc -= 4;
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break;
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}
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if (ret == -QEMU_ESIGRETURN) {
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/*
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* Returning from a successful sigreturn syscall.
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* Avoid clobbering register state.
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*/
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break;
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}
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env->gpr[4] = ret;
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break;
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case EXCCODE_INE:
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force_sig_fault(TARGET_SIGILL, 0, env->pc);
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break;
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case EXCCODE_FPE:
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si_code = TARGET_FPE_FLTUNK;
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if (GET_FP_CAUSE(env->fcsr0) & FP_INVALID) {
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si_code = TARGET_FPE_FLTINV;
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} else if (GET_FP_CAUSE(env->fcsr0) & FP_DIV0) {
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si_code = TARGET_FPE_FLTDIV;
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} else if (GET_FP_CAUSE(env->fcsr0) & FP_OVERFLOW) {
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si_code = TARGET_FPE_FLTOVF;
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} else if (GET_FP_CAUSE(env->fcsr0) & FP_UNDERFLOW) {
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si_code = TARGET_FPE_FLTUND;
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} else if (GET_FP_CAUSE(env->fcsr0) & FP_INEXACT) {
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si_code = TARGET_FPE_FLTRES;
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}
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force_sig_fault(TARGET_SIGFPE, si_code, env->pc);
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break;
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case EXCP_DEBUG:
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case EXCCODE_BRK:
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force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
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break;
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case EXCCODE_BCE:
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force_sig_fault(TARGET_SIGSYS, TARGET_SI_KERNEL, env->pc);
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break;
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2023-11-01 06:08:11 +03:00
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/*
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* Begin with LSX and LASX disabled, then enable on the first trap.
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* In this way we can tell if the unit is in use. This is used to
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* choose the layout of any signal frame.
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*/
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case EXCCODE_SXD:
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env->CSR_EUEN |= R_CSR_EUEN_SXE_MASK;
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break;
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case EXCCODE_ASXD:
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env->CSR_EUEN |= R_CSR_EUEN_ASXE_MASK;
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break;
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2022-06-24 06:10:41 +03:00
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case EXCP_ATOMIC:
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cpu_exec_step_atomic(cs);
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break;
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default:
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EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n",
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trapnr);
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exit(EXIT_FAILURE);
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}
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process_pending_signals(env);
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}
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}
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void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
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{
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int i;
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for (i = 0; i < 32; i++) {
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env->gpr[i] = regs->regs[i];
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}
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env->pc = regs->csr.era;
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}
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