2012-04-02 13:39:23 +04:00
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/*
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* QEMU S/390 CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#ifndef QEMU_S390_CPU_QOM_H
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#define QEMU_S390_CPU_QOM_H
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2019-07-09 18:20:52 +03:00
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#include "hw/core/cpu.h"
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2012-04-02 13:39:23 +04:00
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2017-10-20 14:58:03 +03:00
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#define TYPE_S390_CPU "s390x-cpu"
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2012-04-02 13:39:23 +04:00
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#define S390_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(S390CPUClass, (klass), TYPE_S390_CPU)
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#define S390_CPU(obj) \
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OBJECT_CHECK(S390CPU, (obj), TYPE_S390_CPU)
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#define S390_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(S390CPUClass, (obj), TYPE_S390_CPU)
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2017-09-13 16:24:02 +03:00
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typedef struct S390CPUModel S390CPUModel;
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typedef struct S390CPUDef S390CPUDef;
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2019-11-27 20:50:42 +03:00
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typedef enum cpu_reset_type {
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S390_CPU_RESET_NORMAL,
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2019-11-28 11:37:23 +03:00
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S390_CPU_RESET_INITIAL,
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2019-11-27 20:50:44 +03:00
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S390_CPU_RESET_CLEAR,
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2019-11-27 20:50:42 +03:00
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} cpu_reset_type;
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2012-04-02 13:39:23 +04:00
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/**
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* S390CPUClass:
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2013-01-16 07:00:41 +04:00
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* @parent_realize: The parent class' realize handler.
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2012-04-02 13:39:23 +04:00
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* @parent_reset: The parent class' reset handler.
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2013-07-25 18:45:51 +04:00
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* @load_normal: Performs a load normal.
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s390/cpu: split CPU reset into architectured functions
s390 provides several CPU resets:
- CPU reset, clears interrupts, stop processing, clears TLB, but does
not touch registers
- initial CPU reset, like CPU reset, but also clears PSW, prefix, FPC,
timer and control registers. It does not touch gprs, fprs and acrs (!)
- Power on reset: the full monty
wire up CPUClass reset to the full monty, but provide the lesser resets
as part of S390CPUClass.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2013-06-28 12:51:09 +04:00
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* @cpu_reset: Performs a CPU reset.
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* @initial_cpu_reset: Performs an initial CPU reset.
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2012-04-02 13:39:23 +04:00
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*
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* An S/390 CPU model.
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*/
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typedef struct S390CPUClass {
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/*< private >*/
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CPUClass parent_class;
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/*< public >*/
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2016-09-05 11:52:22 +03:00
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const S390CPUDef *cpu_def;
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2016-09-05 11:52:16 +03:00
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bool kvm_required;
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bool is_static;
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bool is_migration_safe;
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const char *desc;
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2012-04-02 13:39:23 +04:00
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2013-01-16 07:00:41 +04:00
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DeviceRealize parent_realize;
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2012-04-02 13:39:23 +04:00
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void (*parent_reset)(CPUState *cpu);
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2013-07-25 18:45:51 +04:00
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void (*load_normal)(CPUState *cpu);
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2019-11-27 20:50:42 +03:00
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void (*reset)(CPUState *cpu, cpu_reset_type type);
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2012-04-02 13:39:23 +04:00
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} S390CPUClass;
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2016-03-15 15:49:25 +03:00
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typedef struct S390CPU S390CPU;
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2017-09-13 16:24:02 +03:00
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typedef struct CPUS390XState CPUS390XState;
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2013-02-02 13:57:51 +04:00
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2012-04-02 13:39:23 +04:00
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#endif
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