2019-03-22 21:51:19 +03:00
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/*
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* MicroBlaze cpu parameters for qemu.
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*
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* Copyright (c) 2009 Edgar E. Iglesias
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* SPDX-License-Identifier: LGPL-2.0+
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*/
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#ifndef MICROBLAZE_CPU_PARAM_H
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2022-05-06 16:49:10 +03:00
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#define MICROBLAZE_CPU_PARAM_H
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2019-03-22 21:51:19 +03:00
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2020-08-25 22:37:12 +03:00
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/*
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* While system mode can address up to 64 bits of address space,
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* this is done via the lea/sea instructions, which are system-only
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* (as they also bypass the mmu).
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*
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* We can improve the user-only experience by only exposing 32 bits
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* of address space.
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*/
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#ifdef CONFIG_USER_ONLY
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#define TARGET_LONG_BITS 32
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#else
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2019-03-22 21:51:19 +03:00
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#define TARGET_LONG_BITS 64
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#define TARGET_PHYS_ADDR_SPACE_BITS 64
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#define TARGET_VIRT_ADDR_SPACE_BITS 64
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2020-08-25 22:37:12 +03:00
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#endif
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2019-03-22 21:51:19 +03:00
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/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
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#define TARGET_PAGE_BITS 12
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2023-12-05 16:31:59 +03:00
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/* MicroBlaze is always in-order. */
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#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
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2019-03-22 21:51:19 +03:00
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#endif
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