This website requires JavaScript.
Explore
Help
Sign In
mirrors
/
qemu
Watch
1
Star
0
Fork
0
You've already forked qemu
Code
Issues
Pull Requests
Packages
Projects
Releases
Wiki
Activity
5d13ebeacc
qemu
/
default-configs
/
or1k-softmmu.mak
6 lines
96 B
Makefile
Raw
Normal View
History
Unescape
Escape
target/openrisc: Rename the cpu from or32 to or1k This is in keeping with the toolchain and or1ksim. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-02-09 02:06:54 +03:00
# Default configuration for or1k-softmmu
CONFIG_SERIAL
=
y
CONFIG_OPENCORES_ETH
=
y
openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Add OpenRISC Multicore PIC which handles inter processor interrupts (IPI) between cores. In OpenRISC all device interrupts are routed to each core enabling this device to be simple. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-06-17 18:32:40 +03:00
CONFIG_OMPIC
=
y
Reference in New Issue
Copy Permalink