2010-02-05 21:48:36 +03:00
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/*
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* QEMU DEC 21154 PCI bridge
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*
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* Copyright (c) 2006-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 21:16:58 +03:00
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#include "qemu/osdep.h"
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2013-03-18 20:36:02 +04:00
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#include "dec.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_host.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_bus.h"
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2010-02-05 21:48:36 +03:00
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/* debug DEC */
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//#define DEBUG_DEC
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#ifdef DEBUG_DEC
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#define DEC_DPRINTF(fmt, ...) \
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do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DEC_DPRINTF(fmt, ...)
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#endif
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2012-08-20 21:07:59 +04:00
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#define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)
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2010-02-05 21:48:36 +03:00
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typedef struct DECState {
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2012-08-20 21:08:09 +04:00
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PCIHostState parent_obj;
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2010-02-05 21:48:36 +03:00
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} DECState;
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2010-02-07 22:28:32 +03:00
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static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return irq_num;
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}
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2016-01-15 05:23:31 +03:00
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static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
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2013-03-15 02:01:11 +04:00
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{
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2016-01-15 05:23:31 +03:00
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pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
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2013-03-15 02:01:11 +04:00
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}
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2011-12-04 22:22:06 +04:00
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static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
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{
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2011-12-08 07:34:16 +04:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2011-12-04 22:22:06 +04:00
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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2017-06-13 22:48:49 +03:00
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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2016-01-15 05:23:31 +03:00
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k->realize = dec_pci_bridge_realize;
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2011-12-04 22:22:06 +04:00
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k->exit = pci_bridge_exitfn;
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k->vendor_id = PCI_VENDOR_ID_DEC;
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k->device_id = PCI_DEVICE_ID_DEC_21154;
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k->config_write = pci_bridge_write_config;
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k->is_bridge = 1;
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2011-12-08 07:34:16 +04:00
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dc->desc = "DEC 21154 PCI-PCI bridge";
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dc->reset = pci_bridge_reset;
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dc->vmsd = &vmstate_pci_device;
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2011-12-04 22:22:06 +04:00
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}
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2012-08-20 21:07:56 +04:00
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static const TypeInfo dec_21154_pci_bridge_info = {
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2011-12-08 07:34:16 +04:00
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.name = "dec-21154-p2p-bridge",
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2013-07-11 19:13:43 +04:00
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.parent = TYPE_PCI_BRIDGE,
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2011-12-08 07:34:16 +04:00
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.instance_size = sizeof(PCIBridge),
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.class_init = dec_21154_pci_bridge_class_init,
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2017-09-27 22:56:34 +03:00
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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2010-07-13 08:01:42 +04:00
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};
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PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
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{
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PCIDevice *dev;
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PCIBridge *br;
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2010-02-07 22:28:32 +03:00
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2010-07-13 08:01:42 +04:00
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dev = pci_create_multifunction(parent_bus, devfn, false,
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"dec-21154-p2p-bridge");
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2013-07-11 19:13:43 +04:00
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br = PCI_BRIDGE(dev);
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2010-07-13 08:01:42 +04:00
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pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
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qdev_init_nofail(&dev->qdev);
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return pci_bridge_get_sec_bus(br);
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2010-02-07 22:28:32 +03:00
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}
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2018-12-13 16:48:00 +03:00
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static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
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2010-02-05 21:48:36 +03:00
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{
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2012-08-20 21:07:59 +04:00
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PCIHostState *phb;
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2018-12-13 16:48:00 +03:00
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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2010-02-05 21:48:36 +03:00
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2012-08-20 21:08:08 +04:00
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phb = PCI_HOST_BRIDGE(dev);
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2010-02-05 21:48:36 +03:00
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2013-06-07 05:25:08 +04:00
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memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
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2012-08-20 21:07:59 +04:00
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dev, "pci-conf-idx", 0x1000);
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2013-06-07 05:25:08 +04:00
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memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
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2012-08-20 21:07:59 +04:00
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dev, "pci-data-idx", 0x1000);
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2018-12-13 16:48:00 +03:00
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sysbus_init_mmio(sbd, &phb->conf_mem);
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sysbus_init_mmio(sbd, &phb->data_mem);
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2010-02-05 21:48:36 +03:00
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}
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2015-01-19 17:52:30 +03:00
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static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
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2010-02-05 21:48:36 +03:00
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{
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/* PCI2PCI bridge same values as PearPC - check this */
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}
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2011-12-04 22:22:06 +04:00
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static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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pci-host: Consistently set cannot_instantiate_with_device_add_yet
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
there, yet.
Since the sysbus part can't be instantiated with device_add, yet,
permitting it with the PCI part is useless. We shouldn't offer
useless options to the user, so let's set
cannot_instantiate_with_device_add_yet for them.
It's already set for Bonito, Grackle, i440FX and Raven. Document why.
Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch,
pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp,
uni-north-internal-pci, uni-north-pci, and versatile_pci_host.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-28 20:26:58 +04:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2011-12-04 22:22:06 +04:00
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2017-06-13 22:48:49 +03:00
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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2015-01-19 17:52:30 +03:00
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k->realize = dec_21154_pci_host_realize;
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2011-12-04 22:22:06 +04:00
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k->vendor_id = PCI_VENDOR_ID_DEC;
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k->device_id = PCI_DEVICE_ID_DEC_21154;
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k->revision = 0x02;
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k->class_id = PCI_CLASS_BRIDGE_PCI;
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k->is_bridge = 1;
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pci-host: Consistently set cannot_instantiate_with_device_add_yet
Many PCI host bridges consist of a sysbus device and a PCI device.
You need both for the thing to work. Arguably, these bridges should
be modelled as a single, composite devices instead of pairs of
seemingly independent devices you can only use together, but we're not
there, yet.
Since the sysbus part can't be instantiated with device_add, yet,
permitting it with the PCI part is useless. We shouldn't offer
useless options to the user, so let's set
cannot_instantiate_with_device_add_yet for them.
It's already set for Bonito, Grackle, i440FX and Raven. Document why.
Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch,
pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp,
uni-north-internal-pci, uni-north-pci, and versatile_pci_host.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-28 20:26:58 +04:00
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/*
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* PCI-facing part of the host bridge, not usable without the
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* host-facing part, which can't be device_add'ed, yet.
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*/
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2017-05-03 23:35:44 +03:00
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dc->user_creatable = false;
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2011-12-04 22:22:06 +04:00
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}
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2012-08-20 21:07:56 +04:00
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static const TypeInfo dec_21154_pci_host_info = {
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2011-12-08 07:34:16 +04:00
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.name = "dec-21154",
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCIDevice),
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.class_init = dec_21154_pci_host_class_init,
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2017-09-27 22:56:34 +03:00
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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2010-02-05 21:48:36 +03:00
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};
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2012-01-24 23:12:29 +04:00
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static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
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2010-02-05 21:48:36 +03:00
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{
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2018-12-13 16:48:00 +03:00
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DeviceClass *dc = DEVICE_CLASS(klass);
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2012-01-24 23:12:29 +04:00
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2018-12-13 16:48:00 +03:00
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dc->realize = pci_dec_21154_device_realize;
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2012-01-24 23:12:29 +04:00
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}
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2012-08-20 21:07:56 +04:00
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static const TypeInfo pci_dec_21154_device_info = {
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2012-08-20 21:07:59 +04:00
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.name = TYPE_DEC_21154,
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2012-08-20 21:08:08 +04:00
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.parent = TYPE_PCI_HOST_BRIDGE,
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2011-12-08 07:34:16 +04:00
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.instance_size = sizeof(DECState),
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.class_init = pci_dec_21154_device_class_init,
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2012-01-24 23:12:29 +04:00
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};
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2011-12-04 22:22:06 +04:00
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2012-02-09 18:20:55 +04:00
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static void dec_register_types(void)
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2012-01-24 23:12:29 +04:00
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{
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2011-12-08 07:34:16 +04:00
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type_register_static(&pci_dec_21154_device_info);
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type_register_static(&dec_21154_pci_host_info);
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type_register_static(&dec_21154_pci_bridge_info);
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2010-02-05 21:48:36 +03:00
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}
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2012-02-09 18:20:55 +04:00
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type_init(dec_register_types)
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