2009-05-15 01:35:09 +04:00
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/* QEMU Synchronous Serial Interface support. */
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2020-10-12 15:49:54 +03:00
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/*
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* In principle SSI is a point-point interface. As such the qemu
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2020-10-12 15:49:55 +03:00
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* implementation has a single peripheral on a "bus".
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* However it is fairly common for boards to have multiple peripherals
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2020-10-12 15:49:54 +03:00
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* connected to a single master, and select devices with an external
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* chip select. This is implemented in qemu by having an explicit mux device.
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2020-10-12 15:49:55 +03:00
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* It is assumed that master and peripheral are both using the same transfer
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2020-10-12 15:49:54 +03:00
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* width.
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*/
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2009-05-15 01:35:09 +04:00
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#ifndef QEMU_SSI_H
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#define QEMU_SSI_H
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2019-08-12 08:23:51 +03:00
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#include "hw/qdev-core.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2009-05-15 01:35:09 +04:00
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2016-01-21 17:15:03 +03:00
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typedef enum SSICSMode SSICSMode;
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2009-05-15 01:35:09 +04:00
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2020-10-12 15:49:55 +03:00
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#define TYPE_SSI_PERIPHERAL "ssi-peripheral"
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OBJECT_DECLARE_TYPE(SSIPeripheral, SSIPeripheralClass,
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SSI_PERIPHERAL)
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2011-12-16 23:36:39 +04:00
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2014-05-20 10:31:33 +04:00
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#define SSI_GPIO_CS "ssi-gpio-cs"
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2016-01-21 17:15:03 +03:00
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enum SSICSMode {
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2012-07-24 06:23:22 +04:00
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SSI_CS_NONE = 0,
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SSI_CS_LOW,
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SSI_CS_HIGH,
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2016-01-21 17:15:03 +03:00
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};
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2012-07-24 06:23:22 +04:00
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2020-10-12 15:49:55 +03:00
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/* Peripherals. */
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struct SSIPeripheralClass {
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2011-12-16 23:36:39 +04:00
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DeviceClass parent_class;
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2020-10-12 15:49:55 +03:00
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void (*realize)(SSIPeripheral *dev, Error **errp);
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2012-07-24 06:23:22 +04:00
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/* if you have standard or no CS behaviour, just override transfer.
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* This is called when the device cs is active (true by default).
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*/
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2020-10-12 15:49:55 +03:00
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uint32_t (*transfer)(SSIPeripheral *dev, uint32_t val);
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2012-07-24 06:23:22 +04:00
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/* called when the CS line changes. Optional, devices only need to implement
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* this if they have side effects associated with the cs line (beyond
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* tristating the txrx lines).
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*/
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2020-10-12 15:49:55 +03:00
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int (*set_cs)(SSIPeripheral *dev, bool select);
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2012-07-24 06:23:22 +04:00
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/* define whether or not CS exists and is active low/high */
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SSICSMode cs_polarity;
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/* if you have non-standard CS behaviour override this to take control
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* of the CS behaviour at the device level. transfer, set_cs, and
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* cs_polarity are unused if this is overwritten. Transfer_raw will
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* always be called for the device for every txrx access to the parent bus
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*/
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2020-10-12 15:49:55 +03:00
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uint32_t (*transfer_raw)(SSIPeripheral *dev, uint32_t val);
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2016-01-21 17:15:03 +03:00
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};
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2009-05-15 01:35:09 +04:00
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2020-10-12 15:49:55 +03:00
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struct SSIPeripheral {
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2014-02-12 04:30:10 +04:00
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DeviceState parent_obj;
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2012-07-24 06:23:22 +04:00
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2022-10-24 12:20:15 +03:00
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/* cache the class */
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SSIPeripheralClass *spc;
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2012-07-24 06:23:22 +04:00
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/* Chip select state */
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bool cs;
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2009-05-15 01:35:09 +04:00
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};
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2020-10-12 15:49:55 +03:00
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extern const VMStateDescription vmstate_ssi_peripheral;
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2012-07-24 06:23:22 +04:00
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2020-10-12 15:49:55 +03:00
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#define VMSTATE_SSI_PERIPHERAL(_field, _state) { \
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2012-07-24 06:23:22 +04:00
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.name = (stringify(_field)), \
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2020-10-12 15:49:55 +03:00
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.size = sizeof(SSIPeripheral), \
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.vmsd = &vmstate_ssi_peripheral, \
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2012-07-24 06:23:22 +04:00
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.flags = VMS_STRUCT, \
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2020-10-12 15:49:55 +03:00
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.offset = vmstate_offset_value(_state, _field, SSIPeripheral), \
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2012-07-24 06:23:22 +04:00
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}
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2020-10-12 15:49:55 +03:00
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DeviceState *ssi_create_peripheral(SSIBus *bus, const char *name);
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2020-07-03 18:59:44 +03:00
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/**
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2020-10-12 15:49:55 +03:00
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* ssi_realize_and_unref: realize and unref an SSI peripheral
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* @dev: SSI peripheral to realize
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2020-07-03 18:59:44 +03:00
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* @bus: SSI bus to put it on
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* @errp: error pointer
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*
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* Call 'realize' on @dev, put it on the specified @bus, and drop the
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* reference to it. Errors are reported via @errp and by returning
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* false.
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*
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* This function is useful if you have created @dev via qdev_new()
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* (which takes a reference to the device it returns to you), so that
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* you can set properties on it before realizing it. If you don't need
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2020-10-12 15:49:55 +03:00
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* to set properties then ssi_create_peripheral() is probably better (as it
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2020-07-03 18:59:44 +03:00
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* does the create, init and realize in one step).
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*
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2020-10-12 15:49:55 +03:00
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* If you are embedding the SSI peripheral into another QOM device and
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2020-07-03 18:59:44 +03:00
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* initialized it via some variant on object_initialize_child() then
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* do not use this function, because that family of functions arrange
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* for the only reference to the child device to be held by the parent
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* via the child<> property, and so the reference-count-drop done here
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* would be incorrect. (Instead you would want ssi_realize(), which
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* doesn't currently exist but would be trivial to create if we had
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* any code that wanted it.)
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*/
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bool ssi_realize_and_unref(DeviceState *dev, SSIBus *bus, Error **errp);
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2009-05-15 01:35:09 +04:00
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/* Master interface. */
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2009-05-23 03:05:19 +04:00
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SSIBus *ssi_create_bus(DeviceState *parent, const char *name);
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2009-05-15 01:35:09 +04:00
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uint32_t ssi_transfer(SSIBus *bus, uint32_t val);
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#endif
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