2007-10-29 02:42:18 +03:00
|
|
|
/*
|
|
|
|
* QEMU PowerMac emulation shared definitions and prototypes
|
|
|
|
*
|
|
|
|
* Copyright (c) 2004-2007 Fabrice Bellard
|
|
|
|
* Copyright (c) 2007 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
|
|
|
#if !defined(__PPC_MAC_H__)
|
|
|
|
#define __PPC_MAC_H__
|
|
|
|
|
2011-07-26 15:26:19 +04:00
|
|
|
#include "memory.h"
|
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* SMP is not enabled, for now */
|
|
|
|
#define MAX_CPUS 1
|
|
|
|
|
2009-05-19 17:52:42 +04:00
|
|
|
#define BIOS_SIZE (1024 * 1024)
|
2007-10-29 02:42:18 +03:00
|
|
|
#define BIOS_FILENAME "ppc_rom.bin"
|
|
|
|
#define NVRAM_SIZE 0x2000
|
2009-01-09 14:01:31 +03:00
|
|
|
#define PROM_FILENAME "openbios-ppc"
|
2008-12-24 23:23:51 +03:00
|
|
|
#define PROM_ADDR 0xfff00000
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
#define KERNEL_LOAD_ADDR 0x01000000
|
2011-06-16 01:27:19 +04:00
|
|
|
#define KERNEL_GAP 0x00100000
|
2007-10-29 02:42:18 +03:00
|
|
|
|
2009-01-12 20:40:23 +03:00
|
|
|
#define ESCC_CLOCK 3686400
|
|
|
|
|
2007-10-29 02:42:18 +03:00
|
|
|
/* Cuda */
|
2011-08-08 17:09:17 +04:00
|
|
|
void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* MacIO */
|
2011-08-08 17:09:17 +04:00
|
|
|
void macio_init (PCIBus *bus, int device_id, int is_oldworld,
|
|
|
|
MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
|
|
|
|
MemoryRegion *cuda_mem, void *nvram,
|
|
|
|
int nb_ide, MemoryRegion **ide_mem, MemoryRegion *escc_mem);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* Heathrow PIC */
|
2011-08-08 17:09:17 +04:00
|
|
|
qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
|
2007-10-29 02:42:18 +03:00
|
|
|
int nb_cpus, qemu_irq **irqs);
|
|
|
|
|
|
|
|
/* Grackle PCI */
|
2012-08-20 21:08:00 +04:00
|
|
|
#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"
|
2011-07-26 15:26:19 +04:00
|
|
|
PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
|
2011-08-08 17:09:04 +04:00
|
|
|
MemoryRegion *address_space_mem,
|
|
|
|
MemoryRegion *address_space_io);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* UniNorth PCI */
|
2011-08-08 17:09:04 +04:00
|
|
|
PCIBus *pci_pmac_init(qemu_irq *pic,
|
|
|
|
MemoryRegion *address_space_mem,
|
|
|
|
MemoryRegion *address_space_io);
|
|
|
|
PCIBus *pci_pmac_u3_init(qemu_irq *pic,
|
|
|
|
MemoryRegion *address_space_mem,
|
|
|
|
MemoryRegion *address_space_io);
|
2007-10-29 02:42:18 +03:00
|
|
|
|
|
|
|
/* Mac NVRAM */
|
|
|
|
typedef struct MacIONVRAMState MacIONVRAMState;
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
MacIONVRAMState *macio_nvram_init (hwaddr size,
|
2009-02-07 13:48:26 +03:00
|
|
|
unsigned int it_shift);
|
2011-08-08 17:09:17 +04:00
|
|
|
void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr mem_base);
|
2007-10-29 02:42:18 +03:00
|
|
|
void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
|
|
|
|
uint32_t macio_nvram_read (void *opaque, uint32_t addr);
|
|
|
|
void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
|
|
|
|
#endif /* !defined(__PPC_MAC_H__) */
|