2007-09-17 01:08:06 +04:00
|
|
|
/*
|
2007-05-23 04:03:59 +04:00
|
|
|
* QEMU SMBus device emulation.
|
|
|
|
*
|
2018-11-14 03:31:27 +03:00
|
|
|
* This code is a helper for SMBus device emulation. It implements an
|
|
|
|
* I2C device inteface and runs the SMBus protocol from the device
|
|
|
|
* point of view and maps those to simple calls to emulate.
|
|
|
|
*
|
2007-05-23 04:03:59 +04:00
|
|
|
* Copyright (c) 2007 CodeSourcery.
|
|
|
|
* Written by Paul Brook
|
|
|
|
*
|
2011-06-26 06:21:35 +04:00
|
|
|
* This code is licensed under the LGPL.
|
2007-05-23 04:03:59 +04:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* TODO: Implement PEC. */
|
|
|
|
|
2016-01-26 21:17:30 +03:00
|
|
|
#include "qemu/osdep.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/hw.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/i2c/i2c.h"
|
2018-11-14 03:31:27 +03:00
|
|
|
#include "hw/i2c/smbus_slave.h"
|
2019-05-23 17:35:07 +03:00
|
|
|
#include "qemu/module.h"
|
2007-05-23 04:03:59 +04:00
|
|
|
|
|
|
|
//#define DEBUG_SMBUS 1
|
|
|
|
|
|
|
|
#ifdef DEBUG_SMBUS
|
2009-05-13 21:53:17 +04:00
|
|
|
#define DPRINTF(fmt, ...) \
|
|
|
|
do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
|
|
|
|
#define BADF(fmt, ...) \
|
|
|
|
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
|
2007-05-23 04:03:59 +04:00
|
|
|
#else
|
2009-05-13 21:53:17 +04:00
|
|
|
#define DPRINTF(fmt, ...) do {} while(0)
|
|
|
|
#define BADF(fmt, ...) \
|
|
|
|
do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
|
2007-05-23 04:03:59 +04:00
|
|
|
#endif
|
|
|
|
|
|
|
|
enum {
|
|
|
|
SMBUS_IDLE,
|
|
|
|
SMBUS_WRITE_DATA,
|
|
|
|
SMBUS_READ_DATA,
|
|
|
|
SMBUS_DONE,
|
|
|
|
SMBUS_CONFUSED = -1
|
|
|
|
};
|
|
|
|
|
|
|
|
static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
|
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2009-05-15 01:35:08 +04:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
DPRINTF("Quick Command %d\n", recv);
|
2011-12-05 06:39:20 +04:00
|
|
|
if (sc->quick_cmd) {
|
|
|
|
sc->quick_cmd(dev, recv);
|
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void smbus_do_write(SMBusDevice *dev)
|
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2009-05-15 01:35:08 +04:00
|
|
|
|
2018-11-30 22:38:21 +03:00
|
|
|
DPRINTF("Command %d len %d\n", dev->data_buf[0], dev->data_len);
|
|
|
|
if (sc->write_data) {
|
|
|
|
sc->write_data(dev, dev->data_buf, dev->data_len);
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-01-09 14:40:20 +03:00
|
|
|
static int smbus_i2c_event(I2CSlave *s, enum i2c_event event)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
2009-05-15 01:35:08 +04:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
switch (event) {
|
|
|
|
case I2C_START_SEND:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_IDLE:
|
|
|
|
DPRINTF("Incoming data\n");
|
|
|
|
dev->mode = SMBUS_WRITE_DATA;
|
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
default:
|
|
|
|
BADF("Unexpected send start condition in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_START_RECV:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_IDLE:
|
|
|
|
DPRINTF("Read mode\n");
|
2018-11-30 22:49:31 +03:00
|
|
|
dev->mode = SMBUS_READ_DATA;
|
2007-05-23 04:03:59 +04:00
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
if (dev->data_len == 0) {
|
|
|
|
BADF("Read after write with no data\n");
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
} else {
|
2018-11-30 22:38:21 +03:00
|
|
|
smbus_do_write(dev);
|
2007-05-23 04:03:59 +04:00
|
|
|
DPRINTF("Read mode\n");
|
|
|
|
dev->mode = SMBUS_READ_DATA;
|
|
|
|
}
|
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
default:
|
|
|
|
BADF("Unexpected recv start condition in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_FINISH:
|
2018-11-30 22:20:12 +03:00
|
|
|
if (dev->data_len == 0) {
|
|
|
|
if (dev->mode == SMBUS_WRITE_DATA || dev->mode == SMBUS_READ_DATA) {
|
|
|
|
smbus_do_quick_cmd(dev, dev->mode == SMBUS_READ_DATA);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
smbus_do_write(dev);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SMBUS_READ_DATA:
|
|
|
|
BADF("Unexpected stop during receive\n");
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
/* Nothing to do. */
|
|
|
|
break;
|
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
dev->mode = SMBUS_IDLE;
|
|
|
|
dev->data_len = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case I2C_NACK:
|
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_DONE:
|
|
|
|
/* Nothing to do. */
|
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
case SMBUS_READ_DATA:
|
|
|
|
dev->mode = SMBUS_DONE;
|
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
default:
|
|
|
|
BADF("Unexpected NACK in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2017-01-09 14:40:20 +03:00
|
|
|
|
|
|
|
return 0;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2018-11-14 20:50:50 +03:00
|
|
|
static uint8_t smbus_i2c_recv(I2CSlave *s)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
|
|
|
SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
|
2018-11-30 22:49:31 +03:00
|
|
|
uint8_t ret = 0xff;
|
2007-05-23 04:03:59 +04:00
|
|
|
|
|
|
|
switch (dev->mode) {
|
2018-11-30 22:49:31 +03:00
|
|
|
case SMBUS_READ_DATA:
|
2011-12-05 06:39:20 +04:00
|
|
|
if (sc->receive_byte) {
|
|
|
|
ret = sc->receive_byte(dev);
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
DPRINTF("Read data %02x\n", ret);
|
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
default:
|
|
|
|
BADF("Unexpected read in state %d\n", dev->mode);
|
|
|
|
dev->mode = SMBUS_CONFUSED;
|
|
|
|
break;
|
|
|
|
}
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-12-05 06:28:27 +04:00
|
|
|
static int smbus_i2c_send(I2CSlave *s, uint8_t data)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
SMBusDevice *dev = SMBUS_DEVICE(s);
|
2009-05-15 01:35:08 +04:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
switch (dev->mode) {
|
|
|
|
case SMBUS_WRITE_DATA:
|
|
|
|
DPRINTF("Write data %02x\n", data);
|
2018-12-03 15:52:50 +03:00
|
|
|
if (dev->data_len >= sizeof(dev->data_buf)) {
|
|
|
|
BADF("Too many bytes sent\n");
|
|
|
|
} else {
|
|
|
|
dev->data_buf[dev->data_len++] = data;
|
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
break;
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
default:
|
|
|
|
BADF("Unexpected write in state %d\n", dev->mode);
|
|
|
|
break;
|
|
|
|
}
|
2018-11-30 23:04:19 +03:00
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-05 06:39:20 +04:00
|
|
|
static void smbus_device_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
|
|
|
|
|
|
|
|
sc->event = smbus_i2c_event;
|
|
|
|
sc->recv = smbus_i2c_recv;
|
|
|
|
sc->send = smbus_i2c_send;
|
|
|
|
}
|
|
|
|
|
2017-12-07 18:34:59 +03:00
|
|
|
bool smbus_vmstate_needed(SMBusDevice *dev)
|
|
|
|
{
|
|
|
|
return dev->mode != SMBUS_IDLE;
|
|
|
|
}
|
|
|
|
|
|
|
|
const VMStateDescription vmstate_smbus_device = {
|
|
|
|
.name = TYPE_SMBUS_DEVICE,
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_I2C_SLAVE(i2c, SMBusDevice),
|
|
|
|
VMSTATE_INT32(mode, SMBusDevice),
|
|
|
|
VMSTATE_INT32(data_len, SMBusDevice),
|
|
|
|
VMSTATE_UINT8_ARRAY(data_buf, SMBusDevice, SMBUS_DATA_MAX_LEN),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2013-01-10 19:19:07 +04:00
|
|
|
static const TypeInfo smbus_device_type_info = {
|
2011-12-05 06:39:20 +04:00
|
|
|
.name = TYPE_SMBUS_DEVICE,
|
|
|
|
.parent = TYPE_I2C_SLAVE,
|
|
|
|
.instance_size = sizeof(SMBusDevice),
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(SMBusDeviceClass),
|
|
|
|
.class_init = smbus_device_class_init,
|
|
|
|
};
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void smbus_device_register_types(void)
|
2011-12-05 06:39:20 +04:00
|
|
|
{
|
|
|
|
type_register_static(&smbus_device_type_info);
|
|
|
|
}
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(smbus_device_register_types)
|