2003-06-30 14:03:06 +04:00
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/*
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* QEMU System Emulator header
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef VL_H
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#define VL_H
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2004-04-01 03:37:16 +04:00
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <inttypes.h>
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2004-03-31 23:00:16 +04:00
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#include <time.h>
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2004-04-01 03:37:16 +04:00
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#include <ctype.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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2004-05-12 23:32:15 +04:00
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#include <sys/stat.h>
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2004-04-01 03:37:16 +04:00
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0
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#endif
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2004-04-04 16:56:28 +04:00
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#ifndef O_BINARY
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#define O_BINARY 0
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#endif
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2004-04-01 03:37:16 +04:00
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#ifdef _WIN32
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2004-04-25 18:43:10 +04:00
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#define lseek64 _lseeki64
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2004-04-01 03:37:16 +04:00
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#endif
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2004-03-31 23:00:16 +04:00
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2004-02-26 02:25:55 +03:00
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#include "cpu.h"
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2004-04-01 03:37:16 +04:00
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#ifndef glue
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s) tostring(s)
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#define tostring(s) #s
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#endif
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#if defined(WORDS_BIGENDIAN)
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static inline uint32_t be32_to_cpu(uint32_t v)
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{
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return v;
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}
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static inline uint16_t be16_to_cpu(uint16_t v)
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{
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return v;
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}
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2004-04-26 02:08:49 +04:00
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static inline uint32_t cpu_to_be32(uint32_t v)
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{
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return v;
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}
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static inline uint16_t cpu_to_be16(uint16_t v)
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{
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return v;
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}
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2004-04-01 03:37:16 +04:00
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static inline uint32_t le32_to_cpu(uint32_t v)
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{
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return bswap32(v);
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}
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static inline uint16_t le16_to_cpu(uint16_t v)
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{
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return bswap16(v);
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}
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2004-04-26 02:08:49 +04:00
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static inline uint32_t cpu_to_le32(uint32_t v)
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{
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return bswap32(v);
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}
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static inline uint16_t cpu_to_le16(uint16_t v)
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{
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return bswap16(v);
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}
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2004-04-01 03:37:16 +04:00
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#else
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2004-04-26 02:08:49 +04:00
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2004-04-01 03:37:16 +04:00
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static inline uint32_t be32_to_cpu(uint32_t v)
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{
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return bswap32(v);
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}
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static inline uint16_t be16_to_cpu(uint16_t v)
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{
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return bswap16(v);
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}
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2004-04-26 02:08:49 +04:00
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static inline uint32_t cpu_to_be32(uint32_t v)
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{
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return bswap32(v);
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}
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static inline uint16_t cpu_to_be16(uint16_t v)
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{
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return bswap16(v);
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}
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2004-04-01 03:37:16 +04:00
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static inline uint32_t le32_to_cpu(uint32_t v)
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{
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return v;
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}
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static inline uint16_t le16_to_cpu(uint16_t v)
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{
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return v;
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}
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2004-04-26 02:08:49 +04:00
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static inline uint32_t cpu_to_le32(uint32_t v)
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{
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return v;
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}
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static inline uint16_t cpu_to_le16(uint16_t v)
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{
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return v;
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}
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2004-04-01 03:37:16 +04:00
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#endif
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2003-07-06 21:15:21 +04:00
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/* vl.c */
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2003-08-11 01:52:11 +04:00
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extern int reset_requested;
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2004-03-14 15:20:30 +03:00
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
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2003-08-11 01:52:11 +04:00
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2004-03-14 15:20:30 +03:00
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void hw_error(const char *fmt, ...);
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int load_image(const char *filename, uint8_t *addr);
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extern const char *bios_dir;
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void pstrcpy(char *buf, int buf_size, const char *str);
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char *pstrcat(char *buf, int buf_size, const char *s);
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2003-07-06 21:15:21 +04:00
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2004-03-15 00:44:30 +03:00
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int serial_open_device(void);
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2004-03-31 23:00:16 +04:00
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extern int vm_running;
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typedef void VMStopHandler(void *opaque, int reason);
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void vm_start(void);
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void vm_stop(int reason);
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2004-04-27 00:56:53 +04:00
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extern int audio_enabled;
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2004-05-24 01:06:12 +04:00
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extern int ram_size;
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extern int bios_size;
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2004-06-03 16:49:50 +04:00
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extern int rtc_utc;
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2004-05-24 01:06:12 +04:00
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/* XXX: make it dynamic */
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#if defined (TARGET_PPC)
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#define BIOS_SIZE (512 * 1024)
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#else
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#define BIOS_SIZE 0
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#endif
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2004-04-27 00:56:53 +04:00
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2004-06-03 22:45:02 +04:00
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01
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#define MOUSE_EVENT_RBUTTON 0x02
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#define MOUSE_EVENT_MBUTTON 0x04
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typedef void QEMUPutKBDEvent(void *opaque, int keycode);
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
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void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
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void kbd_put_keycode(int keycode);
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
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2004-04-22 03:27:19 +04:00
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
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typedef int IOCanRWHandler(void *opaque);
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int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read, void *opaque);
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void qemu_del_fd_read_handler(int fd);
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2004-03-15 00:44:30 +03:00
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/* network redirectors support */
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#define MAX_NICS 8
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typedef struct NetDriverState {
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2004-04-22 03:27:19 +04:00
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int index; /* index number in QEMU */
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2004-03-15 00:44:30 +03:00
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uint8_t macaddr[6];
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char ifname[16];
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2004-04-22 03:27:19 +04:00
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void (*send_packet)(struct NetDriverState *nd,
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const uint8_t *buf, int size);
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void (*add_read_packet)(struct NetDriverState *nd,
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IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read, void *opaque);
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/* tun specific data */
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int fd;
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/* slirp specific data */
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2004-03-15 00:44:30 +03:00
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} NetDriverState;
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extern int nb_nics;
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extern NetDriverState nd_table[MAX_NICS];
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2004-04-22 03:27:19 +04:00
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void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
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void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
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IOReadHandler *fd_read, void *opaque);
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2004-03-31 23:00:16 +04:00
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/* timers */
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typedef struct QEMUClock QEMUClock;
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typedef struct QEMUTimer QEMUTimer;
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typedef void QEMUTimerCB(void *opaque);
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/* The real time clock should be used only for stuff which does not
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change the virtual machine state, as it is run even if the virtual
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2004-05-19 03:05:28 +04:00
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machine is stopped. The real time clock has a frequency of 1000
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2004-03-31 23:00:16 +04:00
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Hz. */
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extern QEMUClock *rt_clock;
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/* Rge virtual clock is only run during the emulation. It is stopped
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when the virtual machine is stopped. Virtual timers use a high
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precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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int64_t qemu_get_clock(QEMUClock *clock);
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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int qemu_timer_pending(QEMUTimer *ts);
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extern int64_t ticks_per_sec;
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extern int pit_min_timer_count;
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void cpu_enable_ticks(void);
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void cpu_disable_ticks(void);
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/* VM Load/Save */
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typedef FILE QEMUFile;
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void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
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void qemu_put_byte(QEMUFile *f, int v);
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void qemu_put_be16(QEMUFile *f, unsigned int v);
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void qemu_put_be32(QEMUFile *f, unsigned int v);
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void qemu_put_be64(QEMUFile *f, uint64_t v);
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int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
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int qemu_get_byte(QEMUFile *f);
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unsigned int qemu_get_be16(QEMUFile *f);
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unsigned int qemu_get_be32(QEMUFile *f);
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uint64_t qemu_get_be64(QEMUFile *f);
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static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
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{
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qemu_put_be64(f, *pv);
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}
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static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
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{
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qemu_put_be32(f, *pv);
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}
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static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
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{
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qemu_put_be16(f, *pv);
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}
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static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
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{
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qemu_put_byte(f, *pv);
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}
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static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
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{
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*pv = qemu_get_be64(f);
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}
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static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
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{
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*pv = qemu_get_be32(f);
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}
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static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
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{
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*pv = qemu_get_be16(f);
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}
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static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
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{
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*pv = qemu_get_byte(f);
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}
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int64_t qemu_ftell(QEMUFile *f);
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int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
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typedef void SaveStateHandler(QEMUFile *f, void *opaque);
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typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
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int qemu_loadvm(const char *filename);
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int qemu_savevm(const char *filename);
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int register_savevm(const char *idstr,
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int instance_id,
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int version_id,
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SaveStateHandler *save_state,
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LoadStateHandler *load_state,
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void *opaque);
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void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
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void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
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2004-03-15 00:44:30 +03:00
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2003-06-30 14:03:06 +04:00
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/* block.c */
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typedef struct BlockDriverState BlockDriverState;
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2004-03-15 00:44:30 +03:00
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BlockDriverState *bdrv_new(const char *device_name);
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void bdrv_delete(BlockDriverState *bs);
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int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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2003-06-30 14:03:06 +04:00
|
|
|
void bdrv_close(BlockDriverState *bs);
|
|
|
|
int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
|
|
|
uint8_t *buf, int nb_sectors);
|
|
|
|
int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
|
|
|
const uint8_t *buf, int nb_sectors);
|
|
|
|
void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
2003-07-06 21:15:21 +04:00
|
|
|
int bdrv_commit(BlockDriverState *bs);
|
2004-02-17 01:05:46 +03:00
|
|
|
void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
|
2003-07-06 21:15:21 +04:00
|
|
|
|
2004-03-15 00:44:30 +03:00
|
|
|
#define BDRV_TYPE_HD 0
|
|
|
|
#define BDRV_TYPE_CDROM 1
|
|
|
|
#define BDRV_TYPE_FLOPPY 2
|
|
|
|
|
|
|
|
void bdrv_set_geometry_hint(BlockDriverState *bs,
|
|
|
|
int cyls, int heads, int secs);
|
|
|
|
void bdrv_set_type_hint(BlockDriverState *bs, int type);
|
|
|
|
void bdrv_get_geometry_hint(BlockDriverState *bs,
|
|
|
|
int *pcyls, int *pheads, int *psecs);
|
|
|
|
int bdrv_get_type_hint(BlockDriverState *bs);
|
|
|
|
int bdrv_is_removable(BlockDriverState *bs);
|
|
|
|
int bdrv_is_read_only(BlockDriverState *bs);
|
|
|
|
int bdrv_is_inserted(BlockDriverState *bs);
|
|
|
|
int bdrv_is_locked(BlockDriverState *bs);
|
|
|
|
void bdrv_set_locked(BlockDriverState *bs, int locked);
|
|
|
|
void bdrv_set_change_cb(BlockDriverState *bs,
|
|
|
|
void (*change_cb)(void *opaque), void *opaque);
|
|
|
|
|
|
|
|
void bdrv_info(void);
|
|
|
|
BlockDriverState *bdrv_find(const char *name);
|
|
|
|
|
2004-04-29 02:26:05 +04:00
|
|
|
/* ISA bus */
|
|
|
|
|
|
|
|
extern target_phys_addr_t isa_mem_base;
|
|
|
|
|
|
|
|
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
|
|
|
|
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
|
|
|
|
|
|
|
|
int register_ioport_read(int start, int length, int size,
|
|
|
|
IOPortReadFunc *func, void *opaque);
|
|
|
|
int register_ioport_write(int start, int length, int size,
|
|
|
|
IOPortWriteFunc *func, void *opaque);
|
2004-05-19 03:05:28 +04:00
|
|
|
void isa_unassign_ioport(int start, int length);
|
|
|
|
|
|
|
|
/* PCI bus */
|
|
|
|
|
|
|
|
extern int pci_enabled;
|
|
|
|
|
|
|
|
extern target_phys_addr_t pci_mem_base;
|
|
|
|
|
|
|
|
typedef struct PCIDevice PCIDevice;
|
|
|
|
|
|
|
|
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
|
|
|
|
uint32_t address, uint32_t data, int len);
|
|
|
|
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
|
|
|
uint32_t address, int len);
|
|
|
|
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
|
|
|
|
uint32_t addr, uint32_t size, int type);
|
|
|
|
|
|
|
|
#define PCI_ADDRESS_SPACE_MEM 0x00
|
|
|
|
#define PCI_ADDRESS_SPACE_IO 0x01
|
|
|
|
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
|
|
|
|
|
|
|
|
typedef struct PCIIORegion {
|
2004-05-20 16:47:45 +04:00
|
|
|
uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
2004-05-19 03:05:28 +04:00
|
|
|
uint32_t size;
|
|
|
|
uint8_t type;
|
|
|
|
PCIMapIORegionFunc *map_func;
|
|
|
|
} PCIIORegion;
|
|
|
|
|
2004-06-03 18:06:32 +04:00
|
|
|
#define PCI_ROM_SLOT 6
|
|
|
|
#define PCI_NUM_REGIONS 7
|
2004-05-19 03:05:28 +04:00
|
|
|
struct PCIDevice {
|
|
|
|
/* PCI config space */
|
|
|
|
uint8_t config[256];
|
|
|
|
|
|
|
|
/* the following fields are read only */
|
|
|
|
int bus_num;
|
|
|
|
int devfn;
|
|
|
|
char name[64];
|
2004-06-03 18:06:32 +04:00
|
|
|
PCIIORegion io_regions[PCI_NUM_REGIONS];
|
2004-05-19 03:05:28 +04:00
|
|
|
|
|
|
|
/* do not access the following fields */
|
|
|
|
PCIConfigReadFunc *config_read;
|
|
|
|
PCIConfigWriteFunc *config_write;
|
2004-05-20 16:47:45 +04:00
|
|
|
int irq_index;
|
2004-05-19 03:05:28 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
PCIDevice *pci_register_device(const char *name, int instance_size,
|
|
|
|
int bus_num, int devfn,
|
|
|
|
PCIConfigReadFunc *config_read,
|
|
|
|
PCIConfigWriteFunc *config_write);
|
|
|
|
|
|
|
|
void pci_register_io_region(PCIDevice *pci_dev, int region_num,
|
|
|
|
uint32_t size, int type,
|
|
|
|
PCIMapIORegionFunc *map_func);
|
|
|
|
|
2004-05-20 16:47:45 +04:00
|
|
|
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
|
|
|
|
|
|
|
|
uint32_t pci_default_read_config(PCIDevice *d,
|
|
|
|
uint32_t address, int len);
|
|
|
|
void pci_default_write_config(PCIDevice *d,
|
|
|
|
uint32_t address, uint32_t val, int len);
|
|
|
|
|
2004-05-23 23:09:22 +04:00
|
|
|
extern struct PIIX3State *piix3_state;
|
|
|
|
|
2004-05-19 03:05:28 +04:00
|
|
|
void i440fx_init(void);
|
|
|
|
void piix3_init(void);
|
|
|
|
void pci_bios_init(void);
|
2004-05-20 16:47:45 +04:00
|
|
|
void pci_info(void);
|
2004-04-29 02:26:05 +04:00
|
|
|
|
2004-05-27 02:13:53 +04:00
|
|
|
/* temporary: will be moved in platform specific file */
|
|
|
|
void pci_prep_init(void);
|
|
|
|
void pci_pmac_init(void);
|
|
|
|
void pci_ppc_bios_init(void);
|
|
|
|
|
2003-08-11 01:52:11 +04:00
|
|
|
/* vga.c */
|
|
|
|
|
2004-02-06 22:47:52 +03:00
|
|
|
#define VGA_RAM_SIZE (4096 * 1024)
|
2003-08-11 01:52:11 +04:00
|
|
|
|
|
|
|
typedef struct DisplayState {
|
|
|
|
uint8_t *data;
|
|
|
|
int linesize;
|
|
|
|
int depth;
|
|
|
|
void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
|
|
|
|
void (*dpy_resize)(struct DisplayState *s, int w, int h);
|
|
|
|
void (*dpy_refresh)(struct DisplayState *s);
|
|
|
|
} DisplayState;
|
|
|
|
|
|
|
|
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
|
|
|
|
{
|
|
|
|
s->dpy_update(s, x, y, w, h);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dpy_resize(DisplayState *s, int w, int h)
|
|
|
|
{
|
|
|
|
s->dpy_resize(s, w, h);
|
|
|
|
}
|
|
|
|
|
2004-01-05 03:02:28 +03:00
|
|
|
int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
|
2004-05-20 16:47:45 +04:00
|
|
|
unsigned long vga_ram_offset, int vga_ram_size,
|
|
|
|
int is_pci);
|
2003-08-11 01:52:11 +04:00
|
|
|
void vga_update_display(void);
|
2004-03-18 02:17:16 +03:00
|
|
|
void vga_screen_dump(const char *filename);
|
2003-08-11 01:52:11 +04:00
|
|
|
|
|
|
|
/* sdl.c */
|
|
|
|
void sdl_display_init(DisplayState *ds);
|
|
|
|
|
2003-11-11 16:48:59 +03:00
|
|
|
/* ide.c */
|
|
|
|
#define MAX_DISKS 4
|
|
|
|
|
|
|
|
extern BlockDriverState *bs_table[MAX_DISKS];
|
|
|
|
|
2004-05-19 03:05:28 +04:00
|
|
|
void isa_ide_init(int iobase, int iobase2, int irq,
|
|
|
|
BlockDriverState *hd0, BlockDriverState *hd1);
|
|
|
|
void pci_ide_init(BlockDriverState **hd_table);
|
2004-05-23 23:09:22 +04:00
|
|
|
void pci_piix3_ide_init(BlockDriverState **hd_table);
|
2003-11-11 16:48:59 +03:00
|
|
|
|
2003-11-13 04:46:15 +03:00
|
|
|
/* oss.c */
|
|
|
|
typedef enum {
|
|
|
|
AUD_FMT_U8,
|
|
|
|
AUD_FMT_S8,
|
|
|
|
AUD_FMT_U16,
|
|
|
|
AUD_FMT_S16
|
|
|
|
} audfmt_e;
|
|
|
|
|
|
|
|
void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
|
|
|
|
void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
|
|
|
|
int AUD_write (void *in_buf, int size);
|
|
|
|
void AUD_run (void);
|
|
|
|
void AUD_adjust_estimate (int _leftover);
|
|
|
|
int AUD_get_free (void);
|
|
|
|
int AUD_get_live (void);
|
|
|
|
int AUD_get_buffer_size (void);
|
|
|
|
void AUD_init (void);
|
|
|
|
|
|
|
|
/* dma.c */
|
2004-02-26 02:25:55 +03:00
|
|
|
typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size);
|
2003-11-13 04:46:15 +03:00
|
|
|
int DMA_get_channel_mode (int nchan);
|
|
|
|
void DMA_hold_DREQ (int nchan);
|
|
|
|
void DMA_release_DREQ (int nchan);
|
2004-02-26 02:25:55 +03:00
|
|
|
void DMA_schedule(int nchan);
|
2003-11-13 04:46:15 +03:00
|
|
|
void DMA_run (void);
|
|
|
|
void DMA_init (void);
|
|
|
|
void DMA_register_channel (int nchan,
|
2004-02-26 02:25:55 +03:00
|
|
|
DMA_transfer_handler transfer_handler, void *opaque);
|
2003-11-13 04:46:15 +03:00
|
|
|
|
|
|
|
/* sb16.c */
|
|
|
|
void SB16_run (void);
|
|
|
|
void SB16_init (void);
|
|
|
|
|
2004-01-05 03:02:28 +03:00
|
|
|
/* fdc.c */
|
|
|
|
#define MAX_FD 2
|
|
|
|
extern BlockDriverState *fd_table[MAX_FD];
|
|
|
|
|
2004-03-20 02:05:34 +03:00
|
|
|
typedef struct fdctrl_t fdctrl_t;
|
|
|
|
|
|
|
|
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
|
|
|
|
uint32_t io_base,
|
|
|
|
BlockDriverState **fds);
|
|
|
|
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
|
2004-01-05 03:02:28 +03:00
|
|
|
|
2004-03-14 15:20:30 +03:00
|
|
|
/* ne2000.c */
|
|
|
|
|
2004-05-19 03:05:28 +04:00
|
|
|
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
|
|
|
|
void pci_ne2000_init(NetDriverState *nd);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* pckbd.c */
|
|
|
|
|
|
|
|
void kbd_init(void);
|
|
|
|
|
|
|
|
/* mc146818rtc.c */
|
|
|
|
|
2004-03-31 23:00:16 +04:00
|
|
|
typedef struct RTCState RTCState;
|
2004-03-14 15:20:30 +03:00
|
|
|
|
2004-03-31 23:00:16 +04:00
|
|
|
RTCState *rtc_init(int base, int irq);
|
|
|
|
void rtc_set_memory(RTCState *s, int addr, int val);
|
|
|
|
void rtc_set_date(RTCState *s, const struct tm *tm);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* serial.c */
|
|
|
|
|
2004-03-15 00:44:30 +03:00
|
|
|
typedef struct SerialState SerialState;
|
|
|
|
|
|
|
|
extern SerialState *serial_console;
|
|
|
|
|
|
|
|
SerialState *serial_init(int base, int irq, int fd);
|
|
|
|
int serial_can_receive(SerialState *s);
|
|
|
|
void serial_receive_byte(SerialState *s, int ch);
|
|
|
|
void serial_receive_break(SerialState *s);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* i8259.c */
|
|
|
|
|
|
|
|
void pic_set_irq(int irq, int level);
|
|
|
|
void pic_init(void);
|
2004-04-13 00:54:52 +04:00
|
|
|
uint32_t pic_intack_read(CPUState *env);
|
2004-04-22 03:27:19 +04:00
|
|
|
void pic_info(void);
|
2004-05-21 15:39:07 +04:00
|
|
|
void irq_info(void);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* i8254.c */
|
|
|
|
|
|
|
|
#define PIT_FREQ 1193182
|
|
|
|
|
2004-05-04 03:18:25 +04:00
|
|
|
typedef struct PITState PITState;
|
|
|
|
|
|
|
|
PITState *pit_init(int base, int irq);
|
|
|
|
void pit_set_gate(PITState *pit, int channel, int val);
|
|
|
|
int pit_get_gate(PITState *pit, int channel);
|
|
|
|
int pit_get_out(PITState *pit, int channel, int64_t current_time);
|
2004-03-14 15:20:30 +03:00
|
|
|
|
|
|
|
/* pc.c */
|
|
|
|
void pc_init(int ram_size, int vga_ram_size, int boot_device,
|
|
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename);
|
|
|
|
|
2004-04-29 02:26:05 +04:00
|
|
|
/* ppc.c */
|
|
|
|
void ppc_init (int ram_size, int vga_ram_size, int boot_device,
|
|
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename);
|
2004-05-27 02:13:53 +04:00
|
|
|
void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
|
|
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename);
|
|
|
|
void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
|
|
|
|
DisplayState *ds, const char **fd_filename, int snapshot,
|
|
|
|
const char *kernel_filename, const char *kernel_cmdline,
|
|
|
|
const char *initrd_filename);
|
2004-05-27 03:29:15 +04:00
|
|
|
#ifdef TARGET_PPC
|
|
|
|
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
|
|
|
|
#endif
|
2004-05-27 02:55:16 +04:00
|
|
|
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
|
2004-05-27 02:13:53 +04:00
|
|
|
|
|
|
|
extern CPUWriteMemoryFunc *PPC_io_write[];
|
|
|
|
extern CPUReadMemoryFunc *PPC_io_read[];
|
|
|
|
extern int prep_enabled;
|
2004-04-29 02:26:05 +04:00
|
|
|
|
2004-05-27 02:55:16 +04:00
|
|
|
/* NVRAM helpers */
|
|
|
|
#include "hw/m48t59.h"
|
|
|
|
|
|
|
|
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
|
|
|
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
|
|
|
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
|
|
|
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
|
|
|
|
void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
|
|
|
const unsigned char *str, uint32_t max);
|
|
|
|
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
|
|
|
|
void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
|
|
|
uint32_t start, uint32_t count);
|
|
|
|
int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
|
|
|
const unsigned char *arch,
|
|
|
|
uint32_t RAM_size, int boot_device,
|
|
|
|
uint32_t kernel_image, uint32_t kernel_size,
|
|
|
|
uint32_t cmdline, uint32_t cmdline_size,
|
|
|
|
uint32_t initrd_image, uint32_t initrd_size,
|
|
|
|
uint32_t NVRAM_image);
|
|
|
|
|
2004-06-03 22:45:02 +04:00
|
|
|
/* adb.c */
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#define MAX_ADB_DEVICES 16
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typedef struct ADBDevice ADBDevice;
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typedef void ADBDeviceReceivePacket(ADBDevice *d, const uint8_t *buf, int len);
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struct ADBDevice {
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struct ADBBusState *bus;
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int devaddr;
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int handler;
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ADBDeviceReceivePacket *receive_packet;
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void *opaque;
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};
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typedef struct ADBBusState {
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ADBDevice devices[MAX_ADB_DEVICES];
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int nb_devices;
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} ADBBusState;
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void adb_receive_packet(ADBBusState *s, const uint8_t *buf, int len);
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void adb_send_packet(ADBBusState *s, const uint8_t *buf, int len);
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ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
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ADBDeviceReceivePacket *receive_packet,
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void *opaque);
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void adb_kbd_init(ADBBusState *bus);
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void adb_mouse_init(ADBBusState *bus);
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/* cuda.c */
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extern ADBBusState adb_bus;
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int cuda_init(void);
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2004-03-15 00:44:30 +03:00
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/* monitor.c */
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void monitor_init(void);
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2004-04-04 16:56:28 +04:00
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void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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2004-03-15 00:44:30 +03:00
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void term_flush(void);
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void term_print_help(void);
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2004-03-31 23:00:16 +04:00
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/* gdbstub.c */
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#define DEFAULT_GDBSTUB_PORT 1234
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int gdbserver_start(int port);
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2003-06-30 14:03:06 +04:00
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#endif /* VL_H */
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