30 lines
985 B
C
30 lines
985 B
C
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/*
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* RISC-V CPU related code
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*
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* Copyright (c) 2019 Mark Corbin
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "target_arch.h"
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#define TP_OFFSET 16
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/* Compare with cpu_set_user_tls() in riscv/riscv/vm_machdep.c */
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void target_cpu_set_tls(CPURISCVState *env, target_ulong newtls)
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{
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env->gpr[xTP] = newtls + TP_OFFSET;
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}
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