2011-04-01 08:15:20 +04:00
|
|
|
/*
|
|
|
|
* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
|
|
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*
|
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|
|
* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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* Copyright (c) 2010 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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2012-12-17 21:20:04 +04:00
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#include "sysemu/sysemu.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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2011-04-01 08:15:20 +04:00
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|
#include "elf.h"
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2012-10-24 10:43:34 +04:00
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#include "net/net.h"
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2012-12-17 21:20:04 +04:00
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#include "sysemu/blockdev.h"
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#include "sysemu/cpus.h"
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|
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#include "sysemu/kvm.h"
|
2011-09-30 01:39:10 +04:00
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|
#include "kvm_ppc.h"
|
2013-07-18 23:33:01 +04:00
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|
#include "mmu-hash64.h"
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2011-04-01 08:15:20 +04:00
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|
|
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|
|
#include "hw/boards.h"
|
2013-02-05 20:06:20 +04:00
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|
#include "hw/ppc/ppc.h"
|
2011-04-01 08:15:20 +04:00
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|
|
#include "hw/loader.h"
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|
|
|
2013-02-05 20:06:20 +04:00
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|
|
#include "hw/ppc/spapr.h"
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|
|
#include "hw/ppc/spapr_vio.h"
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|
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#include "hw/pci-host/spapr.h"
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|
|
#include "hw/ppc/xics.h"
|
2012-12-12 16:24:50 +04:00
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|
#include "hw/pci/msi.h"
|
2011-04-01 08:15:20 +04:00
|
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|
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/pci/pci.h"
|
2011-08-09 19:57:37 +04:00
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|
2012-12-17 21:19:49 +04:00
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|
#include "exec/address-spaces.h"
|
2012-08-16 06:03:56 +04:00
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|
|
#include "hw/usb.h"
|
2012-12-17 21:20:00 +04:00
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|
#include "qemu/config-file.h"
|
2011-10-03 14:56:38 +04:00
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2011-04-01 08:15:20 +04:00
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#include <libfdt.h>
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|
2012-01-11 23:46:28 +04:00
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/* SLOF memory layout:
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*
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* SLOF raw image loaded at 0, copies its romfs right below the flat
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* device-tree, then position SLOF itself 31M below that
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*
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* So we set FW_OVERHEAD to 40MB which should account for all of that
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* and more
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*
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* We load our kernel at 4M, leaving space for SLOF initial image
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|
|
*/
|
2013-09-24 09:59:55 +04:00
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|
|
#define FDT_MAX_SIZE 0x40000
|
2011-04-01 08:15:23 +04:00
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|
|
#define RTAS_MAX_SIZE 0x10000
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
#define FW_MAX_SIZE 0x400000
|
|
|
|
#define FW_FILE_NAME "slof.bin"
|
2012-01-11 23:46:28 +04:00
|
|
|
#define FW_OVERHEAD 0x2800000
|
|
|
|
#define KERNEL_LOAD_ADDR FW_MAX_SIZE
|
Add SLOF-based partition firmware for pSeries machine, allowing more boot options
Currently, the emulated pSeries machine requires the use of the
-kernel parameter in order to explicitly load a guest kernel. This
means booting from the virtual disk, cdrom or network is not possible.
This patch addresses this limitation by inserting a within-partition
firmware image (derived from the "SLOF" free Open Firmware project).
If -kernel is not specified, qemu will now load the SLOF image, which
has access to the qemu boot device list through the device tree, and
can boot from any of the usual virtual devices.
In order to support the new firmware, an extension to the emulated
machine/hypervisor is necessary. Unlike Linux, which expects
multi-CPU entry to be handled kexec() style, the SLOF firmware expects
only one CPU to be active at entry, and to use a hypervisor RTAS
method to enable the other CPUs one by one.
This patch also implements this 'start-cpu' method, so that SLOF can
start the secondary CPUs and marshal them into the kexec() holding
pattern ready for entry into the guest OS. Linux should, and in the
future might directly use the start-cpu method to enable initially
disabled CPUs, but for now it does require kexec() entry.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:34 +04:00
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
#define MIN_RMA_SLOF 128UL
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
#define TIMEBASE_FREQ 512000000ULL
|
|
|
|
|
2011-04-19 05:54:50 +04:00
|
|
|
#define MAX_CPUS 256
|
2012-01-11 23:46:28 +04:00
|
|
|
#define XICS_IRQS 1024
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-08-04 01:02:17 +04:00
|
|
|
#define PHANDLE_XICP 0x00001111
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
#define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
sPAPREnvironment *spapr;
|
|
|
|
|
2012-09-12 20:57:18 +04:00
|
|
|
int spapr_allocate_irq(int hint, bool lsi)
|
2011-09-16 00:49:49 +04:00
|
|
|
{
|
2012-08-07 20:10:32 +04:00
|
|
|
int irq;
|
2011-09-16 00:49:49 +04:00
|
|
|
|
|
|
|
if (hint) {
|
|
|
|
irq = hint;
|
2013-07-12 11:38:24 +04:00
|
|
|
if (hint >= spapr->next_irq) {
|
|
|
|
spapr->next_irq = hint + 1;
|
|
|
|
}
|
2011-09-16 00:49:49 +04:00
|
|
|
/* FIXME: we should probably check for collisions somehow */
|
|
|
|
} else {
|
|
|
|
irq = spapr->next_irq++;
|
|
|
|
}
|
|
|
|
|
2012-08-07 20:10:32 +04:00
|
|
|
/* Configure irq type */
|
|
|
|
if (!xics_get_qirq(spapr->icp, irq)) {
|
|
|
|
return 0;
|
2011-09-16 00:49:49 +04:00
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:18 +04:00
|
|
|
xics_set_irq_type(spapr->icp, irq, lsi);
|
2011-09-16 00:49:49 +04:00
|
|
|
|
2012-08-07 20:10:32 +04:00
|
|
|
return irq;
|
2011-09-16 00:49:49 +04:00
|
|
|
}
|
|
|
|
|
2013-07-12 11:38:24 +04:00
|
|
|
/*
|
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|
|
* Allocate block of consequtive IRQs, returns a number of the first.
|
|
|
|
* If msi==true, aligns the first IRQ number to num.
|
|
|
|
*/
|
|
|
|
int spapr_allocate_irq_block(int num, bool lsi, bool msi)
|
2012-08-07 20:10:34 +04:00
|
|
|
{
|
|
|
|
int first = -1;
|
2013-07-12 11:38:24 +04:00
|
|
|
int i, hint = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MSIMesage::data is used for storing VIRQ so
|
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|
|
* it has to be aligned to num to support multiple
|
|
|
|
* MSI vectors. MSI-X is not affected by this.
|
|
|
|
* The hint is used for the first IRQ, the rest should
|
2013-10-10 22:53:40 +04:00
|
|
|
* be allocated continuously.
|
2013-07-12 11:38:24 +04:00
|
|
|
*/
|
|
|
|
if (msi) {
|
|
|
|
assert((num == 1) || (num == 2) || (num == 4) ||
|
|
|
|
(num == 8) || (num == 16) || (num == 32));
|
|
|
|
hint = (spapr->next_irq + num - 1) & ~(num - 1);
|
|
|
|
}
|
2012-08-07 20:10:34 +04:00
|
|
|
|
|
|
|
for (i = 0; i < num; ++i) {
|
|
|
|
int irq;
|
|
|
|
|
2013-07-12 11:38:24 +04:00
|
|
|
irq = spapr_allocate_irq(hint, lsi);
|
2012-08-07 20:10:34 +04:00
|
|
|
if (!irq) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (0 == i) {
|
|
|
|
first = irq;
|
2013-07-12 11:38:24 +04:00
|
|
|
hint = 0;
|
2012-08-07 20:10:34 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* If the above doesn't create a consecutive block then that's
|
|
|
|
* an internal bug */
|
|
|
|
assert(irq == (first + i));
|
|
|
|
}
|
|
|
|
|
|
|
|
return first;
|
|
|
|
}
|
|
|
|
|
xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:
- One ICP per processor thread (the "presenter"). This contains the
registers to fetch a pending interrupt (ack), EOI, and control the
processor priority.
- One ICS per logical source of interrupts (ie, one per PCI host
bridge, and a few others here or there). This contains the per-interrupt
source configuration (target processor(s), priority, mask) and the
per-interrupt internal state.
Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
oddball what pHyp does here, arguably there are two but we can ignore
that distinction). There is no register level access. A pair of firmware
(RTAS) calls is used to configure each virtual interrupt.
So our model here is somewhat the same. We have one ICS in the emulated
XICS which arguably *is* the emulated XICS, there's no point making it a
separate "device", that would just be gross, and each VCPU has an
associated ICP.
Yet we call the "XICS" struct icp_state and then the ICPs
'struct icp_server_state'. It's particularly confusing when all of the
functions have xics_prefixes yet take *icp arguments.
Rename:
struct icp_state -> XICSState
struct icp_server_state -> ICPState
struct ics_state -> ICSState
struct ics_irq_state -> ICSIRQState
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
[aik: added ics_resend() on post_load]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18 23:33:04 +04:00
|
|
|
static XICSState *try_create_xics(const char *type, int nr_servers,
|
|
|
|
int nr_irqs)
|
|
|
|
{
|
|
|
|
DeviceState *dev;
|
|
|
|
|
|
|
|
dev = qdev_create(NULL, type);
|
|
|
|
qdev_prop_set_uint32(dev, "nr_servers", nr_servers);
|
|
|
|
qdev_prop_set_uint32(dev, "nr_irqs", nr_irqs);
|
|
|
|
if (qdev_init(dev) < 0) {
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2013-09-26 10:18:42 +04:00
|
|
|
return XICS_COMMON(dev);
|
xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:
- One ICP per processor thread (the "presenter"). This contains the
registers to fetch a pending interrupt (ack), EOI, and control the
processor priority.
- One ICS per logical source of interrupts (ie, one per PCI host
bridge, and a few others here or there). This contains the per-interrupt
source configuration (target processor(s), priority, mask) and the
per-interrupt internal state.
Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
oddball what pHyp does here, arguably there are two but we can ignore
that distinction). There is no register level access. A pair of firmware
(RTAS) calls is used to configure each virtual interrupt.
So our model here is somewhat the same. We have one ICS in the emulated
XICS which arguably *is* the emulated XICS, there's no point making it a
separate "device", that would just be gross, and each VCPU has an
associated ICP.
Yet we call the "XICS" struct icp_state and then the ICPs
'struct icp_server_state'. It's particularly confusing when all of the
functions have xics_prefixes yet take *icp arguments.
Rename:
struct icp_state -> XICSState
struct icp_server_state -> ICPState
struct ics_state -> ICSState
struct ics_irq_state -> ICSIRQState
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
[aik: added ics_resend() on post_load]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18 23:33:04 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static XICSState *xics_system_init(int nr_servers, int nr_irqs)
|
|
|
|
{
|
|
|
|
XICSState *icp = NULL;
|
|
|
|
|
2013-09-26 10:18:44 +04:00
|
|
|
if (kvm_enabled()) {
|
|
|
|
QemuOpts *machine_opts = qemu_get_machine_opts();
|
|
|
|
bool irqchip_allowed = qemu_opt_get_bool(machine_opts,
|
|
|
|
"kernel_irqchip", true);
|
|
|
|
bool irqchip_required = qemu_opt_get_bool(machine_opts,
|
|
|
|
"kernel_irqchip", false);
|
|
|
|
if (irqchip_allowed) {
|
|
|
|
icp = try_create_xics(TYPE_KVM_XICS, nr_servers, nr_irqs);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (irqchip_required && !icp) {
|
|
|
|
perror("Failed to create in-kernel XICS\n");
|
|
|
|
abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!icp) {
|
|
|
|
icp = try_create_xics(TYPE_XICS, nr_servers, nr_irqs);
|
|
|
|
}
|
|
|
|
|
xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:
- One ICP per processor thread (the "presenter"). This contains the
registers to fetch a pending interrupt (ack), EOI, and control the
processor priority.
- One ICS per logical source of interrupts (ie, one per PCI host
bridge, and a few others here or there). This contains the per-interrupt
source configuration (target processor(s), priority, mask) and the
per-interrupt internal state.
Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
oddball what pHyp does here, arguably there are two but we can ignore
that distinction). There is no register level access. A pair of firmware
(RTAS) calls is used to configure each virtual interrupt.
So our model here is somewhat the same. We have one ICS in the emulated
XICS which arguably *is* the emulated XICS, there's no point making it a
separate "device", that would just be gross, and each VCPU has an
associated ICP.
Yet we call the "XICS" struct icp_state and then the ICPs
'struct icp_server_state'. It's particularly confusing when all of the
functions have xics_prefixes yet take *icp arguments.
Rename:
struct icp_state -> XICSState
struct icp_server_state -> ICPState
struct ics_state -> ICSState
struct ics_irq_state -> ICSIRQState
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
[aik: added ics_resend() on post_load]
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-18 23:33:04 +04:00
|
|
|
if (!icp) {
|
|
|
|
perror("Failed to create XICS\n");
|
|
|
|
abort();
|
|
|
|
}
|
|
|
|
|
|
|
|
return icp;
|
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
|
2011-12-12 22:24:30 +04:00
|
|
|
{
|
|
|
|
int ret = 0, offset;
|
2012-12-17 07:22:03 +04:00
|
|
|
CPUState *cpu;
|
2011-12-12 22:24:30 +04:00
|
|
|
char cpu_model[32];
|
|
|
|
int smt = kvmppc_smt_threads();
|
2012-09-12 20:57:12 +04:00
|
|
|
uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
|
2011-12-12 22:24:30 +04:00
|
|
|
|
2013-06-25 01:50:24 +04:00
|
|
|
CPU_FOREACH(cpu) {
|
2013-10-15 20:33:37 +04:00
|
|
|
DeviceClass *dc = DEVICE_GET_CLASS(cpu);
|
2011-12-12 22:24:30 +04:00
|
|
|
uint32_t associativity[] = {cpu_to_be32(0x5),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0),
|
2012-12-17 07:22:03 +04:00
|
|
|
cpu_to_be32(cpu->numa_node),
|
2012-12-17 09:18:02 +04:00
|
|
|
cpu_to_be32(cpu->cpu_index)};
|
2011-12-12 22:24:30 +04:00
|
|
|
|
2012-12-17 09:18:02 +04:00
|
|
|
if ((cpu->cpu_index % smt) != 0) {
|
2011-12-12 22:24:30 +04:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2013-10-15 20:33:37 +04:00
|
|
|
snprintf(cpu_model, 32, "/cpus/%s@%x", dc->fw_name,
|
2012-12-17 09:18:02 +04:00
|
|
|
cpu->cpu_index);
|
2011-12-12 22:24:30 +04:00
|
|
|
|
|
|
|
offset = fdt_path_offset(fdt, cpu_model);
|
|
|
|
if (offset < 0) {
|
|
|
|
return offset;
|
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
if (nb_numa_nodes > 1) {
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity));
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = fdt_setprop(fdt, offset, "ibm,pft-size",
|
|
|
|
pft_size_prop, sizeof(pft_size_prop));
|
2011-12-12 22:24:30 +04:00
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-06-18 23:56:30 +04:00
|
|
|
|
|
|
|
static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
|
|
|
|
size_t maxsize)
|
|
|
|
{
|
|
|
|
size_t maxcells = maxsize / sizeof(uint32_t);
|
|
|
|
int i, j, count;
|
|
|
|
uint32_t *p = prop;
|
|
|
|
|
|
|
|
for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) {
|
|
|
|
struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
|
|
|
|
|
|
|
|
if (!sps->page_shift) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) {
|
|
|
|
if (sps->enc[count].page_shift == 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((p - prop) >= (maxcells - 3 - count * 2)) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
*(p++) = cpu_to_be32(sps->page_shift);
|
|
|
|
*(p++) = cpu_to_be32(sps->slb_enc);
|
|
|
|
*(p++) = cpu_to_be32(count);
|
|
|
|
for (j = 0; j < count; j++) {
|
|
|
|
*(p++) = cpu_to_be32(sps->enc[j].page_shift);
|
|
|
|
*(p++) = cpu_to_be32(sps->enc[j].pte_enc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (p - prop) * sizeof(uint32_t);
|
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
#define _FDT(exp) \
|
|
|
|
do { \
|
|
|
|
int ret = (exp); \
|
|
|
|
if (ret < 0) { \
|
|
|
|
fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
|
|
|
|
#exp, fdt_strerror(ret)); \
|
|
|
|
exit(1); \
|
|
|
|
} \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
2013-10-15 20:33:37 +04:00
|
|
|
static void *spapr_create_fdt_skel(hwaddr initrd_base,
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr initrd_size,
|
|
|
|
hwaddr kernel_size,
|
2013-09-25 11:40:15 +04:00
|
|
|
bool little_endian,
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
const char *boot_device,
|
2012-10-08 22:17:39 +04:00
|
|
|
const char *kernel_cmdline,
|
|
|
|
uint32_t epow_irq)
|
2011-04-01 08:15:20 +04:00
|
|
|
{
|
|
|
|
void *fdt;
|
2013-05-30 00:29:20 +04:00
|
|
|
CPUState *cs;
|
2011-04-01 08:15:20 +04:00
|
|
|
uint32_t start_prop = cpu_to_be32(initrd_base);
|
|
|
|
uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size);
|
2011-04-01 08:15:28 +04:00
|
|
|
char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt"
|
2013-08-19 15:04:20 +04:00
|
|
|
"\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk\0hcall-set-mode";
|
2012-06-19 00:21:37 +04:00
|
|
|
char qemu_hypertas_prop[] = "hcall-memop1";
|
2012-09-12 20:57:12 +04:00
|
|
|
uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
|
2012-09-12 20:57:12 +04:00
|
|
|
int i, smt = kvmppc_smt_threads();
|
2011-12-12 22:24:30 +04:00
|
|
|
unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
fdt = g_malloc0(FDT_MAX_SIZE);
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_create(fdt, FDT_MAX_SIZE)));
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
if (kernel_size) {
|
|
|
|
_FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size)));
|
|
|
|
}
|
|
|
|
if (initrd_size) {
|
|
|
|
_FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size)));
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_finish_reservemap(fdt)));
|
|
|
|
|
|
|
|
/* Root node */
|
|
|
|
_FDT((fdt_begin_node(fdt, "")));
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "chrp")));
|
2011-04-19 05:54:51 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)")));
|
2013-02-25 23:27:12 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "compatible", "qemu,pseries")));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
|
|
|
|
|
|
|
|
/* /chosen */
|
|
|
|
_FDT((fdt_begin_node(fdt, "chosen")));
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* Set Form1_affinity */
|
|
|
|
_FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5))));
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
|
|
|
|
_FDT((fdt_property(fdt, "linux,initrd-start",
|
|
|
|
&start_prop, sizeof(start_prop))));
|
|
|
|
_FDT((fdt_property(fdt, "linux,initrd-end",
|
|
|
|
&end_prop, sizeof(end_prop))));
|
2012-01-11 23:46:28 +04:00
|
|
|
if (kernel_size) {
|
|
|
|
uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
|
|
|
|
cpu_to_be64(kernel_size) };
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
_FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop))));
|
2013-09-25 11:40:15 +04:00
|
|
|
if (little_endian) {
|
|
|
|
_FDT((fdt_property(fdt, "qemu,boot-kernel-le", NULL, 0)));
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
}
|
2013-01-08 11:06:31 +04:00
|
|
|
if (boot_device) {
|
|
|
|
_FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
|
|
|
|
}
|
2012-08-06 20:42:00 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
|
2011-10-30 21:16:46 +04:00
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
|
|
|
/* cpus */
|
|
|
|
_FDT((fdt_begin_node(fdt, "cpus")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
|
|
|
|
|
2013-06-25 01:50:24 +04:00
|
|
|
CPU_FOREACH(cs) {
|
2013-05-30 00:29:20 +04:00
|
|
|
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
|
|
|
CPUPPCState *env = &cpu->env;
|
2013-10-15 20:33:37 +04:00
|
|
|
DeviceClass *dc = DEVICE_GET_CLASS(cs);
|
2013-05-30 00:29:20 +04:00
|
|
|
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
|
|
|
|
int index = cs->cpu_index;
|
2011-09-30 01:39:10 +04:00
|
|
|
uint32_t servers_prop[smp_threads];
|
|
|
|
uint32_t gservers_prop[smp_threads * 2];
|
2011-04-01 08:15:20 +04:00
|
|
|
char *nodename;
|
|
|
|
uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40),
|
|
|
|
0xffffffff, 0xffffffff};
|
2011-08-09 20:07:13 +04:00
|
|
|
uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ;
|
|
|
|
uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
2012-06-18 23:56:30 +04:00
|
|
|
uint32_t page_sizes_prop[64];
|
|
|
|
size_t page_sizes_prop_size;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-09-30 01:39:10 +04:00
|
|
|
if ((index % smt) != 0) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2013-10-15 20:33:37 +04:00
|
|
|
nodename = g_strdup_printf("%s@%x", dc->fw_name, index);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
|
|
|
_FDT((fdt_begin_node(fdt, nodename)));
|
|
|
|
|
2013-01-16 21:22:29 +04:00
|
|
|
g_free(nodename);
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "reg", index)));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "cpu")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
2013-04-07 23:08:19 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "d-cache-block-size",
|
2011-04-01 08:15:20 +04:00
|
|
|
env->dcache_line_size)));
|
2013-04-07 23:08:19 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "d-cache-line-size",
|
|
|
|
env->dcache_line_size)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "i-cache-block-size",
|
|
|
|
env->icache_line_size)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "i-cache-line-size",
|
2011-04-01 08:15:20 +04:00
|
|
|
env->icache_line_size)));
|
2013-04-07 23:08:19 +04:00
|
|
|
|
|
|
|
if (pcc->l1_dcache_size) {
|
|
|
|
_FDT((fdt_property_cell(fdt, "d-cache-size", pcc->l1_dcache_size)));
|
|
|
|
} else {
|
|
|
|
fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n");
|
|
|
|
}
|
|
|
|
if (pcc->l1_icache_size) {
|
|
|
|
_FDT((fdt_property_cell(fdt, "i-cache-size", pcc->l1_icache_size)));
|
|
|
|
} else {
|
|
|
|
fprintf(stderr, "Warning: Unknown L1 icache size for cpu\n");
|
|
|
|
}
|
|
|
|
|
2011-08-09 20:07:13 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
|
|
|
_FDT((fdt_property_string(fdt, "status", "okay")));
|
|
|
|
_FDT((fdt_property(fdt, "64-bit", NULL, 0)));
|
2011-09-30 01:39:10 +04:00
|
|
|
|
|
|
|
/* Build interrupt servers and gservers properties */
|
|
|
|
for (i = 0; i < smp_threads; i++) {
|
|
|
|
servers_prop[i] = cpu_to_be32(index + i);
|
|
|
|
/* Hack, direct the group queues back to cpu 0 */
|
|
|
|
gservers_prop[i*2] = cpu_to_be32(index + i);
|
|
|
|
gservers_prop[i*2 + 1] = 0;
|
|
|
|
}
|
|
|
|
_FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
|
|
|
servers_prop, sizeof(servers_prop))));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
2011-09-30 01:39:10 +04:00
|
|
|
gservers_prop, sizeof(gservers_prop))));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2013-09-27 12:11:51 +04:00
|
|
|
if (env->spr_cb[SPR_PURR].oea_read) {
|
|
|
|
_FDT((fdt_property(fdt, "ibm,purr", NULL, 0)));
|
|
|
|
}
|
|
|
|
|
2011-04-05 09:12:09 +04:00
|
|
|
if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
|
|
|
segs, sizeof(segs))));
|
|
|
|
}
|
|
|
|
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
/* Advertise VMX/VSX (vector extensions) if available
|
|
|
|
* 0 / no property == no vector extensions
|
|
|
|
* 1 == VMX / Altivec available
|
|
|
|
* 2 == VSX available */
|
2011-10-17 22:15:41 +04:00
|
|
|
if (env->insns_flags & PPC_ALTIVEC) {
|
|
|
|
uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1;
|
|
|
|
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Advertise DFP (Decimal Floating Point) if available
|
|
|
|
* 0 / no property == no DFP
|
|
|
|
* 1 == DFP available */
|
2011-10-17 22:15:41 +04:00
|
|
|
if (env->insns_flags2 & PPC2_DFP) {
|
|
|
|
_FDT((fdt_property_cell(fdt, "ibm,dfp", 1)));
|
pseries: Add device tree properties for VMX/VSX and DFP under kvm
Sufficiently recent PAPR specifications define properties "ibm,vmx"
and "ibm,dfp" on the CPU node which advertise whether the VMX vector
extensions (or the later VSX version) and/or the Decimal Floating
Point operations from IBM's recent POWER CPUs are available.
Currently we do not put these in the guest device tree and the guest
kernel will consequently assume they are not available. This is good,
because they are not supported under TCG. VMX is similar enough to
Altivec that it might be trivial to support, but VSX and DFP would
both require significant work to support in TCG.
However, when running under kvm on a host which supports these
instructions, there's no reason not to let the guest use them. This
patch, therefore, checks for the relevant support on the host CPU
and, if present, advertises them to the guest as well.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-10 22:31:01 +04:00
|
|
|
}
|
|
|
|
|
2012-06-18 23:56:30 +04:00
|
|
|
page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop,
|
|
|
|
sizeof(page_sizes_prop));
|
|
|
|
if (page_sizes_prop_size) {
|
|
|
|
_FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
|
|
|
page_sizes_prop, page_sizes_prop_size)));
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
}
|
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-04-01 08:15:22 +04:00
|
|
|
/* RTAS */
|
|
|
|
_FDT((fdt_begin_node(fdt, "rtas")));
|
|
|
|
|
|
|
|
_FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
|
|
|
sizeof(hypertas_prop))));
|
2012-06-19 00:21:37 +04:00
|
|
|
_FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
|
|
|
sizeof(qemu_hypertas_prop))));
|
2011-04-01 08:15:22 +04:00
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
_FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
|
|
|
refpoints, sizeof(refpoints))));
|
|
|
|
|
2012-10-08 22:17:39 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
|
|
|
|
|
2011-04-01 08:15:22 +04:00
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
/* interrupt controller */
|
2011-08-04 01:02:18 +04:00
|
|
|
_FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type",
|
|
|
|
"PowerPC-External-Interrupt-Presentation")));
|
|
|
|
_FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp")));
|
|
|
|
_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
|
|
|
|
_FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
|
|
|
interrupt_server_ranges_prop,
|
|
|
|
sizeof(interrupt_server_ranges_prop))));
|
2011-08-04 01:02:17 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "#interrupt-cells", 2)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2011-04-01 08:15:21 +04:00
|
|
|
/* vdevice */
|
|
|
|
_FDT((fdt_begin_node(fdt, "vdevice")));
|
|
|
|
|
|
|
|
_FDT((fdt_property_string(fdt, "device_type", "vdevice")));
|
|
|
|
_FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice")));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
|
|
|
|
_FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
_FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2)));
|
|
|
|
_FDT((fdt_property(fdt, "interrupt-controller", NULL, 0)));
|
2011-04-01 08:15:21 +04:00
|
|
|
|
|
|
|
_FDT((fdt_end_node(fdt)));
|
|
|
|
|
2012-10-08 22:17:39 +04:00
|
|
|
/* event-sources */
|
|
|
|
spapr_events_fdt_skel(fdt, epow_irq);
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
_FDT((fdt_end_node(fdt))); /* close root node */
|
|
|
|
_FDT((fdt_finish(fdt)));
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
return fdt;
|
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt)
|
|
|
|
{
|
|
|
|
uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0), cpu_to_be32(0x0),
|
|
|
|
cpu_to_be32(0x0)};
|
|
|
|
char mem_name[32];
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr node0_size, mem_start;
|
2012-09-12 20:57:12 +04:00
|
|
|
uint64_t mem_reg_property[2];
|
|
|
|
int i, off;
|
|
|
|
|
|
|
|
/* memory node(s) */
|
|
|
|
node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size;
|
|
|
|
if (spapr->rma_size > node0_size) {
|
|
|
|
spapr->rma_size = node0_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* RMA */
|
|
|
|
mem_reg_property[0] = 0;
|
|
|
|
mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
|
|
|
|
off = fdt_add_subnode(fdt, 0, "memory@0");
|
|
|
|
_FDT(off);
|
|
|
|
_FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
|
|
|
|
|
|
|
/* RAM: Node 0 */
|
|
|
|
if (node0_size > spapr->rma_size) {
|
|
|
|
mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
|
|
|
|
mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
|
|
|
|
|
|
|
|
sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
|
|
|
|
off = fdt_add_subnode(fdt, 0, mem_name);
|
|
|
|
_FDT(off);
|
|
|
|
_FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* RAM: Node 1 and beyond */
|
|
|
|
mem_start = node0_size;
|
|
|
|
for (i = 1; i < nb_numa_nodes; i++) {
|
|
|
|
mem_reg_property[0] = cpu_to_be64(mem_start);
|
|
|
|
mem_reg_property[1] = cpu_to_be64(node_mem[i]);
|
|
|
|
associativity[3] = associativity[4] = cpu_to_be32(i);
|
|
|
|
sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
|
|
|
off = fdt_add_subnode(fdt, 0, mem_name);
|
|
|
|
_FDT(off);
|
|
|
|
_FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
|
|
|
sizeof(mem_reg_property))));
|
|
|
|
_FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
|
|
|
sizeof(associativity))));
|
|
|
|
mem_start += node_mem[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
static void spapr_finalize_fdt(sPAPREnvironment *spapr,
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr fdt_addr,
|
|
|
|
hwaddr rtas_addr,
|
|
|
|
hwaddr rtas_size)
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
void *fdt;
|
2011-10-30 21:16:46 +04:00
|
|
|
sPAPRPHBState *phb;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
fdt = g_malloc(FDT_MAX_SIZE);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
|
|
|
/* open out the base tree into a temp buffer for the final tweaks */
|
|
|
|
_FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE)));
|
2011-04-01 08:15:21 +04:00
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
ret = spapr_populate_memory(spapr, fdt);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "couldn't setup memory nodes in fdt\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:21 +04:00
|
|
|
ret = spapr_populate_vdevice(spapr->vio_bus, fdt);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-10-30 21:16:46 +04:00
|
|
|
QLIST_FOREACH(phb, &spapr->phbs, list) {
|
2012-06-13 22:40:06 +04:00
|
|
|
ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt);
|
2011-10-30 21:16:46 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
/* RTAS */
|
|
|
|
ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
|
|
|
}
|
|
|
|
|
2011-12-12 22:24:30 +04:00
|
|
|
/* Advertise NUMA via ibm,associativity */
|
2012-09-12 20:57:12 +04:00
|
|
|
ret = spapr_fixup_cpu_dt(fdt, spapr);
|
|
|
|
if (ret < 0) {
|
|
|
|
fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
|
2011-12-12 22:24:30 +04:00
|
|
|
}
|
|
|
|
|
2012-08-14 15:22:13 +04:00
|
|
|
if (!spapr->has_graphics) {
|
2012-08-06 20:42:00 +04:00
|
|
|
spapr_populate_chosen_stdout(fdt, spapr->vio_bus);
|
|
|
|
}
|
2011-12-13 08:24:34 +04:00
|
|
|
|
2011-04-01 08:15:21 +04:00
|
|
|
_FDT((fdt_pack(fdt)));
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
|
|
|
hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
|
|
|
fdt_totalsize(fdt), FDT_MAX_SIZE);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt));
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(fdt);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
|
|
|
|
{
|
|
|
|
return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
|
|
|
|
}
|
|
|
|
|
2012-05-03 08:03:45 +04:00
|
|
|
static void emulate_spapr_hypercall(PowerPCCPU *cpu)
|
2011-04-01 08:15:20 +04:00
|
|
|
{
|
2012-05-03 08:03:45 +04:00
|
|
|
CPUPPCState *env = &cpu->env;
|
|
|
|
|
2012-09-25 21:12:20 +04:00
|
|
|
if (msr_pr) {
|
|
|
|
hcall_dprintf("Hypercall made with MSR[PR]=1\n");
|
|
|
|
env->gpr[3] = H_PRIVILEGE;
|
|
|
|
} else {
|
2012-05-03 08:13:14 +04:00
|
|
|
env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]);
|
2012-09-25 21:12:20 +04:00
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
static void spapr_reset_htab(sPAPREnvironment *spapr)
|
|
|
|
{
|
|
|
|
long shift;
|
|
|
|
|
|
|
|
/* allocate hash page table. For now we always make this 16mb,
|
|
|
|
* later we should probably make it scale to the size of guest
|
|
|
|
* RAM */
|
|
|
|
|
|
|
|
shift = kvmppc_reset_htab(spapr->htab_shift);
|
|
|
|
|
|
|
|
if (shift > 0) {
|
|
|
|
/* Kernel handles htab, we don't need to allocate one */
|
|
|
|
spapr->htab_shift = shift;
|
|
|
|
} else {
|
|
|
|
if (!spapr->htab) {
|
|
|
|
/* Allocate an htab if we don't yet have one */
|
|
|
|
spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* And clear it */
|
|
|
|
memset(spapr->htab, 0, HTAB_SIZE(spapr));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Update the RMA size if necessary */
|
|
|
|
if (spapr->vrma_adjust) {
|
|
|
|
spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift);
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:11 +04:00
|
|
|
static void ppc_spapr_reset(void)
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
{
|
2013-05-30 00:29:20 +04:00
|
|
|
PowerPCCPU *first_ppc_cpu;
|
2013-01-17 21:51:17 +04:00
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
/* Reset the hash table & recalc the RMA */
|
|
|
|
spapr_reset_htab(spapr);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
2012-09-12 20:57:11 +04:00
|
|
|
qemu_devices_reset();
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
|
|
|
/* Load the fdt */
|
|
|
|
spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr,
|
|
|
|
spapr->rtas_size);
|
|
|
|
|
|
|
|
/* Set up the entry state */
|
2013-05-30 00:29:20 +04:00
|
|
|
first_ppc_cpu = POWERPC_CPU(first_cpu);
|
|
|
|
first_ppc_cpu->env.gpr[3] = spapr->fdt_addr;
|
|
|
|
first_ppc_cpu->env.gpr[5] = 0;
|
|
|
|
first_cpu->halted = 0;
|
|
|
|
first_ppc_cpu->env.nip = spapr->entry_point;
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
|
|
|
}
|
|
|
|
|
2012-02-08 06:03:33 +04:00
|
|
|
static void spapr_cpu_reset(void *opaque)
|
|
|
|
{
|
2012-05-04 19:49:38 +04:00
|
|
|
PowerPCCPU *cpu = opaque;
|
2013-01-17 21:51:17 +04:00
|
|
|
CPUState *cs = CPU(cpu);
|
2012-09-12 20:57:10 +04:00
|
|
|
CPUPPCState *env = &cpu->env;
|
2012-02-08 06:03:33 +04:00
|
|
|
|
2013-01-17 21:51:17 +04:00
|
|
|
cpu_reset(cs);
|
2012-09-12 20:57:10 +04:00
|
|
|
|
|
|
|
/* All CPUs start halted. CPU0 is unhalted from the machine level
|
|
|
|
* reset code and the rest are explicitly started up by the guest
|
|
|
|
* using an RTAS call */
|
2013-01-17 21:51:17 +04:00
|
|
|
cs->halted = 1;
|
2012-09-12 20:57:10 +04:00
|
|
|
|
|
|
|
env->spr[SPR_HIOR] = 0;
|
2012-09-12 20:57:12 +04:00
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
env->external_htab = (uint8_t *)spapr->htab;
|
2012-09-12 20:57:12 +04:00
|
|
|
env->htab_base = -1;
|
|
|
|
env->htab_mask = HTAB_SIZE(spapr) - 1;
|
2013-06-20 01:08:29 +04:00
|
|
|
env->spr[SPR_SDR1] = (target_ulong)(uintptr_t)spapr->htab |
|
2012-09-12 20:57:12 +04:00
|
|
|
(spapr->htab_shift - 18);
|
2012-02-08 06:03:33 +04:00
|
|
|
}
|
|
|
|
|
2012-11-12 20:46:57 +04:00
|
|
|
static void spapr_create_nvram(sPAPREnvironment *spapr)
|
|
|
|
{
|
2013-07-04 17:09:22 +04:00
|
|
|
DeviceState *dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
|
|
|
|
const char *drivename = qemu_opt_get(qemu_get_machine_opts(), "nvram");
|
2012-11-12 20:46:57 +04:00
|
|
|
|
2013-07-04 17:09:22 +04:00
|
|
|
if (drivename) {
|
|
|
|
BlockDriverState *bs;
|
2012-11-12 20:46:57 +04:00
|
|
|
|
2013-07-04 17:09:22 +04:00
|
|
|
bs = bdrv_find(drivename);
|
|
|
|
if (!bs) {
|
|
|
|
fprintf(stderr, "No such block device \"%s\" for nvram\n",
|
|
|
|
drivename);
|
|
|
|
exit(1);
|
2012-11-12 20:46:57 +04:00
|
|
|
}
|
2013-07-04 17:09:22 +04:00
|
|
|
qdev_prop_set_drive_nofail(dev, "drive", bs);
|
2012-11-12 20:46:57 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
qdev_init_nofail(dev);
|
|
|
|
|
|
|
|
spapr->nvram = (struct sPAPRNVRAM *)dev;
|
|
|
|
}
|
|
|
|
|
2012-08-14 15:11:49 +04:00
|
|
|
/* Returns whether we want to use VGA or not */
|
2012-08-06 20:42:00 +04:00
|
|
|
static int spapr_vga_init(PCIBus *pci_bus)
|
|
|
|
{
|
2012-08-14 15:11:49 +04:00
|
|
|
switch (vga_interface_type) {
|
|
|
|
case VGA_NONE:
|
2012-09-08 14:40:45 +04:00
|
|
|
case VGA_STD:
|
|
|
|
return pci_vga_init(pci_bus) != NULL;
|
2012-08-14 15:11:49 +04:00
|
|
|
default:
|
2012-08-06 20:42:00 +04:00
|
|
|
fprintf(stderr, "This vga model is not supported,"
|
|
|
|
"currently it only supports -vga std\n");
|
2012-08-14 15:11:49 +04:00
|
|
|
exit(0);
|
|
|
|
break;
|
2012-08-06 20:42:00 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
static const VMStateDescription vmstate_spapr = {
|
|
|
|
.name = "spapr",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.minimum_version_id_old = 1,
|
|
|
|
.fields = (VMStateField []) {
|
|
|
|
VMSTATE_UINT32(next_irq, sPAPREnvironment),
|
|
|
|
|
|
|
|
/* RTC offset */
|
|
|
|
VMSTATE_UINT64(rtc_offset, sPAPREnvironment),
|
|
|
|
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
#define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
|
|
|
|
#define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
|
|
|
|
#define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
|
|
|
|
#define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
|
|
|
|
|
|
|
|
static int htab_save_setup(QEMUFile *f, void *opaque)
|
|
|
|
{
|
|
|
|
sPAPREnvironment *spapr = opaque;
|
|
|
|
|
|
|
|
/* "Iteration" header */
|
|
|
|
qemu_put_be32(f, spapr->htab_shift);
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (spapr->htab) {
|
|
|
|
spapr->htab_save_index = 0;
|
|
|
|
spapr->htab_first_pass = true;
|
|
|
|
} else {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
|
|
|
spapr->htab_fd = kvmppc_get_htab_fd(false);
|
|
|
|
if (spapr->htab_fd < 0) {
|
|
|
|
fprintf(stderr, "Unable to open fd for reading hash table from KVM: %s\n",
|
|
|
|
strerror(errno));
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void htab_save_first_pass(QEMUFile *f, sPAPREnvironment *spapr,
|
|
|
|
int64_t max_ns)
|
|
|
|
{
|
|
|
|
int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
|
|
|
|
int index = spapr->htab_save_index;
|
2013-08-21 19:03:08 +04:00
|
|
|
int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
|
2013-07-18 23:33:01 +04:00
|
|
|
|
|
|
|
assert(spapr->htab_first_pass);
|
|
|
|
|
|
|
|
do {
|
|
|
|
int chunkstart;
|
|
|
|
|
|
|
|
/* Consume invalid HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& !HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
index++;
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Consume valid HPTEs */
|
|
|
|
chunkstart = index;
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
index++;
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index > chunkstart) {
|
|
|
|
int n_valid = index - chunkstart;
|
|
|
|
|
|
|
|
qemu_put_be32(f, chunkstart);
|
|
|
|
qemu_put_be16(f, n_valid);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
|
|
|
|
HASH_PTE_SIZE_64 * n_valid);
|
|
|
|
|
2013-08-21 19:03:08 +04:00
|
|
|
if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
|
2013-07-18 23:33:01 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} while ((index < htabslots) && !qemu_file_rate_limit(f));
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
spapr->htab_first_pass = false;
|
|
|
|
}
|
|
|
|
spapr->htab_save_index = index;
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
static int htab_save_later_pass(QEMUFile *f, sPAPREnvironment *spapr,
|
|
|
|
int64_t max_ns)
|
2013-07-18 23:33:01 +04:00
|
|
|
{
|
|
|
|
bool final = max_ns < 0;
|
|
|
|
int htabslots = HTAB_SIZE(spapr) / HASH_PTE_SIZE_64;
|
|
|
|
int examined = 0, sent = 0;
|
|
|
|
int index = spapr->htab_save_index;
|
2013-08-21 19:03:08 +04:00
|
|
|
int64_t starttime = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
|
2013-07-18 23:33:01 +04:00
|
|
|
|
|
|
|
assert(!spapr->htab_first_pass);
|
|
|
|
|
|
|
|
do {
|
|
|
|
int chunkstart, invalidstart;
|
|
|
|
|
|
|
|
/* Consume non-dirty HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& !HPTE_DIRTY(HPTE(spapr->htab, index))) {
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
chunkstart = index;
|
|
|
|
/* Consume valid dirty HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& HPTE_DIRTY(HPTE(spapr->htab, index))
|
|
|
|
&& HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
invalidstart = index;
|
|
|
|
/* Consume invalid dirty HPTEs */
|
|
|
|
while ((index < htabslots)
|
|
|
|
&& HPTE_DIRTY(HPTE(spapr->htab, index))
|
|
|
|
&& !HPTE_VALID(HPTE(spapr->htab, index))) {
|
|
|
|
CLEAN_HPTE(HPTE(spapr->htab, index));
|
|
|
|
index++;
|
|
|
|
examined++;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index > chunkstart) {
|
|
|
|
int n_valid = invalidstart - chunkstart;
|
|
|
|
int n_invalid = index - invalidstart;
|
|
|
|
|
|
|
|
qemu_put_be32(f, chunkstart);
|
|
|
|
qemu_put_be16(f, n_valid);
|
|
|
|
qemu_put_be16(f, n_invalid);
|
|
|
|
qemu_put_buffer(f, HPTE(spapr->htab, chunkstart),
|
|
|
|
HASH_PTE_SIZE_64 * n_valid);
|
|
|
|
sent += index - chunkstart;
|
|
|
|
|
2013-08-21 19:03:08 +04:00
|
|
|
if (!final && (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) > max_ns) {
|
2013-07-18 23:33:01 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (examined >= htabslots) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
}
|
|
|
|
} while ((examined < htabslots) && (!qemu_file_rate_limit(f) || final));
|
|
|
|
|
|
|
|
if (index >= htabslots) {
|
|
|
|
assert(index == htabslots);
|
|
|
|
index = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
spapr->htab_save_index = index;
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
return (examined >= htabslots) && (sent == 0) ? 1 : 0;
|
2013-07-18 23:33:01 +04:00
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
#define MAX_ITERATION_NS 5000000 /* 5 ms */
|
|
|
|
#define MAX_KVM_BUF_SIZE 2048
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
static int htab_save_iterate(QEMUFile *f, void *opaque)
|
|
|
|
{
|
|
|
|
sPAPREnvironment *spapr = opaque;
|
2013-07-18 23:33:03 +04:00
|
|
|
int rc = 0;
|
2013-07-18 23:33:01 +04:00
|
|
|
|
|
|
|
/* Iteration header */
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
|
|
|
rc = kvmppc_save_htab(f, spapr->htab_fd,
|
|
|
|
MAX_KVM_BUF_SIZE, MAX_ITERATION_NS);
|
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
} else if (spapr->htab_first_pass) {
|
2013-07-18 23:33:01 +04:00
|
|
|
htab_save_first_pass(f, spapr, MAX_ITERATION_NS);
|
|
|
|
} else {
|
2013-07-18 23:33:03 +04:00
|
|
|
rc = htab_save_later_pass(f, spapr, MAX_ITERATION_NS);
|
2013-07-18 23:33:01 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* End marker */
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
return rc;
|
2013-07-18 23:33:01 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int htab_save_complete(QEMUFile *f, void *opaque)
|
|
|
|
{
|
|
|
|
sPAPREnvironment *spapr = opaque;
|
|
|
|
|
|
|
|
/* Iteration header */
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (!spapr->htab) {
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
|
|
|
rc = kvmppc_save_htab(f, spapr->htab_fd, MAX_KVM_BUF_SIZE, -1);
|
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
close(spapr->htab_fd);
|
|
|
|
spapr->htab_fd = -1;
|
|
|
|
} else {
|
|
|
|
htab_save_later_pass(f, spapr, -1);
|
|
|
|
}
|
2013-07-18 23:33:01 +04:00
|
|
|
|
|
|
|
/* End marker */
|
|
|
|
qemu_put_be32(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
qemu_put_be16(f, 0);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int htab_load(QEMUFile *f, void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
sPAPREnvironment *spapr = opaque;
|
|
|
|
uint32_t section_hdr;
|
2013-07-18 23:33:03 +04:00
|
|
|
int fd = -1;
|
2013-07-18 23:33:01 +04:00
|
|
|
|
|
|
|
if (version_id < 1 || version_id > 1) {
|
|
|
|
fprintf(stderr, "htab_load() bad version\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
section_hdr = qemu_get_be32(f);
|
|
|
|
|
|
|
|
if (section_hdr) {
|
|
|
|
/* First section, just the hash shift */
|
|
|
|
if (spapr->htab_shift != section_hdr) {
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(kvm_enabled());
|
|
|
|
|
|
|
|
fd = kvmppc_get_htab_fd(true);
|
|
|
|
if (fd < 0) {
|
|
|
|
fprintf(stderr, "Unable to open fd to restore KVM hash table: %s\n",
|
|
|
|
strerror(errno));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
while (true) {
|
|
|
|
uint32_t index;
|
|
|
|
uint16_t n_valid, n_invalid;
|
|
|
|
|
|
|
|
index = qemu_get_be32(f);
|
|
|
|
n_valid = qemu_get_be16(f);
|
|
|
|
n_invalid = qemu_get_be16(f);
|
|
|
|
|
|
|
|
if ((index == 0) && (n_valid == 0) && (n_invalid == 0)) {
|
|
|
|
/* End of Stream */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if ((index + n_valid + n_invalid) >
|
2013-07-18 23:33:01 +04:00
|
|
|
(HTAB_SIZE(spapr) / HASH_PTE_SIZE_64)) {
|
|
|
|
/* Bad index in stream */
|
|
|
|
fprintf(stderr, "htab_load() bad index %d (%hd+%hd entries) "
|
2013-07-18 23:33:03 +04:00
|
|
|
"in htab stream (htab_shift=%d)\n", index, n_valid, n_invalid,
|
|
|
|
spapr->htab_shift);
|
2013-07-18 23:33:01 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (spapr->htab) {
|
|
|
|
if (n_valid) {
|
|
|
|
qemu_get_buffer(f, HPTE(spapr->htab, index),
|
|
|
|
HASH_PTE_SIZE_64 * n_valid);
|
|
|
|
}
|
|
|
|
if (n_invalid) {
|
|
|
|
memset(HPTE(spapr->htab, index + n_valid), 0,
|
|
|
|
HASH_PTE_SIZE_64 * n_invalid);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
assert(fd >= 0);
|
|
|
|
|
|
|
|
rc = kvmppc_load_htab_chunk(f, fd, index, n_valid, n_invalid);
|
|
|
|
if (rc < 0) {
|
|
|
|
return rc;
|
|
|
|
}
|
2013-07-18 23:33:01 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:03 +04:00
|
|
|
if (!spapr->htab) {
|
|
|
|
assert(fd >= 0);
|
|
|
|
close(fd);
|
|
|
|
}
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static SaveVMHandlers savevm_htab_handlers = {
|
|
|
|
.save_live_setup = htab_save_setup,
|
|
|
|
.save_live_iterate = htab_save_iterate,
|
|
|
|
.save_live_complete = htab_save_complete,
|
|
|
|
.load_state = htab_load,
|
|
|
|
};
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* pSeries LPAR / sPAPR hardware init */
|
2012-10-16 00:22:02 +04:00
|
|
|
static void ppc_spapr_init(QEMUMachineInitArgs *args)
|
2011-04-01 08:15:20 +04:00
|
|
|
{
|
2012-10-16 00:22:02 +04:00
|
|
|
ram_addr_t ram_size = args->ram_size;
|
|
|
|
const char *cpu_model = args->cpu_model;
|
|
|
|
const char *kernel_filename = args->kernel_filename;
|
|
|
|
const char *kernel_cmdline = args->kernel_cmdline;
|
|
|
|
const char *initrd_filename = args->initrd_filename;
|
hw: Clean up bogus default boot order
We set default boot order "cad" in every single machine definition
except "pseries" and "moxiesim", even though very few boards actually
care for boot order, and "cad" makes sense for even fewer.
Machines that care:
* pc and its variants
Accept up to three letters 'a', 'b' (undocumented alias for 'a'),
'c', 'd' and 'n'. Reject all others (fatal with -boot).
* nseries (n800, n810)
Check whether order starts with 'n'. Silently ignored otherwise.
* prep, g3beige, mac99
Extract the first character the machine understands (subset of
'a'..'f'). Silently ignored otherwise.
* spapr
Accept an arbitrary string (vl.c restricts it to contain only
'a'..'p', no duplicates).
* sun4[mdc]
Use the first character. Silently ignored otherwise.
Strip characters these machines ignore from their default boot order.
For all other machines, remove the unused default boot order
alltogether.
Note that my rename of QEMUMachine member boot_order to
default_boot_order and QEMUMachineInitArgs member boot_device to
boot_order has a welcome side effect: it makes every use of boot
orders visible in this patch, for easy review.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-08-16 15:13:50 +04:00
|
|
|
const char *boot_device = args->boot_order;
|
2012-05-03 07:45:10 +04:00
|
|
|
PowerPCCPU *cpu;
|
2012-03-14 04:38:23 +04:00
|
|
|
CPUPPCState *env;
|
2012-08-20 21:08:05 +04:00
|
|
|
PCIHostState *phb;
|
2011-04-01 08:15:20 +04:00
|
|
|
int i;
|
2011-10-03 14:56:38 +04:00
|
|
|
MemoryRegion *sysmem = get_system_memory();
|
|
|
|
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr rma_alloc_size;
|
2012-01-11 23:46:28 +04:00
|
|
|
uint32_t initrd_base = 0;
|
|
|
|
long kernel_size = 0, initrd_size = 0;
|
|
|
|
long load_limit, rtas_limit, fw_size;
|
2013-09-25 11:40:15 +04:00
|
|
|
bool kernel_le = false;
|
2011-04-01 08:15:23 +04:00
|
|
|
char *filename;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2012-08-07 20:10:37 +04:00
|
|
|
msi_supported = true;
|
|
|
|
|
2011-11-01 20:49:05 +04:00
|
|
|
spapr = g_malloc0(sizeof(*spapr));
|
|
|
|
QLIST_INIT(&spapr->phbs);
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
cpu_ppc_hypercall = emulate_spapr_hypercall;
|
|
|
|
|
2011-09-30 01:39:11 +04:00
|
|
|
/* Allocate RMA if necessary */
|
|
|
|
rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
|
|
|
|
|
|
|
if (rma_alloc_size == -1) {
|
|
|
|
hw_error("qemu: Unable to create RMA\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-09-12 20:57:12 +04:00
|
|
|
|
2011-09-30 01:39:11 +04:00
|
|
|
if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
2012-09-12 20:57:12 +04:00
|
|
|
spapr->rma_size = rma_alloc_size;
|
2011-09-30 01:39:11 +04:00
|
|
|
} else {
|
2012-09-12 20:57:12 +04:00
|
|
|
spapr->rma_size = ram_size;
|
|
|
|
|
|
|
|
/* With KVM, we don't actually know whether KVM supports an
|
|
|
|
* unbounded RMA (PR KVM) or is limited by the hash table size
|
|
|
|
* (HV KVM using VRMA), so we always assume the latter
|
|
|
|
*
|
|
|
|
* In that case, we also limit the initial allocations for RTAS
|
|
|
|
* etc... to 256M since we have no way to know what the VRMA size
|
|
|
|
* is going to be as it depends on the size of the hash table
|
|
|
|
* isn't determined yet.
|
|
|
|
*/
|
|
|
|
if (kvm_enabled()) {
|
|
|
|
spapr->vrma_adjust = 1;
|
|
|
|
spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
|
|
|
|
}
|
2011-09-30 01:39:11 +04:00
|
|
|
}
|
|
|
|
|
2012-01-11 23:46:28 +04:00
|
|
|
/* We place the device tree and RTAS just below either the top of the RMA,
|
2011-09-30 01:39:11 +04:00
|
|
|
* or just below 2GB, whichever is lowere, so that it can be
|
|
|
|
* processed with 32-bit real mode code if necessary */
|
2012-09-12 20:57:12 +04:00
|
|
|
rtas_limit = MIN(spapr->rma_size, 0x80000000);
|
2012-01-11 23:46:28 +04:00
|
|
|
spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE;
|
|
|
|
spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE;
|
|
|
|
load_limit = spapr->fdt_addr - FW_OVERHEAD;
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2012-09-20 21:42:27 +04:00
|
|
|
/* We aim for a hash table of size 1/128 the size of RAM. The
|
|
|
|
* normal rule of thumb is 1/64 the size of RAM, but that's much
|
|
|
|
* more than needed for the Linux guests we support. */
|
|
|
|
spapr->htab_shift = 18; /* Minimum architected size */
|
|
|
|
while (spapr->htab_shift <= 46) {
|
|
|
|
if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
spapr->htab_shift++;
|
|
|
|
}
|
2012-09-12 20:57:12 +04:00
|
|
|
|
2013-03-13 19:53:28 +04:00
|
|
|
/* Set up Interrupt Controller before we create the VCPUs */
|
|
|
|
spapr->icp = xics_system_init(smp_cpus * kvmppc_smt_threads() / smp_threads,
|
|
|
|
XICS_IRQS);
|
|
|
|
spapr->next_irq = XICS_IRQ_BASE;
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* init CPUs */
|
|
|
|
if (cpu_model == NULL) {
|
2011-10-13 02:40:34 +04:00
|
|
|
cpu_model = kvm_enabled() ? "host" : "POWER7";
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
for (i = 0; i < smp_cpus; i++) {
|
2012-05-03 07:45:10 +04:00
|
|
|
cpu = cpu_ppc_init(cpu_model);
|
|
|
|
if (cpu == NULL) {
|
2011-04-01 08:15:20 +04:00
|
|
|
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-05-03 07:45:10 +04:00
|
|
|
env = &cpu->env;
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* Set time-base frequency to 512 MHz */
|
|
|
|
cpu_ppc_tb_init(env, TIMEBASE_FREQ);
|
|
|
|
|
2013-03-29 06:06:27 +04:00
|
|
|
/* PAPR always has exception vectors in RAM not ROM. To ensure this,
|
|
|
|
* MSR[IP] should never be set.
|
|
|
|
*/
|
|
|
|
env->msr_mask &= ~(1 << 6);
|
2012-09-12 20:57:10 +04:00
|
|
|
|
|
|
|
/* Tell KVM that we're in PAPR mode */
|
|
|
|
if (kvm_enabled()) {
|
2012-10-31 09:06:49 +04:00
|
|
|
kvmppc_set_papr(cpu);
|
2012-09-12 20:57:10 +04:00
|
|
|
}
|
|
|
|
|
2013-09-26 10:18:37 +04:00
|
|
|
xics_cpu_setup(spapr->icp, cpu);
|
|
|
|
|
2012-09-12 20:57:10 +04:00
|
|
|
qemu_register_reset(spapr_cpu_reset, cpu);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* allocate RAM */
|
2011-08-04 01:02:19 +04:00
|
|
|
spapr->ram_limit = ram_size;
|
2011-09-30 01:39:11 +04:00
|
|
|
if (spapr->ram_limit > rma_alloc_size) {
|
|
|
|
ram_addr_t nonrma_base = rma_alloc_size;
|
|
|
|
ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size;
|
|
|
|
|
2013-06-06 13:41:28 +04:00
|
|
|
memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size);
|
2011-12-20 17:59:12 +04:00
|
|
|
vmstate_register_ram_global(ram);
|
2011-09-30 01:39:11 +04:00
|
|
|
memory_region_add_subregion(sysmem, nonrma_base, ram);
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2011-04-01 08:15:23 +04:00
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr,
|
2012-01-11 23:46:28 +04:00
|
|
|
rtas_limit - spapr->rtas_addr);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
if (spapr->rtas_size < 0) {
|
2011-04-01 08:15:23 +04:00
|
|
|
hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
|
|
|
hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
|
|
|
spapr->rtas_size, RTAS_MAX_SIZE);
|
|
|
|
exit(1);
|
|
|
|
}
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(filename);
|
2011-04-01 08:15:23 +04:00
|
|
|
|
2012-10-08 22:17:39 +04:00
|
|
|
/* Set up EPOW events infrastructure */
|
|
|
|
spapr_events_init(spapr);
|
|
|
|
|
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically divided
into ICS (Interrupt Control Presentation, each unit is responsible for
presenting interrupts to a particular "interrupt server", i.e. CPU) and
ICS (Interrupt Control Source, each unit responsible for one or more
hardware interrupts as numbered globally across the system). All PAPR
virtual IO devices expect to deliver interrupts via this mechanism. In
Linux, this interrupt controller system is handled by the "xics" driver.
On pSeries systems, access to the interrupt controller is virtualized via
hypercalls and RTAS methods. However, the virtualized interface is very
similar to the underlying interrupt controller hardware, and similar PICs
exist un-virtualized in some other systems.
This patch implements both the ICP and ICS sides of the PAPR interrupt
controller. For now, only the hypercall virtualized interface is provided,
however it would be relatively straightforward to graft an emulated
register interface onto the underlying interrupt logic if we want to add
a machine with a hardware ICS/ICP system in the future.
There are some limitations in this implementation: it is assumed for now
that only one instance of the ICS exists, although a full xics system can
have several, each responsible for a different group of hardware irqs.
ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
interrupt inputs. For now, this implementation supports only MSI
interrupts, since that is used by PAPR virtual IO devices.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-01 08:15:25 +04:00
|
|
|
/* Set up VIO bus */
|
2011-04-01 08:15:21 +04:00
|
|
|
spapr->vio_bus = spapr_vio_bus_init();
|
|
|
|
|
2011-05-26 13:52:44 +04:00
|
|
|
for (i = 0; i < MAX_SERIAL_PORTS; i++) {
|
2011-04-01 08:15:21 +04:00
|
|
|
if (serial_hds[i]) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vty_create(spapr->vio_bus, serial_hds[i]);
|
2011-04-01 08:15:21 +04:00
|
|
|
}
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
|
2012-11-12 20:46:57 +04:00
|
|
|
/* We always have at least the nvram device on VIO */
|
|
|
|
spapr_create_nvram(spapr);
|
|
|
|
|
2011-10-30 21:16:46 +04:00
|
|
|
/* Set up PCI */
|
2013-07-12 11:38:24 +04:00
|
|
|
spapr_pci_msi_init(spapr, SPAPR_PCI_MSI_WINDOW);
|
2012-08-07 20:10:33 +04:00
|
|
|
spapr_pci_rtas_init();
|
|
|
|
|
2013-03-13 19:53:25 +04:00
|
|
|
phb = spapr_create_phb(spapr, 0);
|
2011-10-30 21:16:46 +04:00
|
|
|
|
2011-05-26 13:52:44 +04:00
|
|
|
for (i = 0; i < nb_nics; i++) {
|
2011-04-01 08:15:29 +04:00
|
|
|
NICInfo *nd = &nd_table[i];
|
|
|
|
|
|
|
|
if (!nd->model) {
|
2011-08-21 07:09:37 +04:00
|
|
|
nd->model = g_strdup("ibmveth");
|
2011-04-01 08:15:29 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (strcmp(nd->model, "ibmveth") == 0) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vlan_create(spapr->vio_bus, nd);
|
2011-04-01 08:15:29 +04:00
|
|
|
} else {
|
2013-06-06 12:48:51 +04:00
|
|
|
pci_nic_init_nofail(&nd_table[i], phb->bus, nd->model, NULL);
|
2011-04-01 08:15:29 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:31 +04:00
|
|
|
for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) {
|
2012-04-25 21:55:41 +04:00
|
|
|
spapr_vscsi_create(spapr->vio_bus);
|
2011-04-01 08:15:31 +04:00
|
|
|
}
|
|
|
|
|
2012-08-06 20:42:00 +04:00
|
|
|
/* Graphics */
|
2012-08-20 21:08:05 +04:00
|
|
|
if (spapr_vga_init(phb->bus)) {
|
2012-08-14 15:22:13 +04:00
|
|
|
spapr->has_graphics = true;
|
2012-08-06 20:42:00 +04:00
|
|
|
}
|
|
|
|
|
2012-09-02 23:25:28 +04:00
|
|
|
if (usb_enabled(spapr->has_graphics)) {
|
2012-08-20 21:08:05 +04:00
|
|
|
pci_create_simple(phb->bus, -1, "pci-ohci");
|
2012-08-16 06:03:56 +04:00
|
|
|
if (spapr->has_graphics) {
|
|
|
|
usbdevice_create("keyboard");
|
|
|
|
usbdevice_create("mouse");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-09-12 20:57:12 +04:00
|
|
|
if (spapr->rma_size < (MIN_RMA_SLOF << 20)) {
|
2012-01-11 23:46:28 +04:00
|
|
|
fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
|
|
|
"%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
if (kernel_filename) {
|
|
|
|
uint64_t lowaddr = 0;
|
|
|
|
|
|
|
|
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
|
|
|
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
|
2013-09-25 11:40:15 +04:00
|
|
|
if (kernel_size < 0) {
|
|
|
|
kernel_size = load_elf(kernel_filename,
|
|
|
|
translate_kernel_address, NULL,
|
|
|
|
NULL, &lowaddr, NULL, 0, ELF_MACHINE, 0);
|
|
|
|
kernel_le = kernel_size > 0;
|
|
|
|
}
|
2011-04-01 08:15:20 +04:00
|
|
|
if (kernel_size < 0) {
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
kernel_size = load_image_targphys(kernel_filename,
|
|
|
|
KERNEL_LOAD_ADDR,
|
2012-01-11 23:46:28 +04:00
|
|
|
load_limit - KERNEL_LOAD_ADDR);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
if (kernel_size < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
|
|
|
kernel_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* load initrd */
|
|
|
|
if (initrd_filename) {
|
2012-01-11 23:46:28 +04:00
|
|
|
/* Try to locate the initrd in the gap between the kernel
|
|
|
|
* and the firmware. Add a bit of space just in case
|
|
|
|
*/
|
|
|
|
initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff;
|
2011-04-01 08:15:20 +04:00
|
|
|
initrd_size = load_image_targphys(initrd_filename, initrd_base,
|
2012-01-11 23:46:28 +04:00
|
|
|
load_limit - initrd_base);
|
2011-04-01 08:15:20 +04:00
|
|
|
if (initrd_size < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
|
|
|
initrd_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
initrd_base = 0;
|
|
|
|
initrd_size = 0;
|
|
|
|
}
|
2012-01-11 23:46:28 +04:00
|
|
|
}
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
|
2013-07-03 23:26:50 +04:00
|
|
|
if (bios_name == NULL) {
|
|
|
|
bios_name = FW_FILE_NAME;
|
|
|
|
}
|
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
|
2012-01-11 23:46:28 +04:00
|
|
|
fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
|
|
|
if (fw_size < 0) {
|
|
|
|
hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
g_free(filename);
|
|
|
|
|
|
|
|
spapr->entry_point = 0x100;
|
|
|
|
|
2013-07-18 23:33:01 +04:00
|
|
|
vmstate_register(NULL, 0, &vmstate_spapr, spapr);
|
|
|
|
register_savevm_live(NULL, "spapr/htab", -1, 1,
|
|
|
|
&savevm_htab_handlers, spapr);
|
|
|
|
|
2011-04-01 08:15:20 +04:00
|
|
|
/* Prepare the device tree */
|
2013-10-15 20:33:37 +04:00
|
|
|
spapr->fdt_skel = spapr_create_fdt_skel(initrd_base, initrd_size,
|
2013-09-25 11:40:15 +04:00
|
|
|
kernel_size, kernel_le,
|
2012-10-08 22:17:39 +04:00
|
|
|
boot_device, kernel_cmdline,
|
|
|
|
spapr->epow_irq);
|
Delay creation of pseries device tree until reset
At present, the 'pseries' machine creates a flattened device tree in the
machine->init function to pass to either the guest kernel or to firmware.
However, the machine->init function runs before processing of -device
command line options, which means that the device tree so created will
be (incorrectly) missing devices specified that way.
Supplying a correct device tree is, in any case, part of the required
platform entry conditions. Therefore, this patch moves the creation and
loading of the device tree from machine->init to a reset callback. The
setup of entry point address and initial register state moves with it,
which leads to a slight cleanup.
This is not, alas, quite enough to make a fully working reset for pseries.
For that we would need to reload the firmware images, which on this
machine are loaded into RAM. It's a step in the right direction, though.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-05 09:12:10 +04:00
|
|
|
assert(spapr->fdt_skel != NULL);
|
2011-04-01 08:15:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static QEMUMachine spapr_machine = {
|
|
|
|
.name = "pseries",
|
|
|
|
.desc = "pSeries Logical Partition (PAPR compliant)",
|
2013-06-15 05:51:50 +04:00
|
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.is_default = 1,
|
2011-04-01 08:15:20 +04:00
|
|
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.init = ppc_spapr_init,
|
2012-09-12 20:57:11 +04:00
|
|
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.reset = ppc_spapr_reset,
|
2012-11-20 18:30:34 +04:00
|
|
|
.block_default_type = IF_SCSI,
|
2011-04-01 08:15:20 +04:00
|
|
|
.max_cpus = MAX_CPUS,
|
|
|
|
.no_parallel = 1,
|
hw: Clean up bogus default boot order
We set default boot order "cad" in every single machine definition
except "pseries" and "moxiesim", even though very few boards actually
care for boot order, and "cad" makes sense for even fewer.
Machines that care:
* pc and its variants
Accept up to three letters 'a', 'b' (undocumented alias for 'a'),
'c', 'd' and 'n'. Reject all others (fatal with -boot).
* nseries (n800, n810)
Check whether order starts with 'n'. Silently ignored otherwise.
* prep, g3beige, mac99
Extract the first character the machine understands (subset of
'a'..'f'). Silently ignored otherwise.
* spapr
Accept an arbitrary string (vl.c restricts it to contain only
'a'..'p', no duplicates).
* sun4[mdc]
Use the first character. Silently ignored otherwise.
Strip characters these machines ignore from their default boot order.
For all other machines, remove the unused default boot order
alltogether.
Note that my rename of QEMUMachine member boot_order to
default_boot_order and QEMUMachineInitArgs member boot_device to
boot_order has a welcome side effect: it makes every use of boot
orders visible in this patch, for easy review.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-08-16 15:13:50 +04:00
|
|
|
.default_boot_order = NULL,
|
2011-04-01 08:15:20 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static void spapr_machine_init(void)
|
|
|
|
{
|
|
|
|
qemu_register_machine(&spapr_machine);
|
|
|
|
}
|
|
|
|
|
|
|
|
machine_init(spapr_machine_init);
|