2015-06-02 14:23:06 +03:00
|
|
|
/*
|
|
|
|
* PCI Expander Bridge Device Emulation
|
|
|
|
*
|
|
|
|
* Copyright (C) 2015 Red Hat Inc
|
|
|
|
*
|
|
|
|
* Authors:
|
|
|
|
* Marcel Apfelbaum <marcel@redhat.com>
|
|
|
|
*
|
|
|
|
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
|
|
|
* See the COPYING file in the top-level directory.
|
|
|
|
*/
|
|
|
|
|
2016-01-26 21:17:15 +03:00
|
|
|
#include "qemu/osdep.h"
|
2016-05-17 13:18:46 +03:00
|
|
|
#include "qapi/error.h"
|
2015-06-02 14:23:06 +03:00
|
|
|
#include "hw/pci/pci.h"
|
|
|
|
#include "hw/pci/pci_bus.h"
|
|
|
|
#include "hw/pci/pci_host.h"
|
2015-06-19 05:40:10 +03:00
|
|
|
#include "hw/pci/pci_bridge.h"
|
2015-06-02 14:23:06 +03:00
|
|
|
#include "hw/i386/pc.h"
|
|
|
|
#include "qemu/range.h"
|
|
|
|
#include "qemu/error-report.h"
|
2015-06-02 14:23:10 +03:00
|
|
|
#include "sysemu/numa.h"
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
#define TYPE_PXB_BUS "pxb-bus"
|
|
|
|
#define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS)
|
|
|
|
|
2015-11-26 19:00:27 +03:00
|
|
|
#define TYPE_PXB_PCIE_BUS "pxb-pcie-bus"
|
|
|
|
#define PXB_PCIE_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_PCIE_BUS)
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
typedef struct PXBBus {
|
|
|
|
/*< private >*/
|
|
|
|
PCIBus parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
char bus_path[8];
|
|
|
|
} PXBBus;
|
|
|
|
|
|
|
|
#define TYPE_PXB_DEVICE "pxb"
|
|
|
|
#define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE)
|
|
|
|
|
2015-11-26 19:00:27 +03:00
|
|
|
#define TYPE_PXB_PCIE_DEVICE "pxb-pcie"
|
|
|
|
#define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE)
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
typedef struct PXBDev {
|
|
|
|
/*< private >*/
|
|
|
|
PCIDevice parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
uint8_t bus_nr;
|
2015-06-02 14:23:10 +03:00
|
|
|
uint16_t numa_node;
|
2015-06-02 14:23:06 +03:00
|
|
|
} PXBDev;
|
|
|
|
|
2015-11-26 19:00:27 +03:00
|
|
|
static PXBDev *convert_to_pxb(PCIDevice *dev)
|
|
|
|
{
|
|
|
|
return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
|
|
|
|
}
|
|
|
|
|
2015-06-19 05:40:17 +03:00
|
|
|
static GList *pxb_dev_list;
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
#define TYPE_PXB_HOST "pxb-host"
|
|
|
|
|
|
|
|
static int pxb_bus_num(PCIBus *bus)
|
|
|
|
{
|
2015-11-26 19:00:27 +03:00
|
|
|
PXBDev *pxb = convert_to_pxb(bus->parent_dev);
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
return pxb->bus_nr;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool pxb_is_root(PCIBus *bus)
|
|
|
|
{
|
|
|
|
return true; /* by definition */
|
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:10 +03:00
|
|
|
static uint16_t pxb_bus_numa_node(PCIBus *bus)
|
|
|
|
{
|
2015-11-26 19:00:27 +03:00
|
|
|
PXBDev *pxb = convert_to_pxb(bus->parent_dev);
|
2015-06-02 14:23:10 +03:00
|
|
|
|
|
|
|
return pxb->numa_node;
|
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
static void pxb_bus_class_init(ObjectClass *class, void *data)
|
|
|
|
{
|
|
|
|
PCIBusClass *pbc = PCI_BUS_CLASS(class);
|
|
|
|
|
|
|
|
pbc->bus_num = pxb_bus_num;
|
|
|
|
pbc->is_root = pxb_is_root;
|
2015-06-02 14:23:10 +03:00
|
|
|
pbc->numa_node = pxb_bus_numa_node;
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pxb_bus_info = {
|
|
|
|
.name = TYPE_PXB_BUS,
|
|
|
|
.parent = TYPE_PCI_BUS,
|
|
|
|
.instance_size = sizeof(PXBBus),
|
|
|
|
.class_init = pxb_bus_class_init,
|
|
|
|
};
|
|
|
|
|
2015-11-26 19:00:27 +03:00
|
|
|
static const TypeInfo pxb_pcie_bus_info = {
|
|
|
|
.name = TYPE_PXB_PCIE_BUS,
|
|
|
|
.parent = TYPE_PCIE_BUS,
|
|
|
|
.instance_size = sizeof(PXBBus),
|
|
|
|
.class_init = pxb_bus_class_init,
|
|
|
|
};
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
static const char *pxb_host_root_bus_path(PCIHostState *host_bridge,
|
|
|
|
PCIBus *rootbus)
|
|
|
|
{
|
2015-11-26 19:00:27 +03:00
|
|
|
PXBBus *bus = pci_bus_is_express(rootbus) ?
|
|
|
|
PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus);
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus));
|
|
|
|
return bus->bus_path;
|
|
|
|
}
|
|
|
|
|
2015-06-19 05:40:17 +03:00
|
|
|
static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
|
|
|
|
{
|
|
|
|
const PCIHostState *pxb_host;
|
|
|
|
const PCIBus *pxb_bus;
|
|
|
|
const PXBDev *pxb_dev;
|
|
|
|
int position;
|
|
|
|
const DeviceState *pxb_dev_base;
|
|
|
|
const PCIHostState *main_host;
|
|
|
|
const SysBusDevice *main_host_sbd;
|
|
|
|
|
|
|
|
pxb_host = PCI_HOST_BRIDGE(dev);
|
|
|
|
pxb_bus = pxb_host->bus;
|
2015-11-26 19:00:27 +03:00
|
|
|
pxb_dev = convert_to_pxb(pxb_bus->parent_dev);
|
2015-06-19 05:40:17 +03:00
|
|
|
position = g_list_index(pxb_dev_list, pxb_dev);
|
|
|
|
assert(position >= 0);
|
|
|
|
|
|
|
|
pxb_dev_base = DEVICE(pxb_dev);
|
|
|
|
main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent);
|
|
|
|
main_host_sbd = SYS_BUS_DEVICE(main_host);
|
|
|
|
|
|
|
|
if (main_host_sbd->num_mmio > 0) {
|
|
|
|
return g_strdup_printf(TARGET_FMT_plx ",%x",
|
|
|
|
main_host_sbd->mmio[0].addr, position + 1);
|
|
|
|
}
|
|
|
|
if (main_host_sbd->num_pio > 0) {
|
|
|
|
return g_strdup_printf("i%04x,%x",
|
|
|
|
main_host_sbd->pio[0], position + 1);
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
static void pxb_host_class_init(ObjectClass *class, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(class);
|
2015-06-19 05:40:17 +03:00
|
|
|
SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class);
|
2015-06-02 14:23:06 +03:00
|
|
|
PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class);
|
|
|
|
|
|
|
|
dc->fw_name = "pci";
|
2016-06-27 18:38:33 +03:00
|
|
|
/* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */
|
2017-05-03 23:35:44 +03:00
|
|
|
dc->user_creatable = false;
|
2015-06-19 05:40:17 +03:00
|
|
|
sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address;
|
2015-06-02 14:23:06 +03:00
|
|
|
hc->root_bus_path = pxb_host_root_bus_path;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pxb_host_info = {
|
|
|
|
.name = TYPE_PXB_HOST,
|
|
|
|
.parent = TYPE_PCI_HOST_BRIDGE,
|
|
|
|
.class_init = pxb_host_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
2016-05-17 13:18:46 +03:00
|
|
|
* Registers the PXB bus as a child of pci host root bus.
|
2015-06-02 14:23:06 +03:00
|
|
|
*/
|
2016-05-17 13:18:46 +03:00
|
|
|
static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp)
|
2015-06-02 14:23:06 +03:00
|
|
|
{
|
|
|
|
PCIBus *bus = dev->bus;
|
|
|
|
int pxb_bus_num = pci_bus_num(pxb_bus);
|
|
|
|
|
|
|
|
if (bus->parent_dev) {
|
2016-05-17 13:18:46 +03:00
|
|
|
error_setg(errp, "PXB devices can be attached only to root bus");
|
|
|
|
return;
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
QLIST_FOREACH(bus, &bus->child, sibling) {
|
|
|
|
if (pci_bus_num(bus) == pxb_bus_num) {
|
2016-05-17 13:18:46 +03:00
|
|
|
error_setg(errp, "Bus %d is already in use", pxb_bus_num);
|
|
|
|
return;
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling);
|
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:08 +03:00
|
|
|
static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
|
|
|
|
{
|
|
|
|
PCIDevice *pxb = pci_dev->bus->parent_dev;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The bios does not index the pxb slot number when
|
|
|
|
* it computes the IRQ because it resides on bus 0
|
|
|
|
* and not on the current bus.
|
|
|
|
* However QEMU routes the irq through bus 0 and adds
|
|
|
|
* the pxb slot to the IRQ computation of the PXB
|
|
|
|
* device.
|
|
|
|
*
|
|
|
|
* Synchronize between bios and QEMU by canceling
|
|
|
|
* pxb's effect.
|
|
|
|
*/
|
|
|
|
return pin - PCI_SLOT(pxb->devfn);
|
|
|
|
}
|
|
|
|
|
2015-06-19 05:40:17 +03:00
|
|
|
static gint pxb_compare(gconstpointer a, gconstpointer b)
|
|
|
|
{
|
|
|
|
const PXBDev *pxb_a = a, *pxb_b = b;
|
|
|
|
|
|
|
|
return pxb_a->bus_nr < pxb_b->bus_nr ? -1 :
|
|
|
|
pxb_a->bus_nr > pxb_b->bus_nr ? 1 :
|
|
|
|
0;
|
|
|
|
}
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp)
|
2015-06-02 14:23:06 +03:00
|
|
|
{
|
2015-11-26 19:00:27 +03:00
|
|
|
PXBDev *pxb = convert_to_pxb(dev);
|
|
|
|
DeviceState *ds, *bds = NULL;
|
2015-06-02 14:23:06 +03:00
|
|
|
PCIBus *bus;
|
|
|
|
const char *dev_name = NULL;
|
2016-05-17 13:18:46 +03:00
|
|
|
Error *local_err = NULL;
|
2015-06-02 14:23:06 +03:00
|
|
|
|
2015-06-02 14:23:10 +03:00
|
|
|
if (pxb->numa_node != NUMA_NODE_UNASSIGNED &&
|
|
|
|
pxb->numa_node >= nb_numa_nodes) {
|
2016-05-17 13:18:46 +03:00
|
|
|
error_setg(errp, "Illegal numa node %d", pxb->numa_node);
|
|
|
|
return;
|
2015-06-02 14:23:10 +03:00
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
if (dev->qdev.id && *dev->qdev.id) {
|
|
|
|
dev_name = dev->qdev.id;
|
|
|
|
}
|
|
|
|
|
|
|
|
ds = qdev_create(NULL, TYPE_PXB_HOST);
|
2015-11-26 19:00:27 +03:00
|
|
|
if (pcie) {
|
|
|
|
bus = pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS);
|
|
|
|
} else {
|
|
|
|
bus = pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
|
|
|
|
bds = qdev_create(BUS(bus), "pci-bridge");
|
|
|
|
bds->id = dev_name;
|
|
|
|
qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr);
|
|
|
|
qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false);
|
|
|
|
}
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
bus->parent_dev = dev;
|
|
|
|
bus->address_space_mem = dev->bus->address_space_mem;
|
|
|
|
bus->address_space_io = dev->bus->address_space_io;
|
2015-06-02 14:23:08 +03:00
|
|
|
bus->map_irq = pxb_map_irq_fn;
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
PCI_HOST_BRIDGE(ds)->bus = bus;
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
pxb_register_bus(dev, bus, &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
2016-03-23 10:26:19 +03:00
|
|
|
goto err_register_bus;
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
qdev_init_nofail(ds);
|
2015-11-26 19:00:27 +03:00
|
|
|
if (bds) {
|
|
|
|
qdev_init_nofail(bds);
|
|
|
|
}
|
2015-06-02 14:23:06 +03:00
|
|
|
|
|
|
|
pci_word_test_and_set_mask(dev->config + PCI_STATUS,
|
|
|
|
PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
|
|
|
|
pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
|
|
|
|
|
2015-06-19 05:40:17 +03:00
|
|
|
pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare);
|
2016-05-17 13:18:46 +03:00
|
|
|
return;
|
2016-03-23 10:26:19 +03:00
|
|
|
|
|
|
|
err_register_bus:
|
|
|
|
object_unref(OBJECT(bds));
|
|
|
|
object_unparent(OBJECT(bus));
|
|
|
|
object_unref(OBJECT(ds));
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
static void pxb_dev_realize(PCIDevice *dev, Error **errp)
|
2015-11-26 19:00:27 +03:00
|
|
|
{
|
|
|
|
if (pci_bus_is_express(dev->bus)) {
|
2016-05-17 13:18:46 +03:00
|
|
|
error_setg(errp, "pxb devices cannot reside on a PCIe bus");
|
|
|
|
return;
|
2015-11-26 19:00:27 +03:00
|
|
|
}
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
pxb_dev_realize_common(dev, false, errp);
|
2015-11-26 19:00:27 +03:00
|
|
|
}
|
|
|
|
|
2015-06-19 05:40:17 +03:00
|
|
|
static void pxb_dev_exitfn(PCIDevice *pci_dev)
|
|
|
|
{
|
2015-11-26 19:00:27 +03:00
|
|
|
PXBDev *pxb = convert_to_pxb(pci_dev);
|
2015-06-19 05:40:17 +03:00
|
|
|
|
|
|
|
pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
|
|
|
|
}
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
static Property pxb_dev_properties[] = {
|
2016-03-01 12:45:24 +03:00
|
|
|
/* Note: 0 is not a legal PXB bus number. */
|
2015-06-02 14:23:06 +03:00
|
|
|
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
|
2015-06-02 14:23:10 +03:00
|
|
|
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
|
2015-06-02 14:23:06 +03:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void pxb_dev_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
k->realize = pxb_dev_realize;
|
2015-06-19 05:40:17 +03:00
|
|
|
k->exit = pxb_dev_exitfn;
|
2015-06-02 14:23:06 +03:00
|
|
|
k->vendor_id = PCI_VENDOR_ID_REDHAT;
|
|
|
|
k->device_id = PCI_DEVICE_ID_REDHAT_PXB;
|
|
|
|
k->class_id = PCI_CLASS_BRIDGE_HOST;
|
|
|
|
|
|
|
|
dc->desc = "PCI Expander Bridge";
|
|
|
|
dc->props = pxb_dev_properties;
|
2016-07-17 19:53:10 +03:00
|
|
|
dc->hotpluggable = false;
|
2016-02-03 14:56:10 +03:00
|
|
|
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pxb_dev_info = {
|
|
|
|
.name = TYPE_PXB_DEVICE,
|
|
|
|
.parent = TYPE_PCI_DEVICE,
|
|
|
|
.instance_size = sizeof(PXBDev),
|
|
|
|
.class_init = pxb_dev_class_init,
|
|
|
|
};
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp)
|
2015-11-26 19:00:27 +03:00
|
|
|
{
|
|
|
|
if (!pci_bus_is_express(dev->bus)) {
|
2016-05-17 13:18:46 +03:00
|
|
|
error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus");
|
|
|
|
return;
|
2015-11-26 19:00:27 +03:00
|
|
|
}
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
pxb_dev_realize_common(dev, true, errp);
|
2015-11-26 19:00:27 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
|
|
|
|
|
2016-05-17 13:18:46 +03:00
|
|
|
k->realize = pxb_pcie_dev_realize;
|
2015-11-26 19:00:27 +03:00
|
|
|
k->exit = pxb_dev_exitfn;
|
|
|
|
k->vendor_id = PCI_VENDOR_ID_REDHAT;
|
|
|
|
k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE;
|
|
|
|
k->class_id = PCI_CLASS_BRIDGE_HOST;
|
|
|
|
|
|
|
|
dc->desc = "PCI Express Expander Bridge";
|
|
|
|
dc->props = pxb_dev_properties;
|
2016-07-17 19:53:10 +03:00
|
|
|
dc->hotpluggable = false;
|
2016-02-03 14:56:10 +03:00
|
|
|
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
|
2015-11-26 19:00:27 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo pxb_pcie_dev_info = {
|
|
|
|
.name = TYPE_PXB_PCIE_DEVICE,
|
|
|
|
.parent = TYPE_PCI_DEVICE,
|
|
|
|
.instance_size = sizeof(PXBDev),
|
|
|
|
.class_init = pxb_pcie_dev_class_init,
|
|
|
|
};
|
|
|
|
|
2015-06-02 14:23:06 +03:00
|
|
|
static void pxb_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&pxb_bus_info);
|
2015-11-26 19:00:27 +03:00
|
|
|
type_register_static(&pxb_pcie_bus_info);
|
2015-06-02 14:23:06 +03:00
|
|
|
type_register_static(&pxb_host_info);
|
|
|
|
type_register_static(&pxb_dev_info);
|
2015-11-26 19:00:27 +03:00
|
|
|
type_register_static(&pxb_pcie_dev_info);
|
2015-06-02 14:23:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
type_init(pxb_register_types)
|