33 lines
836 B
C
33 lines
836 B
C
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/*
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* QEMU PowerPC N1 chiplet model
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*
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* Copyright (c) 2023, IBM Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef PPC_PNV_N1_CHIPLET_H
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#define PPC_PNV_N1_CHIPLET_H
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#include "hw/ppc/pnv_nest_pervasive.h"
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#define TYPE_PNV_N1_CHIPLET "pnv-N1-chiplet"
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#define PNV_N1_CHIPLET(obj) OBJECT_CHECK(PnvN1Chiplet, (obj), TYPE_PNV_N1_CHIPLET)
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typedef struct PnvPbScom {
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uint64_t mode;
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uint64_t hp_mode2_curr;
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} PnvPbScom;
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typedef struct PnvN1Chiplet {
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DeviceState parent;
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MemoryRegion xscom_pb_eq_mr;
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MemoryRegion xscom_pb_es_mr;
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PnvNestChipletPervasive nest_pervasive; /* common pervasive chiplet unit */
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#define PNV_PB_SCOM_EQ_SIZE 8
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PnvPbScom eq[PNV_PB_SCOM_EQ_SIZE];
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#define PNV_PB_SCOM_ES_SIZE 4
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PnvPbScom es[PNV_PB_SCOM_ES_SIZE];
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} PnvN1Chiplet;
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#endif /*PPC_PNV_N1_CHIPLET_H */
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