2008-09-18 22:27:29 +04:00
|
|
|
/*
|
|
|
|
* QEMU Firmware configuration device emulation
|
|
|
|
*
|
|
|
|
* Copyright (c) 2008 Gleb Natapov
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
2016-01-26 21:17:30 +03:00
|
|
|
#include "qemu/osdep.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/hw.h"
|
2012-12-17 21:20:04 +04:00
|
|
|
#include "sysemu/sysemu.h"
|
2015-10-08 18:02:55 +03:00
|
|
|
#include "sysemu/dma.h"
|
2016-04-19 22:55:25 +03:00
|
|
|
#include "hw/boards.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/isa/isa.h"
|
|
|
|
#include "hw/nvram/fw_cfg.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/sysbus.h"
|
2013-01-16 17:50:22 +04:00
|
|
|
#include "trace.h"
|
2012-12-17 21:20:00 +04:00
|
|
|
#include "qemu/error-report.h"
|
|
|
|
#include "qemu/config-file.h"
|
2016-03-20 20:16:19 +03:00
|
|
|
#include "qemu/cutils.h"
|
2017-01-12 21:24:15 +03:00
|
|
|
#include "qapi/error.h"
|
2008-09-18 22:27:29 +04:00
|
|
|
|
2017-01-12 21:24:17 +03:00
|
|
|
#define FW_CFG_FILE_SLOTS_DFLT 0x20
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
/* FW_CFG_VERSION bits */
|
|
|
|
#define FW_CFG_VERSION 0x01
|
|
|
|
#define FW_CFG_VERSION_DMA 0x02
|
|
|
|
|
|
|
|
/* FW_CFG_DMA_CONTROL bits */
|
|
|
|
#define FW_CFG_DMA_CTL_ERROR 0x01
|
|
|
|
#define FW_CFG_DMA_CTL_READ 0x02
|
|
|
|
#define FW_CFG_DMA_CTL_SKIP 0x04
|
|
|
|
#define FW_CFG_DMA_CTL_SELECT 0x08
|
2017-01-12 21:24:14 +03:00
|
|
|
#define FW_CFG_DMA_CTL_WRITE 0x10
|
2015-10-08 18:02:55 +03:00
|
|
|
|
2015-10-08 18:02:58 +03:00
|
|
|
#define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */
|
|
|
|
|
2017-07-14 12:40:08 +03:00
|
|
|
struct FWCfgEntry {
|
2009-11-13 13:59:20 +03:00
|
|
|
uint32_t len;
|
2017-01-12 21:24:14 +03:00
|
|
|
bool allow_write;
|
2008-09-18 22:27:29 +04:00
|
|
|
uint8_t *data;
|
|
|
|
void *callback_opaque;
|
2017-08-07 21:16:11 +03:00
|
|
|
FWCfgCallback select_cb;
|
2014-12-22 15:11:35 +03:00
|
|
|
};
|
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
#define JPG_FILE 0
|
|
|
|
#define BMP_FILE 1
|
|
|
|
|
2013-05-22 07:01:43 +04:00
|
|
|
static char *read_splashfile(char *filename, gsize *file_sizep,
|
2013-01-23 21:25:08 +04:00
|
|
|
int *file_typep)
|
2011-07-27 14:04:55 +04:00
|
|
|
{
|
2011-10-24 15:31:30 +04:00
|
|
|
GError *err = NULL;
|
|
|
|
gboolean res;
|
|
|
|
gchar *content;
|
2013-01-23 21:25:09 +04:00
|
|
|
int file_type;
|
|
|
|
unsigned int filehead;
|
2011-07-27 14:04:55 +04:00
|
|
|
int bmp_bpp;
|
|
|
|
|
2013-01-23 21:25:08 +04:00
|
|
|
res = g_file_get_contents(filename, &content, file_sizep, &err);
|
2011-10-24 15:31:30 +04:00
|
|
|
if (res == FALSE) {
|
|
|
|
error_report("failed to read splash file '%s'", filename);
|
|
|
|
g_error_free(err);
|
|
|
|
return NULL;
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
2011-10-24 15:31:30 +04:00
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
/* check file size */
|
2011-10-24 15:31:30 +04:00
|
|
|
if (*file_sizep < 30) {
|
|
|
|
goto error;
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
2011-10-24 15:31:30 +04:00
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
/* check magic ID */
|
2011-10-24 15:31:30 +04:00
|
|
|
filehead = ((content[0] & 0xff) + (content[1] << 8)) & 0xffff;
|
|
|
|
if (filehead == 0xd8ff) {
|
2011-07-27 14:04:55 +04:00
|
|
|
file_type = JPG_FILE;
|
2011-10-24 15:31:30 +04:00
|
|
|
} else if (filehead == 0x4d42) {
|
|
|
|
file_type = BMP_FILE;
|
2011-07-27 14:04:55 +04:00
|
|
|
} else {
|
2011-10-24 15:31:30 +04:00
|
|
|
goto error;
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
2011-10-24 15:31:30 +04:00
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
/* check BMP bpp */
|
|
|
|
if (file_type == BMP_FILE) {
|
2011-10-24 15:31:30 +04:00
|
|
|
bmp_bpp = (content[28] + (content[29] << 8)) & 0xffff;
|
2011-07-27 14:04:55 +04:00
|
|
|
if (bmp_bpp != 24) {
|
2011-10-24 15:31:30 +04:00
|
|
|
goto error;
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
|
|
|
}
|
2011-10-24 15:31:30 +04:00
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
/* return values */
|
|
|
|
*file_typep = file_type;
|
2011-10-24 15:31:30 +04:00
|
|
|
|
|
|
|
return content;
|
|
|
|
|
|
|
|
error:
|
|
|
|
error_report("splash file '%s' format not recognized; must be JPEG "
|
|
|
|
"or 24 bit BMP", filename);
|
|
|
|
g_free(content);
|
|
|
|
return NULL;
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_bootsplash(FWCfgState *s)
|
|
|
|
{
|
|
|
|
int boot_splash_time = -1;
|
|
|
|
const char *boot_splash_filename = NULL;
|
|
|
|
char *p;
|
2011-10-24 15:31:30 +04:00
|
|
|
char *filename, *file_data;
|
2013-05-22 07:01:43 +04:00
|
|
|
gsize file_size;
|
2013-01-23 21:25:09 +04:00
|
|
|
int file_type;
|
2011-07-27 14:04:55 +04:00
|
|
|
const char *temp;
|
|
|
|
|
|
|
|
/* get user configuration */
|
|
|
|
QemuOptsList *plist = qemu_find_opts("boot-opts");
|
|
|
|
QemuOpts *opts = QTAILQ_FIRST(&plist->head);
|
|
|
|
if (opts != NULL) {
|
|
|
|
temp = qemu_opt_get(opts, "splash");
|
|
|
|
if (temp != NULL) {
|
|
|
|
boot_splash_filename = temp;
|
|
|
|
}
|
|
|
|
temp = qemu_opt_get(opts, "splash-time");
|
|
|
|
if (temp != NULL) {
|
|
|
|
p = (char *)temp;
|
2016-06-15 19:14:35 +03:00
|
|
|
boot_splash_time = strtol(p, &p, 10);
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* insert splash time if user configurated */
|
|
|
|
if (boot_splash_time >= 0) {
|
|
|
|
/* validate the input */
|
|
|
|
if (boot_splash_time > 0xffff) {
|
|
|
|
error_report("splash time is big than 65535, force it to 65535.");
|
|
|
|
boot_splash_time = 0xffff;
|
|
|
|
}
|
|
|
|
/* use little endian format */
|
|
|
|
qemu_extra_params_fw[0] = (uint8_t)(boot_splash_time & 0xff);
|
|
|
|
qemu_extra_params_fw[1] = (uint8_t)((boot_splash_time >> 8) & 0xff);
|
|
|
|
fw_cfg_add_file(s, "etc/boot-menu-wait", qemu_extra_params_fw, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* insert splash file if user configurated */
|
|
|
|
if (boot_splash_filename != NULL) {
|
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, boot_splash_filename);
|
|
|
|
if (filename == NULL) {
|
|
|
|
error_report("failed to find file '%s'.", boot_splash_filename);
|
|
|
|
return;
|
|
|
|
}
|
2011-10-24 15:31:30 +04:00
|
|
|
|
|
|
|
/* loading file data */
|
|
|
|
file_data = read_splashfile(filename, &file_size, &file_type);
|
|
|
|
if (file_data == NULL) {
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(filename);
|
2011-07-27 14:04:55 +04:00
|
|
|
return;
|
|
|
|
}
|
2015-08-26 14:17:18 +03:00
|
|
|
g_free(boot_splash_filedata);
|
2011-10-24 15:31:30 +04:00
|
|
|
boot_splash_filedata = (uint8_t *)file_data;
|
2011-07-27 14:04:55 +04:00
|
|
|
boot_splash_filedata_size = file_size;
|
2011-10-24 15:31:30 +04:00
|
|
|
|
2011-07-27 14:04:55 +04:00
|
|
|
/* insert data */
|
|
|
|
if (file_type == JPG_FILE) {
|
|
|
|
fw_cfg_add_file(s, "bootsplash.jpg",
|
|
|
|
boot_splash_filedata, boot_splash_filedata_size);
|
|
|
|
} else {
|
|
|
|
fw_cfg_add_file(s, "bootsplash.bmp",
|
|
|
|
boot_splash_filedata, boot_splash_filedata_size);
|
|
|
|
}
|
2011-08-21 07:09:37 +04:00
|
|
|
g_free(filename);
|
2011-07-27 14:04:55 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
add a boot parameter to set reboot timeout
Added an option to let qemu transfer a configuration file to bios,
"etc/boot-fail-wait", which could be specified by command
-boot reboot-timeout=T
T have a max value of 0xffff, unit is ms.
With this option, guest will wait for a given time if not find
bootabled device, then reboot. If reboot-timeout is '-1', guest
will not reboot, qemu passes '-1' to bios by default.
This feature need the new seabios's support.
Seabios pulls the value from the fwcfg "file" interface, this
interface is used because SeaBIOS needs a reliable way of
obtaining a name, value size, and value. It in no way requires
that there be a real file on the user's host machine.
Signed-off-by: Amos Kong <akong@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07 07:11:03 +04:00
|
|
|
static void fw_cfg_reboot(FWCfgState *s)
|
|
|
|
{
|
|
|
|
int reboot_timeout = -1;
|
|
|
|
char *p;
|
|
|
|
const char *temp;
|
|
|
|
|
|
|
|
/* get user configuration */
|
|
|
|
QemuOptsList *plist = qemu_find_opts("boot-opts");
|
|
|
|
QemuOpts *opts = QTAILQ_FIRST(&plist->head);
|
|
|
|
if (opts != NULL) {
|
|
|
|
temp = qemu_opt_get(opts, "reboot-timeout");
|
|
|
|
if (temp != NULL) {
|
|
|
|
p = (char *)temp;
|
2016-06-15 19:14:35 +03:00
|
|
|
reboot_timeout = strtol(p, &p, 10);
|
add a boot parameter to set reboot timeout
Added an option to let qemu transfer a configuration file to bios,
"etc/boot-fail-wait", which could be specified by command
-boot reboot-timeout=T
T have a max value of 0xffff, unit is ms.
With this option, guest will wait for a given time if not find
bootabled device, then reboot. If reboot-timeout is '-1', guest
will not reboot, qemu passes '-1' to bios by default.
This feature need the new seabios's support.
Seabios pulls the value from the fwcfg "file" interface, this
interface is used because SeaBIOS needs a reliable way of
obtaining a name, value size, and value. It in no way requires
that there be a real file on the user's host machine.
Signed-off-by: Amos Kong <akong@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07 07:11:03 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/* validate the input */
|
|
|
|
if (reboot_timeout > 0xffff) {
|
|
|
|
error_report("reboot timeout is larger than 65535, force it to 65535.");
|
|
|
|
reboot_timeout = 0xffff;
|
|
|
|
}
|
|
|
|
fw_cfg_add_file(s, "etc/boot-fail-wait", g_memdup(&reboot_timeout, 4), 4);
|
|
|
|
}
|
|
|
|
|
2008-09-18 22:27:29 +04:00
|
|
|
static void fw_cfg_write(FWCfgState *s, uint8_t value)
|
|
|
|
{
|
2015-04-29 18:21:50 +03:00
|
|
|
/* nothing, write support removed in QEMU v2.4+ */
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2017-01-12 21:24:15 +03:00
|
|
|
static inline uint16_t fw_cfg_file_slots(const FWCfgState *s)
|
|
|
|
{
|
|
|
|
return s->file_slots;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Note: this function returns an exclusive limit. */
|
|
|
|
static inline uint32_t fw_cfg_max_entry(const FWCfgState *s)
|
|
|
|
{
|
|
|
|
return FW_CFG_FILE_FIRST + fw_cfg_file_slots(s);
|
|
|
|
}
|
|
|
|
|
2008-09-18 22:27:29 +04:00
|
|
|
static int fw_cfg_select(FWCfgState *s, uint16_t key)
|
|
|
|
{
|
fw_cfg: amend callback behavior spec to once per select
Currently, the fw_cfg internal API specifies that if an item was set up
with a read callback, the callback must be run each time a byte is read
from the item. This behavior is both wasteful (most items do not have a
read callback set), and impractical for bulk transfers (e.g., DMA read).
At the time of this writing, the only items configured with a callback
are "/etc/table-loader", "/etc/acpi/tables", and "/etc/acpi/rsdp". They
all share the same callback functions: virt_acpi_build_update() on ARM
(in hw/arm/virt-acpi-build.c), and acpi_build_update() on i386 (in
hw/i386/acpi.c). Both of these callbacks are one-shot (i.e. they return
without doing anything at all after the first time they are invoked with
a given build_state; since build_state is also shared across all three
items mentioned above, the callback only ever runs *once*, the first
time either of the listed items is read).
This patch amends the specification for fw_cfg_add_file_callback() to
state that any available read callback will only be invoked once each
time the item is selected. This change has no practical effect on the
current behavior of QEMU, and it enables us to significantly optimize
the behavior of fw_cfg reads during guest firmware setup, eliminating
a large amount of redundant callback checks and invocations.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marc Marí <markmb@redhat.com>
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1446733972-1602-3-git-send-email-somlo@cmu.edu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-11-05 17:32:48 +03:00
|
|
|
int arch, ret;
|
|
|
|
FWCfgEntry *e;
|
2008-09-18 22:27:29 +04:00
|
|
|
|
|
|
|
s->cur_offset = 0;
|
2017-01-12 21:24:15 +03:00
|
|
|
if ((key & FW_CFG_ENTRY_MASK) >= fw_cfg_max_entry(s)) {
|
2008-09-18 22:27:29 +04:00
|
|
|
s->cur_entry = FW_CFG_INVALID;
|
|
|
|
ret = 0;
|
|
|
|
} else {
|
|
|
|
s->cur_entry = key;
|
|
|
|
ret = 1;
|
fw_cfg: amend callback behavior spec to once per select
Currently, the fw_cfg internal API specifies that if an item was set up
with a read callback, the callback must be run each time a byte is read
from the item. This behavior is both wasteful (most items do not have a
read callback set), and impractical for bulk transfers (e.g., DMA read).
At the time of this writing, the only items configured with a callback
are "/etc/table-loader", "/etc/acpi/tables", and "/etc/acpi/rsdp". They
all share the same callback functions: virt_acpi_build_update() on ARM
(in hw/arm/virt-acpi-build.c), and acpi_build_update() on i386 (in
hw/i386/acpi.c). Both of these callbacks are one-shot (i.e. they return
without doing anything at all after the first time they are invoked with
a given build_state; since build_state is also shared across all three
items mentioned above, the callback only ever runs *once*, the first
time either of the listed items is read).
This patch amends the specification for fw_cfg_add_file_callback() to
state that any available read callback will only be invoked once each
time the item is selected. This change has no practical effect on the
current behavior of QEMU, and it enables us to significantly optimize
the behavior of fw_cfg reads during guest firmware setup, eliminating
a large amount of redundant callback checks and invocations.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marc Marí <markmb@redhat.com>
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1446733972-1602-3-git-send-email-somlo@cmu.edu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-11-05 17:32:48 +03:00
|
|
|
/* entry successfully selected, now run callback if present */
|
|
|
|
arch = !!(key & FW_CFG_ARCH_LOCAL);
|
|
|
|
e = &s->entries[arch][key & FW_CFG_ENTRY_MASK];
|
2017-08-07 21:16:11 +03:00
|
|
|
if (e->select_cb) {
|
|
|
|
e->select_cb(e->callback_opaque);
|
fw_cfg: amend callback behavior spec to once per select
Currently, the fw_cfg internal API specifies that if an item was set up
with a read callback, the callback must be run each time a byte is read
from the item. This behavior is both wasteful (most items do not have a
read callback set), and impractical for bulk transfers (e.g., DMA read).
At the time of this writing, the only items configured with a callback
are "/etc/table-loader", "/etc/acpi/tables", and "/etc/acpi/rsdp". They
all share the same callback functions: virt_acpi_build_update() on ARM
(in hw/arm/virt-acpi-build.c), and acpi_build_update() on i386 (in
hw/i386/acpi.c). Both of these callbacks are one-shot (i.e. they return
without doing anything at all after the first time they are invoked with
a given build_state; since build_state is also shared across all three
items mentioned above, the callback only ever runs *once*, the first
time either of the listed items is read).
This patch amends the specification for fw_cfg_add_file_callback() to
state that any available read callback will only be invoked once each
time the item is selected. This change has no practical effect on the
current behavior of QEMU, and it enables us to significantly optimize
the behavior of fw_cfg reads during guest firmware setup, eliminating
a large amount of redundant callback checks and invocations.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marc Marí <markmb@redhat.com>
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1446733972-1602-3-git-send-email-somlo@cmu.edu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-11-05 17:32:48 +03:00
|
|
|
}
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2013-01-16 17:50:22 +04:00
|
|
|
trace_fw_cfg_select(s, key, ret);
|
2008-09-18 22:27:29 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-11-05 17:32:51 +03:00
|
|
|
static uint64_t fw_cfg_data_read(void *opaque, hwaddr addr, unsigned size)
|
|
|
|
{
|
|
|
|
FWCfgState *s = opaque;
|
|
|
|
int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
|
|
|
|
FWCfgEntry *e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
|
|
|
|
&s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
|
|
|
|
uint64_t value = 0;
|
|
|
|
|
|
|
|
assert(size > 0 && size <= sizeof(value));
|
|
|
|
if (s->cur_entry != FW_CFG_INVALID && e->data && s->cur_offset < e->len) {
|
|
|
|
/* The least significant 'size' bytes of the return value are
|
|
|
|
* expected to contain a string preserving portion of the item
|
|
|
|
* data, padded with zeros on the right in case we run out early.
|
|
|
|
* In technical terms, we're composing the host-endian representation
|
|
|
|
* of the big endian interpretation of the fw_cfg string.
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
value = (value << 8) | e->data[s->cur_offset++];
|
|
|
|
} while (--size && s->cur_offset < e->len);
|
|
|
|
/* If size is still not zero, we *did* run out early, so continue
|
|
|
|
* left-shifting, to add the appropriate number of padding zeros
|
|
|
|
* on the right.
|
|
|
|
*/
|
|
|
|
value <<= 8 * size;
|
|
|
|
}
|
|
|
|
|
|
|
|
trace_fw_cfg_read(s, value);
|
|
|
|
return value;
|
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static void fw_cfg_data_mem_write(void *opaque, hwaddr addr,
|
2011-11-13 17:05:28 +04:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
2014-12-22 15:11:40 +03:00
|
|
|
FWCfgState *s = opaque;
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 14:54:30 +03:00
|
|
|
unsigned i = size;
|
2014-12-22 15:11:40 +03:00
|
|
|
|
fw_cfg: fix endianness in fw_cfg_data_mem_read() / _write()
(1) Let's contemplate what device endianness means, for a memory mapped
device register (independently of QEMU -- that is, on physical hardware).
It determines the byte order that the device will put on the data bus when
the device is producing a *numerical value* for the CPU. This byte order
may differ from the CPU's own byte order, therefore when software wants to
consume the *numerical value*, it may have to swap the byte order first.
For example, suppose we have a device that exposes in a 2-byte register
the number of sheep we have to count before falling asleep. If the value
is decimal 37 (0x0025), then a big endian register will produce [0x00,
0x25], while a little endian register will produce [0x25, 0x00].
If the device register is big endian, but the CPU is little endian, the
numerical value will read as 0x2500 (decimal 9472), which software has to
byte swap before use.
However... if we ask the device about who stole our herd of sheep, and it
answers "XY", then the byte representation coming out of the register must
be [0x58, 0x59], regardless of the device register's endianness for
numeric values. And, software needs to copy these bytes into a string
field regardless of the CPU's own endianness.
(2) QEMU's device register accessor functions work with *numerical values*
exclusively, not strings:
The emulated register's read accessor function returns the numerical value
(eg. 37 decimal, 0x0025) as a *host-encoded* uint64_t. QEMU translates
this value for the guest to the endianness of the emulated device register
(which is recorded in MemoryRegionOps.endianness). Then guest code must
translate the numerical value from device register to guest CPU
endianness, before including it in any computation (see (1)).
(3) However, the data register of the fw_cfg device shall transfer strings
*only* -- that is, opaque blobs. Interpretation of any given blob is
subject to further agreement -- it can be an integer in an independently
determined byte order, or a genuine string, or an array of structs of
integers (in some byte order) and fixed size strings, and so on.
Because register emulation in QEMU is integer-preserving, not
string-preserving (see (2)), we have to jump through a few hoops.
(3a) We defined the memory mapped fw_cfg data register as
DEVICE_BIG_ENDIAN.
The particular choice is not really relevant -- we picked BE only for
consistency with the control register, which *does* transfer integers --
but our choice affects how we must host-encode values from fw_cfg strings.
(3b) Since we want the fw_cfg string "XY" to appear as the [0x58, 0x59]
array on the data register, *and* we picked DEVICE_BIG_ENDIAN, we must
compose the host (== C language) value 0x5859 in the read accessor
function.
(3c) When the guest performs the read access, the immediate uint16_t value
will be 0x5958 (in LE guests) and 0x5859 (in BE guests). However, the
uint16_t value does not matter. The only thing that matters is the byte
pattern [0x58, 0x59], which the guest code must copy into the target
string *without* any byte-swapping.
(4) Now I get to explain where I screwed up. :(
When we decided for big endian *integer* representation in the MMIO data
register -- see (3a) --, I mindlessly added an indiscriminate
byte-swizzling step to the (little endian) guest firmware.
This was a grave error -- it violates (3c) --, but I didn't realize it. I
only saw that the code I otherwise intended for fw_cfg_data_mem_read():
value = 0;
for (i = 0; i < size; ++i) {
value = (value << 8) | fw_cfg_read(s);
}
didn't produce the expected result in the guest.
In true facepalm style, instead of blaming my guest code (which violated
(3c)), I blamed my host code (which was correct). Ultimately, I coded
ldX_he_p() into fw_cfg_data_mem_read(), because that happened to work.
Obviously (...in retrospect) that was wrong. Only because my host happened
to be LE, ldX_he_p() composed the (otherwise incorrect) host value 0x5958
from the fw_cfg string "XY". And that happened to compensate for the bogus
indiscriminate byte-swizzling in my guest code.
Clearly the current code leaks the host endianness through to the guest,
which is wrong. Any device should work the same regardless of host
endianness.
The solution is to compose the host-endian representation (2) of the big
endian interpretation (3a, 3b) of the fw_cfg string, and to drop the wrong
byte-swizzling in the guest (3c).
Brown paper bag time for me.
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1420024880-15416-1-git-send-email-lersek@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-01-16 14:54:30 +03:00
|
|
|
do {
|
|
|
|
fw_cfg_write(s, value >> (8 * --i));
|
|
|
|
} while (i);
|
2014-12-22 15:11:40 +03:00
|
|
|
}
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
static void fw_cfg_dma_transfer(FWCfgState *s)
|
|
|
|
{
|
|
|
|
dma_addr_t len;
|
|
|
|
FWCfgDmaAccess dma;
|
|
|
|
int arch;
|
|
|
|
FWCfgEntry *e;
|
2017-01-12 21:24:14 +03:00
|
|
|
int read = 0, write = 0;
|
2015-10-08 18:02:55 +03:00
|
|
|
dma_addr_t dma_addr;
|
|
|
|
|
|
|
|
/* Reset the address before the next access */
|
|
|
|
dma_addr = s->dma_addr;
|
|
|
|
s->dma_addr = 0;
|
|
|
|
|
|
|
|
if (dma_memory_read(s->dma_as, dma_addr, &dma, sizeof(dma))) {
|
|
|
|
stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
|
|
|
|
FW_CFG_DMA_CTL_ERROR);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
dma.address = be64_to_cpu(dma.address);
|
|
|
|
dma.length = be32_to_cpu(dma.length);
|
|
|
|
dma.control = be32_to_cpu(dma.control);
|
|
|
|
|
|
|
|
if (dma.control & FW_CFG_DMA_CTL_SELECT) {
|
|
|
|
fw_cfg_select(s, dma.control >> 16);
|
|
|
|
}
|
|
|
|
|
|
|
|
arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
|
2015-11-05 17:32:50 +03:00
|
|
|
e = (s->cur_entry == FW_CFG_INVALID) ? NULL :
|
|
|
|
&s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK];
|
2015-10-08 18:02:55 +03:00
|
|
|
|
|
|
|
if (dma.control & FW_CFG_DMA_CTL_READ) {
|
|
|
|
read = 1;
|
2017-01-12 21:24:14 +03:00
|
|
|
write = 0;
|
|
|
|
} else if (dma.control & FW_CFG_DMA_CTL_WRITE) {
|
|
|
|
read = 0;
|
|
|
|
write = 1;
|
2015-10-08 18:02:55 +03:00
|
|
|
} else if (dma.control & FW_CFG_DMA_CTL_SKIP) {
|
|
|
|
read = 0;
|
2017-01-12 21:24:14 +03:00
|
|
|
write = 0;
|
2015-10-08 18:02:55 +03:00
|
|
|
} else {
|
|
|
|
dma.length = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
dma.control = 0;
|
|
|
|
|
|
|
|
while (dma.length > 0 && !(dma.control & FW_CFG_DMA_CTL_ERROR)) {
|
|
|
|
if (s->cur_entry == FW_CFG_INVALID || !e->data ||
|
|
|
|
s->cur_offset >= e->len) {
|
|
|
|
len = dma.length;
|
|
|
|
|
|
|
|
/* If the access is not a read access, it will be a skip access,
|
|
|
|
* tested before.
|
|
|
|
*/
|
|
|
|
if (read) {
|
|
|
|
if (dma_memory_set(s->dma_as, dma.address, 0, len)) {
|
|
|
|
dma.control |= FW_CFG_DMA_CTL_ERROR;
|
|
|
|
}
|
|
|
|
}
|
2017-01-12 21:24:14 +03:00
|
|
|
if (write) {
|
|
|
|
dma.control |= FW_CFG_DMA_CTL_ERROR;
|
|
|
|
}
|
2015-10-08 18:02:55 +03:00
|
|
|
} else {
|
|
|
|
if (dma.length <= (e->len - s->cur_offset)) {
|
|
|
|
len = dma.length;
|
|
|
|
} else {
|
|
|
|
len = (e->len - s->cur_offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the access is not a read access, it will be a skip access,
|
|
|
|
* tested before.
|
|
|
|
*/
|
|
|
|
if (read) {
|
|
|
|
if (dma_memory_write(s->dma_as, dma.address,
|
|
|
|
&e->data[s->cur_offset], len)) {
|
|
|
|
dma.control |= FW_CFG_DMA_CTL_ERROR;
|
|
|
|
}
|
|
|
|
}
|
2017-01-12 21:24:14 +03:00
|
|
|
if (write) {
|
|
|
|
if (!e->allow_write ||
|
|
|
|
len != dma.length ||
|
|
|
|
dma_memory_read(s->dma_as, dma.address,
|
|
|
|
&e->data[s->cur_offset], len)) {
|
|
|
|
dma.control |= FW_CFG_DMA_CTL_ERROR;
|
|
|
|
}
|
|
|
|
}
|
2015-10-08 18:02:55 +03:00
|
|
|
|
|
|
|
s->cur_offset += len;
|
|
|
|
}
|
|
|
|
|
|
|
|
dma.address += len;
|
|
|
|
dma.length -= len;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
stl_be_dma(s->dma_as, dma_addr + offsetof(FWCfgDmaAccess, control),
|
|
|
|
dma.control);
|
|
|
|
|
|
|
|
trace_fw_cfg_read(s, 0);
|
|
|
|
}
|
|
|
|
|
2015-10-08 18:02:58 +03:00
|
|
|
static uint64_t fw_cfg_dma_mem_read(void *opaque, hwaddr addr,
|
|
|
|
unsigned size)
|
|
|
|
{
|
|
|
|
/* Return a signature value (and handle various read sizes) */
|
|
|
|
return extract64(FW_CFG_DMA_SIGNATURE, (8 - addr - size) * 8, size * 8);
|
|
|
|
}
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
static void fw_cfg_dma_mem_write(void *opaque, hwaddr addr,
|
|
|
|
uint64_t value, unsigned size)
|
|
|
|
{
|
|
|
|
FWCfgState *s = opaque;
|
|
|
|
|
|
|
|
if (size == 4) {
|
|
|
|
if (addr == 0) {
|
|
|
|
/* FWCfgDmaAccess high address */
|
|
|
|
s->dma_addr = value << 32;
|
|
|
|
} else if (addr == 4) {
|
|
|
|
/* FWCfgDmaAccess low address */
|
|
|
|
s->dma_addr |= value;
|
|
|
|
fw_cfg_dma_transfer(s);
|
|
|
|
}
|
|
|
|
} else if (size == 8 && addr == 0) {
|
|
|
|
s->dma_addr = value;
|
|
|
|
fw_cfg_dma_transfer(s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fw_cfg_dma_mem_valid(void *opaque, hwaddr addr,
|
|
|
|
unsigned size, bool is_write)
|
|
|
|
{
|
2015-10-08 18:02:58 +03:00
|
|
|
return !is_write || ((size == 4 && (addr == 0 || addr == 4)) ||
|
|
|
|
(size == 8 && addr == 0));
|
2015-10-08 18:02:55 +03:00
|
|
|
}
|
|
|
|
|
2014-12-22 15:11:40 +03:00
|
|
|
static bool fw_cfg_data_mem_valid(void *opaque, hwaddr addr,
|
|
|
|
unsigned size, bool is_write)
|
|
|
|
{
|
|
|
|
return addr == 0;
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static void fw_cfg_ctl_mem_write(void *opaque, hwaddr addr,
|
2011-11-13 17:05:28 +04:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
|
|
|
fw_cfg_select(opaque, (uint16_t)value);
|
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static bool fw_cfg_ctl_mem_valid(void *opaque, hwaddr addr,
|
2011-11-13 17:05:28 +04:00
|
|
|
unsigned size, bool is_write)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
2011-11-13 17:05:28 +04:00
|
|
|
return is_write && size == 2;
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static void fw_cfg_comb_write(void *opaque, hwaddr addr,
|
2011-11-13 17:05:28 +04:00
|
|
|
uint64_t value, unsigned size)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
2011-11-13 17:05:28 +04:00
|
|
|
switch (size) {
|
|
|
|
case 1:
|
|
|
|
fw_cfg_write(opaque, (uint8_t)value);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
fw_cfg_select(opaque, (uint16_t)value);
|
|
|
|
break;
|
|
|
|
}
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static bool fw_cfg_comb_valid(void *opaque, hwaddr addr,
|
2011-11-13 17:05:28 +04:00
|
|
|
unsigned size, bool is_write)
|
|
|
|
{
|
|
|
|
return (size == 1) || (is_write && size == 2);
|
|
|
|
}
|
2008-09-18 22:27:29 +04:00
|
|
|
|
2011-11-13 17:05:28 +04:00
|
|
|
static const MemoryRegionOps fw_cfg_ctl_mem_ops = {
|
|
|
|
.write = fw_cfg_ctl_mem_write,
|
2014-12-22 15:11:38 +03:00
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
2011-11-13 17:05:28 +04:00
|
|
|
.valid.accepts = fw_cfg_ctl_mem_valid,
|
2008-09-18 22:27:29 +04:00
|
|
|
};
|
|
|
|
|
2011-11-13 17:05:28 +04:00
|
|
|
static const MemoryRegionOps fw_cfg_data_mem_ops = {
|
2015-11-05 17:32:51 +03:00
|
|
|
.read = fw_cfg_data_read,
|
2011-11-13 17:05:28 +04:00
|
|
|
.write = fw_cfg_data_mem_write,
|
2014-12-22 15:11:38 +03:00
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
2011-11-13 17:05:28 +04:00
|
|
|
.valid = {
|
|
|
|
.min_access_size = 1,
|
|
|
|
.max_access_size = 1,
|
2014-12-22 15:11:40 +03:00
|
|
|
.accepts = fw_cfg_data_mem_valid,
|
2011-11-13 17:05:28 +04:00
|
|
|
},
|
2008-09-18 22:27:29 +04:00
|
|
|
};
|
|
|
|
|
2011-11-13 17:05:28 +04:00
|
|
|
static const MemoryRegionOps fw_cfg_comb_mem_ops = {
|
2015-11-05 17:32:52 +03:00
|
|
|
.read = fw_cfg_data_read,
|
2011-11-13 17:05:28 +04:00
|
|
|
.write = fw_cfg_comb_write,
|
2013-07-28 16:35:54 +04:00
|
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
2011-11-13 17:05:28 +04:00
|
|
|
.valid.accepts = fw_cfg_comb_valid,
|
2008-09-18 22:27:29 +04:00
|
|
|
};
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
static const MemoryRegionOps fw_cfg_dma_mem_ops = {
|
2015-10-08 18:02:58 +03:00
|
|
|
.read = fw_cfg_dma_mem_read,
|
2015-10-08 18:02:55 +03:00
|
|
|
.write = fw_cfg_dma_mem_write,
|
|
|
|
.endianness = DEVICE_BIG_ENDIAN,
|
|
|
|
.valid.accepts = fw_cfg_dma_mem_valid,
|
|
|
|
.valid.max_access_size = 8,
|
|
|
|
.impl.max_access_size = 8,
|
|
|
|
};
|
|
|
|
|
2010-06-27 20:04:55 +04:00
|
|
|
static void fw_cfg_reset(DeviceState *d)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
2013-07-01 14:18:32 +04:00
|
|
|
FWCfgState *s = FW_CFG(d);
|
2008-09-18 22:27:29 +04:00
|
|
|
|
fw_cfg: amend callback behavior spec to once per select
Currently, the fw_cfg internal API specifies that if an item was set up
with a read callback, the callback must be run each time a byte is read
from the item. This behavior is both wasteful (most items do not have a
read callback set), and impractical for bulk transfers (e.g., DMA read).
At the time of this writing, the only items configured with a callback
are "/etc/table-loader", "/etc/acpi/tables", and "/etc/acpi/rsdp". They
all share the same callback functions: virt_acpi_build_update() on ARM
(in hw/arm/virt-acpi-build.c), and acpi_build_update() on i386 (in
hw/i386/acpi.c). Both of these callbacks are one-shot (i.e. they return
without doing anything at all after the first time they are invoked with
a given build_state; since build_state is also shared across all three
items mentioned above, the callback only ever runs *once*, the first
time either of the listed items is read).
This patch amends the specification for fw_cfg_add_file_callback() to
state that any available read callback will only be invoked once each
time the item is selected. This change has no practical effect on the
current behavior of QEMU, and it enables us to significantly optimize
the behavior of fw_cfg reads during guest firmware setup, eliminating
a large amount of redundant callback checks and invocations.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marc Marí <markmb@redhat.com>
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 1446733972-1602-3-git-send-email-somlo@cmu.edu
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-11-05 17:32:48 +03:00
|
|
|
/* we never register a read callback for FW_CFG_SIGNATURE */
|
|
|
|
fw_cfg_select(s, FW_CFG_SIGNATURE);
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2009-11-13 13:59:20 +03:00
|
|
|
/* Save restore 32 bit int as uint16_t
|
|
|
|
This is a Big hack, but it is how the old state did it.
|
|
|
|
Or we broke compatibility in the state, or we can't use struct tm
|
|
|
|
*/
|
|
|
|
|
2017-01-19 22:00:50 +03:00
|
|
|
static int get_uint32_as_uint16(QEMUFile *f, void *pv, size_t size,
|
|
|
|
VMStateField *field)
|
2009-11-13 13:59:20 +03:00
|
|
|
{
|
|
|
|
uint32_t *v = pv;
|
|
|
|
*v = qemu_get_be16(f);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-01-19 22:00:50 +03:00
|
|
|
static int put_unused(QEMUFile *f, void *pv, size_t size, VMStateField *field,
|
|
|
|
QJSON *vmdesc)
|
2009-11-13 13:59:20 +03:00
|
|
|
{
|
2010-03-14 11:51:53 +03:00
|
|
|
fprintf(stderr, "uint32_as_uint16 is only used for backward compatibility.\n");
|
2009-11-13 13:59:20 +03:00
|
|
|
fprintf(stderr, "This functions shouldn't be called.\n");
|
2017-01-19 22:00:50 +03:00
|
|
|
|
|
|
|
return 0;
|
2009-11-13 13:59:20 +03:00
|
|
|
}
|
|
|
|
|
2009-12-04 23:44:44 +03:00
|
|
|
static const VMStateInfo vmstate_hack_uint32_as_uint16 = {
|
2009-11-13 13:59:20 +03:00
|
|
|
.name = "int32_as_uint16",
|
|
|
|
.get = get_uint32_as_uint16,
|
|
|
|
.put = put_unused,
|
|
|
|
};
|
|
|
|
|
|
|
|
#define VMSTATE_UINT16_HACK(_f, _s, _t) \
|
|
|
|
VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint32_as_uint16, uint32_t)
|
|
|
|
|
|
|
|
|
|
|
|
static bool is_version_1(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
return version_id == 1;
|
|
|
|
}
|
|
|
|
|
2016-05-23 21:11:33 +03:00
|
|
|
bool fw_cfg_dma_enabled(void *opaque)
|
2015-10-08 18:02:55 +03:00
|
|
|
{
|
|
|
|
FWCfgState *s = opaque;
|
|
|
|
|
|
|
|
return s->dma_enabled;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_fw_cfg_dma = {
|
|
|
|
.name = "fw_cfg/dma",
|
|
|
|
.needed = fw_cfg_dma_enabled,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT64(dma_addr, FWCfgState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
2009-09-10 05:04:34 +04:00
|
|
|
static const VMStateDescription vmstate_fw_cfg = {
|
|
|
|
.name = "fw_cfg",
|
2009-11-13 13:59:20 +03:00
|
|
|
.version_id = 2,
|
2009-09-10 05:04:34 +04:00
|
|
|
.minimum_version_id = 1,
|
2014-04-16 17:32:32 +04:00
|
|
|
.fields = (VMStateField[]) {
|
2009-09-10 05:04:34 +04:00
|
|
|
VMSTATE_UINT16(cur_entry, FWCfgState),
|
2009-11-13 13:59:20 +03:00
|
|
|
VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1),
|
|
|
|
VMSTATE_UINT32_V(cur_offset, FWCfgState, 2),
|
2009-09-10 05:04:34 +04:00
|
|
|
VMSTATE_END_OF_LIST()
|
2015-10-08 18:02:55 +03:00
|
|
|
},
|
|
|
|
.subsections = (const VMStateDescription*[]) {
|
|
|
|
&vmstate_fw_cfg_dma,
|
|
|
|
NULL,
|
2009-09-10 05:04:34 +04:00
|
|
|
}
|
|
|
|
};
|
2008-09-18 22:27:29 +04:00
|
|
|
|
2017-08-07 21:16:11 +03:00
|
|
|
static void fw_cfg_add_bytes_callback(FWCfgState *s, uint16_t key,
|
|
|
|
FWCfgCallback select_cb,
|
|
|
|
void *callback_opaque,
|
|
|
|
void *data, size_t len,
|
|
|
|
bool read_only)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
|
|
|
int arch = !!(key & FW_CFG_ARCH_LOCAL);
|
|
|
|
|
|
|
|
key &= FW_CFG_ENTRY_MASK;
|
|
|
|
|
2017-01-12 21:24:15 +03:00
|
|
|
assert(key < fw_cfg_max_entry(s) && len < UINT32_MAX);
|
2015-04-29 18:21:51 +03:00
|
|
|
assert(s->entries[arch][key].data == NULL); /* avoid key conflict */
|
2008-09-18 22:27:29 +04:00
|
|
|
|
|
|
|
s->entries[arch][key].data = data;
|
2013-01-16 17:50:28 +04:00
|
|
|
s->entries[arch][key].len = (uint32_t)len;
|
2017-08-07 21:16:11 +03:00
|
|
|
s->entries[arch][key].select_cb = select_cb;
|
2013-09-01 18:56:20 +04:00
|
|
|
s->entries[arch][key].callback_opaque = callback_opaque;
|
2017-01-12 21:24:14 +03:00
|
|
|
s->entries[arch][key].allow_write = !read_only;
|
2013-09-01 18:56:20 +04:00
|
|
|
}
|
|
|
|
|
2014-10-07 12:00:08 +04:00
|
|
|
static void *fw_cfg_modify_bytes_read(FWCfgState *s, uint16_t key,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
|
|
|
void *ptr;
|
|
|
|
int arch = !!(key & FW_CFG_ARCH_LOCAL);
|
|
|
|
|
|
|
|
key &= FW_CFG_ENTRY_MASK;
|
|
|
|
|
2017-01-12 21:24:15 +03:00
|
|
|
assert(key < fw_cfg_max_entry(s) && len < UINT32_MAX);
|
2014-10-07 12:00:08 +04:00
|
|
|
|
|
|
|
/* return the old data to the function caller, avoid memory leak */
|
|
|
|
ptr = s->entries[arch][key].data;
|
|
|
|
s->entries[arch][key].data = data;
|
|
|
|
s->entries[arch][key].len = len;
|
|
|
|
s->entries[arch][key].callback_opaque = NULL;
|
2017-01-12 21:24:14 +03:00
|
|
|
s->entries[arch][key].allow_write = false;
|
2014-10-07 12:00:08 +04:00
|
|
|
|
|
|
|
return ptr;
|
|
|
|
}
|
|
|
|
|
2013-09-01 18:56:20 +04:00
|
|
|
void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len)
|
|
|
|
{
|
2017-08-07 21:16:11 +03:00
|
|
|
fw_cfg_add_bytes_callback(s, key, NULL, NULL, data, len, true);
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2013-01-16 17:50:24 +04:00
|
|
|
void fw_cfg_add_string(FWCfgState *s, uint16_t key, const char *value)
|
|
|
|
{
|
|
|
|
size_t sz = strlen(value) + 1;
|
|
|
|
|
2015-03-08 21:30:01 +03:00
|
|
|
fw_cfg_add_bytes(s, key, g_memdup(value, sz), sz);
|
2013-01-16 17:50:24 +04:00
|
|
|
}
|
|
|
|
|
2013-01-16 17:50:23 +04:00
|
|
|
void fw_cfg_add_i16(FWCfgState *s, uint16_t key, uint16_t value)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
|
|
|
uint16_t *copy;
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
*copy = cpu_to_le16(value);
|
2013-01-16 17:50:28 +04:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2015-06-08 21:10:44 +03:00
|
|
|
void fw_cfg_modify_i16(FWCfgState *s, uint16_t key, uint16_t value)
|
|
|
|
{
|
|
|
|
uint16_t *copy, *old;
|
|
|
|
|
|
|
|
copy = g_malloc(sizeof(value));
|
|
|
|
*copy = cpu_to_le16(value);
|
|
|
|
old = fw_cfg_modify_bytes_read(s, key, copy, sizeof(value));
|
|
|
|
g_free(old);
|
|
|
|
}
|
|
|
|
|
2013-01-16 17:50:23 +04:00
|
|
|
void fw_cfg_add_i32(FWCfgState *s, uint16_t key, uint32_t value)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
|
|
|
uint32_t *copy;
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
*copy = cpu_to_le32(value);
|
2013-01-16 17:50:28 +04:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2013-01-16 17:50:23 +04:00
|
|
|
void fw_cfg_add_i64(FWCfgState *s, uint16_t key, uint64_t value)
|
2008-09-18 22:27:29 +04:00
|
|
|
{
|
|
|
|
uint64_t *copy;
|
|
|
|
|
2011-08-21 07:09:37 +04:00
|
|
|
copy = g_malloc(sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
*copy = cpu_to_le64(value);
|
2013-01-16 17:50:28 +04:00
|
|
|
fw_cfg_add_bytes(s, key, copy, sizeof(value));
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
|
|
|
|
2016-04-07 17:12:58 +03:00
|
|
|
void fw_cfg_set_order_override(FWCfgState *s, int order)
|
|
|
|
{
|
|
|
|
assert(s->fw_cfg_order_override == 0);
|
|
|
|
s->fw_cfg_order_override = order;
|
|
|
|
}
|
|
|
|
|
|
|
|
void fw_cfg_reset_order_override(FWCfgState *s)
|
|
|
|
{
|
|
|
|
assert(s->fw_cfg_order_override != 0);
|
|
|
|
s->fw_cfg_order_override = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This is the legacy order list. For legacy systems, files are in
|
|
|
|
* the fw_cfg in the order defined below, by the "order" value. Note
|
|
|
|
* that some entries (VGA ROMs, NIC option ROMS, etc.) go into a
|
|
|
|
* specific area, but there may be more than one and they occur in the
|
|
|
|
* order that the user specifies them on the command line. Those are
|
|
|
|
* handled in a special manner, using the order override above.
|
|
|
|
*
|
|
|
|
* For non-legacy, the files are sorted by filename to avoid this kind
|
|
|
|
* of complexity in the future.
|
|
|
|
*
|
|
|
|
* This is only for x86, other arches don't implement versioning so
|
|
|
|
* they won't set legacy mode.
|
|
|
|
*/
|
|
|
|
static struct {
|
|
|
|
const char *name;
|
|
|
|
int order;
|
|
|
|
} fw_cfg_order[] = {
|
|
|
|
{ "etc/boot-menu-wait", 10 },
|
|
|
|
{ "bootsplash.jpg", 11 },
|
|
|
|
{ "bootsplash.bmp", 12 },
|
|
|
|
{ "etc/boot-fail-wait", 15 },
|
|
|
|
{ "etc/smbios/smbios-tables", 20 },
|
|
|
|
{ "etc/smbios/smbios-anchor", 30 },
|
|
|
|
{ "etc/e820", 40 },
|
|
|
|
{ "etc/reserved-memory-end", 50 },
|
|
|
|
{ "genroms/kvmvapic.bin", 55 },
|
|
|
|
{ "genroms/linuxboot.bin", 60 },
|
|
|
|
{ }, /* VGA ROMs from pc_vga_init come here, 70. */
|
|
|
|
{ }, /* NIC option ROMs from pc_nic_init come here, 80. */
|
|
|
|
{ "etc/system-states", 90 },
|
|
|
|
{ }, /* User ROMs come here, 100. */
|
|
|
|
{ }, /* Device FW comes here, 110. */
|
|
|
|
{ "etc/extra-pci-roots", 120 },
|
|
|
|
{ "etc/acpi/tables", 130 },
|
|
|
|
{ "etc/table-loader", 140 },
|
|
|
|
{ "etc/tpm/log", 150 },
|
|
|
|
{ "etc/acpi/rsdp", 160 },
|
|
|
|
{ "bootorder", 170 },
|
|
|
|
|
|
|
|
#define FW_CFG_ORDER_OVERRIDE_LAST 200
|
|
|
|
};
|
|
|
|
|
|
|
|
static int get_fw_cfg_order(FWCfgState *s, const char *name)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
2016-05-18 13:59:36 +03:00
|
|
|
if (s->fw_cfg_order_override > 0) {
|
|
|
|
return s->fw_cfg_order_override;
|
|
|
|
}
|
2016-04-07 17:12:58 +03:00
|
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(fw_cfg_order); i++) {
|
2016-05-18 13:59:36 +03:00
|
|
|
if (fw_cfg_order[i].name == NULL) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (strcmp(name, fw_cfg_order[i].name) == 0) {
|
|
|
|
return fw_cfg_order[i].order;
|
|
|
|
}
|
2016-04-07 17:12:58 +03:00
|
|
|
}
|
2016-05-18 13:59:36 +03:00
|
|
|
|
2016-04-07 17:12:58 +03:00
|
|
|
/* Stick unknown stuff at the end. */
|
2017-07-12 16:57:41 +03:00
|
|
|
warn_report("Unknown firmware file in legacy mode: %s", name);
|
2016-04-07 17:12:58 +03:00
|
|
|
return FW_CFG_ORDER_OVERRIDE_LAST;
|
|
|
|
}
|
|
|
|
|
2013-09-01 18:56:20 +04:00
|
|
|
void fw_cfg_add_file_callback(FWCfgState *s, const char *filename,
|
2017-08-07 21:16:11 +03:00
|
|
|
FWCfgCallback select_cb,
|
|
|
|
void *callback_opaque,
|
2017-01-12 21:24:14 +03:00
|
|
|
void *data, size_t len, bool read_only)
|
2009-12-18 14:01:10 +03:00
|
|
|
{
|
2016-04-07 17:12:58 +03:00
|
|
|
int i, index, count;
|
2013-01-16 17:50:28 +04:00
|
|
|
size_t dsize;
|
2016-04-07 17:12:58 +03:00
|
|
|
MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
|
|
|
|
int order = 0;
|
2009-12-18 14:01:10 +03:00
|
|
|
|
|
|
|
if (!s->files) {
|
2017-01-12 21:24:15 +03:00
|
|
|
dsize = sizeof(uint32_t) + sizeof(FWCfgFile) * fw_cfg_file_slots(s);
|
2011-08-21 07:09:37 +04:00
|
|
|
s->files = g_malloc0(dsize);
|
2013-01-16 17:50:28 +04:00
|
|
|
fw_cfg_add_bytes(s, FW_CFG_FILE_DIR, s->files, dsize);
|
2009-12-18 14:01:10 +03:00
|
|
|
}
|
|
|
|
|
2016-04-07 17:12:58 +03:00
|
|
|
count = be32_to_cpu(s->files->count);
|
2017-01-12 21:24:15 +03:00
|
|
|
assert(count < fw_cfg_file_slots(s));
|
2016-04-07 17:12:58 +03:00
|
|
|
|
|
|
|
/* Find the insertion point. */
|
|
|
|
if (mc->legacy_fw_cfg_order) {
|
|
|
|
/*
|
|
|
|
* Sort by order. For files with the same order, we keep them
|
|
|
|
* in the sequence in which they were added.
|
|
|
|
*/
|
|
|
|
order = get_fw_cfg_order(s, filename);
|
|
|
|
for (index = count;
|
|
|
|
index > 0 && order < s->entry_order[index - 1];
|
|
|
|
index--);
|
|
|
|
} else {
|
|
|
|
/* Sort by file name. */
|
|
|
|
for (index = count;
|
|
|
|
index > 0 && strcmp(filename, s->files->f[index - 1].name) < 0;
|
|
|
|
index--);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Move all the entries from the index point and after down one
|
|
|
|
* to create a slot for the new entry. Because calculations are
|
|
|
|
* being done with the index, make it so that "i" is the current
|
|
|
|
* index and "i - 1" is the one being copied from, thus the
|
|
|
|
* unusual start and end in the for statement.
|
|
|
|
*/
|
|
|
|
for (i = count + 1; i > index; i--) {
|
|
|
|
s->files->f[i] = s->files->f[i - 1];
|
|
|
|
s->files->f[i].select = cpu_to_be16(FW_CFG_FILE_FIRST + i);
|
|
|
|
s->entries[0][FW_CFG_FILE_FIRST + i] =
|
|
|
|
s->entries[0][FW_CFG_FILE_FIRST + i - 1];
|
|
|
|
s->entry_order[i] = s->entry_order[i - 1];
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(&s->files->f[index], 0, sizeof(FWCfgFile));
|
|
|
|
memset(&s->entries[0][FW_CFG_FILE_FIRST + index], 0, sizeof(FWCfgEntry));
|
2009-12-18 14:01:10 +03:00
|
|
|
|
2016-04-07 17:12:58 +03:00
|
|
|
pstrcpy(s->files->f[index].name, sizeof(s->files->f[index].name), filename);
|
|
|
|
for (i = 0; i <= count; i++) {
|
|
|
|
if (i != index &&
|
|
|
|
strcmp(s->files->f[index].name, s->files->f[i].name) == 0) {
|
2015-04-29 18:21:52 +03:00
|
|
|
error_report("duplicate fw_cfg file name: %s",
|
|
|
|
s->files->f[index].name);
|
|
|
|
exit(1);
|
2010-01-08 17:25:39 +03:00
|
|
|
}
|
2009-12-18 14:01:10 +03:00
|
|
|
}
|
2010-01-08 17:25:39 +03:00
|
|
|
|
2017-08-07 21:16:11 +03:00
|
|
|
fw_cfg_add_bytes_callback(s, FW_CFG_FILE_FIRST + index,
|
|
|
|
select_cb,
|
|
|
|
callback_opaque, data, len,
|
|
|
|
read_only);
|
2015-04-29 18:21:52 +03:00
|
|
|
|
2009-12-18 14:01:10 +03:00
|
|
|
s->files->f[index].size = cpu_to_be32(len);
|
|
|
|
s->files->f[index].select = cpu_to_be16(FW_CFG_FILE_FIRST + index);
|
2016-04-07 17:12:58 +03:00
|
|
|
s->entry_order[index] = order;
|
2013-01-16 17:50:22 +04:00
|
|
|
trace_fw_cfg_add_file(s, index, s->files->f[index].name, len);
|
2009-12-18 14:01:10 +03:00
|
|
|
|
2016-04-07 17:12:58 +03:00
|
|
|
s->files->count = cpu_to_be32(count+1);
|
2009-12-18 14:01:10 +03:00
|
|
|
}
|
|
|
|
|
2013-09-01 18:56:20 +04:00
|
|
|
void fw_cfg_add_file(FWCfgState *s, const char *filename,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
2017-01-12 21:24:14 +03:00
|
|
|
fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len, true);
|
2013-09-01 18:56:20 +04:00
|
|
|
}
|
|
|
|
|
2014-10-07 12:00:08 +04:00
|
|
|
void *fw_cfg_modify_file(FWCfgState *s, const char *filename,
|
|
|
|
void *data, size_t len)
|
|
|
|
{
|
|
|
|
int i, index;
|
2014-11-25 07:38:19 +03:00
|
|
|
void *ptr = NULL;
|
2014-10-07 12:00:08 +04:00
|
|
|
|
|
|
|
assert(s->files);
|
|
|
|
|
|
|
|
index = be32_to_cpu(s->files->count);
|
2017-01-12 21:24:15 +03:00
|
|
|
assert(index < fw_cfg_file_slots(s));
|
2014-10-07 12:00:08 +04:00
|
|
|
|
|
|
|
for (i = 0; i < index; i++) {
|
|
|
|
if (strcmp(filename, s->files->f[i].name) == 0) {
|
2014-11-25 07:38:19 +03:00
|
|
|
ptr = fw_cfg_modify_bytes_read(s, FW_CFG_FILE_FIRST + i,
|
|
|
|
data, len);
|
|
|
|
s->files->f[i].size = cpu_to_be32(len);
|
|
|
|
return ptr;
|
2014-10-07 12:00:08 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
/* add new one */
|
2017-01-12 21:24:14 +03:00
|
|
|
fw_cfg_add_file_callback(s, filename, NULL, NULL, data, len, true);
|
2014-10-07 12:00:08 +04:00
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_machine_reset(void *opaque)
|
2010-12-08 14:35:09 +03:00
|
|
|
{
|
2014-10-07 12:00:08 +04:00
|
|
|
void *ptr;
|
2013-01-16 17:50:29 +04:00
|
|
|
size_t len;
|
2014-10-07 12:00:08 +04:00
|
|
|
FWCfgState *s = opaque;
|
2014-03-17 06:40:22 +04:00
|
|
|
char *bootindex = get_boot_devices_list(&len, false);
|
2010-12-08 14:35:09 +03:00
|
|
|
|
2014-10-07 12:00:08 +04:00
|
|
|
ptr = fw_cfg_modify_file(s, "bootorder", (uint8_t *)bootindex, len);
|
|
|
|
g_free(ptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_machine_ready(struct Notifier *n, void *data)
|
|
|
|
{
|
|
|
|
FWCfgState *s = container_of(n, FWCfgState, machine_ready);
|
|
|
|
qemu_register_reset(fw_cfg_machine_reset, s);
|
2010-12-08 14:35:09 +03:00
|
|
|
}
|
|
|
|
|
2008-09-18 22:27:29 +04:00
|
|
|
|
2010-06-27 20:04:55 +04:00
|
|
|
|
2017-07-14 12:40:07 +03:00
|
|
|
static void fw_cfg_common_realize(DeviceState *dev, Error **errp)
|
2014-12-22 15:11:35 +03:00
|
|
|
{
|
|
|
|
FWCfgState *s = FW_CFG(dev);
|
2016-04-19 22:55:25 +03:00
|
|
|
MachineState *machine = MACHINE(qdev_get_machine());
|
2017-06-29 17:07:16 +03:00
|
|
|
uint32_t version = FW_CFG_VERSION;
|
2008-09-18 22:27:29 +04:00
|
|
|
|
2017-07-14 12:40:07 +03:00
|
|
|
if (!fw_cfg_find()) {
|
|
|
|
error_setg(errp, "at most one %s device is permitted", TYPE_FW_CFG);
|
|
|
|
return;
|
|
|
|
}
|
2013-04-26 07:24:44 +04:00
|
|
|
|
2013-01-16 17:50:28 +04:00
|
|
|
fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (char *)"QEMU", 4);
|
2016-09-21 07:27:22 +03:00
|
|
|
fw_cfg_add_bytes(s, FW_CFG_UUID, &qemu_uuid, 16);
|
2016-04-19 22:55:25 +03:00
|
|
|
fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)!machine->enable_graphics);
|
2009-07-02 02:19:02 +04:00
|
|
|
fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);
|
2011-07-27 14:04:55 +04:00
|
|
|
fw_cfg_bootsplash(s);
|
add a boot parameter to set reboot timeout
Added an option to let qemu transfer a configuration file to bios,
"etc/boot-fail-wait", which could be specified by command
-boot reboot-timeout=T
T have a max value of 0xffff, unit is ms.
With this option, guest will wait for a given time if not find
bootabled device, then reboot. If reboot-timeout is '-1', guest
will not reboot, qemu passes '-1' to bios by default.
This feature need the new seabios's support.
Seabios pulls the value from the fwcfg "file" interface, this
interface is used because SeaBIOS needs a reliable way of
obtaining a name, value size, and value. It in no way requires
that there be a real file on the user's host machine.
Signed-off-by: Amos Kong <akong@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-07 07:11:03 +04:00
|
|
|
fw_cfg_reboot(s);
|
2010-12-08 14:35:09 +03:00
|
|
|
|
2017-06-29 17:07:16 +03:00
|
|
|
if (s->dma_enabled) {
|
|
|
|
version |= FW_CFG_VERSION_DMA;
|
|
|
|
}
|
|
|
|
|
|
|
|
fw_cfg_add_i32(s, FW_CFG_ID, version);
|
|
|
|
|
2010-12-08 14:35:09 +03:00
|
|
|
s->machine_ready.notify = fw_cfg_machine_ready;
|
|
|
|
qemu_add_machine_init_done_notifier(&s->machine_ready);
|
2008-09-18 22:27:29 +04:00
|
|
|
}
|
2010-06-27 20:04:55 +04:00
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase,
|
|
|
|
AddressSpace *dma_as)
|
2010-06-27 20:04:55 +04:00
|
|
|
{
|
2014-12-22 15:11:35 +03:00
|
|
|
DeviceState *dev;
|
2017-06-29 17:07:15 +03:00
|
|
|
SysBusDevice *sbd;
|
|
|
|
FWCfgIoState *ios;
|
2015-10-08 18:02:55 +03:00
|
|
|
FWCfgState *s;
|
2016-02-18 22:31:00 +03:00
|
|
|
bool dma_requested = dma_iobase && dma_as;
|
2010-06-27 20:04:55 +04:00
|
|
|
|
2014-12-22 15:11:35 +03:00
|
|
|
dev = qdev_create(NULL, TYPE_FW_CFG_IO);
|
2016-02-18 22:31:00 +03:00
|
|
|
if (!dma_requested) {
|
|
|
|
qdev_prop_set_bit(dev, "dma_enabled", false);
|
|
|
|
}
|
2015-10-08 18:02:55 +03:00
|
|
|
|
2017-07-14 12:40:07 +03:00
|
|
|
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
|
|
|
|
OBJECT(dev), NULL);
|
|
|
|
qdev_init_nofail(dev);
|
2017-06-29 17:07:15 +03:00
|
|
|
|
|
|
|
sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
ios = FW_CFG_IO(dev);
|
|
|
|
sysbus_add_io(sbd, iobase, &ios->comb_iomem);
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
s = FW_CFG(dev);
|
|
|
|
|
2016-02-18 22:31:00 +03:00
|
|
|
if (s->dma_enabled) {
|
2015-10-08 18:02:55 +03:00
|
|
|
/* 64 bits for the address field */
|
|
|
|
s->dma_as = dma_as;
|
|
|
|
s->dma_addr = 0;
|
2017-06-29 17:07:15 +03:00
|
|
|
sysbus_add_io(sbd, dma_iobase, &s->dma_iomem);
|
2015-10-08 18:02:55 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
return s;
|
|
|
|
}
|
|
|
|
|
|
|
|
FWCfgState *fw_cfg_init_io(uint32_t iobase)
|
|
|
|
{
|
|
|
|
return fw_cfg_init_io_dma(iobase, 0, NULL);
|
2013-07-01 14:18:33 +04:00
|
|
|
}
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
|
|
|
|
hwaddr data_addr, uint32_t data_width,
|
|
|
|
hwaddr dma_addr, AddressSpace *dma_as)
|
2013-07-01 14:18:33 +04:00
|
|
|
{
|
2014-12-22 15:11:35 +03:00
|
|
|
DeviceState *dev;
|
|
|
|
SysBusDevice *sbd;
|
2015-10-08 18:02:55 +03:00
|
|
|
FWCfgState *s;
|
2016-02-18 22:31:00 +03:00
|
|
|
bool dma_requested = dma_addr && dma_as;
|
2013-07-01 14:18:33 +04:00
|
|
|
|
2014-12-22 15:11:35 +03:00
|
|
|
dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
|
2014-12-22 15:11:41 +03:00
|
|
|
qdev_prop_set_uint32(dev, "data_width", data_width);
|
2016-02-18 22:31:00 +03:00
|
|
|
if (!dma_requested) {
|
|
|
|
qdev_prop_set_bit(dev, "dma_enabled", false);
|
|
|
|
}
|
2014-12-22 15:11:40 +03:00
|
|
|
|
2017-07-14 12:40:07 +03:00
|
|
|
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
|
|
|
|
OBJECT(dev), NULL);
|
|
|
|
qdev_init_nofail(dev);
|
2014-12-22 15:11:35 +03:00
|
|
|
|
|
|
|
sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
sysbus_mmio_map(sbd, 0, ctl_addr);
|
|
|
|
sysbus_mmio_map(sbd, 1, data_addr);
|
|
|
|
|
2015-10-08 18:02:55 +03:00
|
|
|
s = FW_CFG(dev);
|
|
|
|
|
2016-02-18 22:31:00 +03:00
|
|
|
if (s->dma_enabled) {
|
2015-10-08 18:02:55 +03:00
|
|
|
s->dma_as = dma_as;
|
|
|
|
s->dma_addr = 0;
|
|
|
|
sysbus_mmio_map(sbd, 2, dma_addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
return s;
|
2014-12-22 15:11:35 +03:00
|
|
|
}
|
|
|
|
|
2014-12-22 15:11:41 +03:00
|
|
|
FWCfgState *fw_cfg_init_mem(hwaddr ctl_addr, hwaddr data_addr)
|
|
|
|
{
|
|
|
|
return fw_cfg_init_mem_wide(ctl_addr, data_addr,
|
2015-10-08 18:02:55 +03:00
|
|
|
fw_cfg_data_mem_ops.valid.max_access_size,
|
|
|
|
0, NULL);
|
2014-12-22 15:11:41 +03:00
|
|
|
}
|
|
|
|
|
2014-12-22 15:11:35 +03:00
|
|
|
|
2013-05-30 17:07:58 +04:00
|
|
|
FWCfgState *fw_cfg_find(void)
|
|
|
|
{
|
2017-07-14 12:40:06 +03:00
|
|
|
/* Returns NULL unless there is exactly one fw_cfg device */
|
|
|
|
return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG, NULL));
|
2013-05-30 17:07:58 +04:00
|
|
|
}
|
|
|
|
|
2017-07-14 12:40:07 +03:00
|
|
|
|
2012-01-24 23:12:29 +04:00
|
|
|
static void fw_cfg_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2011-12-08 07:34:16 +04:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2012-01-24 23:12:29 +04:00
|
|
|
|
2011-12-08 07:34:16 +04:00
|
|
|
dc->reset = fw_cfg_reset;
|
|
|
|
dc->vmsd = &vmstate_fw_cfg;
|
2012-01-24 23:12:29 +04:00
|
|
|
}
|
|
|
|
|
2013-01-10 19:19:07 +04:00
|
|
|
static const TypeInfo fw_cfg_info = {
|
2013-05-30 17:07:58 +04:00
|
|
|
.name = TYPE_FW_CFG,
|
2011-12-08 07:34:16 +04:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
2016-07-29 10:29:13 +03:00
|
|
|
.abstract = true,
|
2011-12-08 07:34:16 +04:00
|
|
|
.instance_size = sizeof(FWCfgState),
|
|
|
|
.class_init = fw_cfg_class_init,
|
2010-06-27 20:04:55 +04:00
|
|
|
};
|
|
|
|
|
2017-01-12 21:24:15 +03:00
|
|
|
static void fw_cfg_file_slots_allocate(FWCfgState *s, Error **errp)
|
|
|
|
{
|
|
|
|
uint16_t file_slots_max;
|
|
|
|
|
|
|
|
if (fw_cfg_file_slots(s) < FW_CFG_FILE_SLOTS_MIN) {
|
|
|
|
error_setg(errp, "\"file_slots\" must be at least 0x%x",
|
|
|
|
FW_CFG_FILE_SLOTS_MIN);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* (UINT16_MAX & FW_CFG_ENTRY_MASK) is the highest inclusive selector value
|
|
|
|
* that we permit. The actual (exclusive) value coming from the
|
|
|
|
* configuration is (FW_CFG_FILE_FIRST + fw_cfg_file_slots(s)). */
|
|
|
|
file_slots_max = (UINT16_MAX & FW_CFG_ENTRY_MASK) - FW_CFG_FILE_FIRST + 1;
|
|
|
|
if (fw_cfg_file_slots(s) > file_slots_max) {
|
|
|
|
error_setg(errp, "\"file_slots\" must not exceed 0x%" PRIx16,
|
|
|
|
file_slots_max);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
s->entries[0] = g_new0(FWCfgEntry, fw_cfg_max_entry(s));
|
|
|
|
s->entries[1] = g_new0(FWCfgEntry, fw_cfg_max_entry(s));
|
|
|
|
s->entry_order = g_new0(int, fw_cfg_max_entry(s));
|
|
|
|
}
|
2014-12-22 15:11:35 +03:00
|
|
|
|
|
|
|
static Property fw_cfg_io_properties[] = {
|
2015-10-08 18:02:55 +03:00
|
|
|
DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled,
|
2016-02-18 22:31:00 +03:00
|
|
|
true),
|
2017-01-12 21:24:15 +03:00
|
|
|
DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState, parent_obj.file_slots,
|
2017-01-12 21:24:17 +03:00
|
|
|
FW_CFG_FILE_SLOTS_DFLT),
|
2014-12-22 15:11:35 +03:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void fw_cfg_io_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
FWCfgIoState *s = FW_CFG_IO(dev);
|
2017-01-12 21:24:15 +03:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
|
|
|
fw_cfg_file_slots_allocate(FW_CFG(s), &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
2014-12-22 15:11:35 +03:00
|
|
|
|
2016-02-19 21:20:25 +03:00
|
|
|
/* when using port i/o, the 8-bit data register ALWAYS overlaps
|
|
|
|
* with half of the 16-bit control register. Hence, the total size
|
|
|
|
* of the i/o region used is FW_CFG_CTL_SIZE */
|
2014-12-22 15:11:35 +03:00
|
|
|
memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops,
|
2015-10-08 18:02:55 +03:00
|
|
|
FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE);
|
|
|
|
|
|
|
|
if (FW_CFG(s)->dma_enabled) {
|
|
|
|
memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
|
|
|
|
&fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
|
|
|
|
sizeof(dma_addr_t));
|
|
|
|
}
|
2017-07-14 12:40:07 +03:00
|
|
|
|
|
|
|
fw_cfg_common_realize(dev, errp);
|
2014-12-22 15:11:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_io_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = fw_cfg_io_realize;
|
|
|
|
dc->props = fw_cfg_io_properties;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo fw_cfg_io_info = {
|
|
|
|
.name = TYPE_FW_CFG_IO,
|
|
|
|
.parent = TYPE_FW_CFG,
|
|
|
|
.instance_size = sizeof(FWCfgIoState),
|
|
|
|
.class_init = fw_cfg_io_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
2014-12-22 15:11:40 +03:00
|
|
|
static Property fw_cfg_mem_properties[] = {
|
|
|
|
DEFINE_PROP_UINT32("data_width", FWCfgMemState, data_width, -1),
|
2015-10-08 18:02:55 +03:00
|
|
|
DEFINE_PROP_BOOL("dma_enabled", FWCfgMemState, parent_obj.dma_enabled,
|
2016-02-18 22:31:00 +03:00
|
|
|
true),
|
2017-01-12 21:24:15 +03:00
|
|
|
DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState, parent_obj.file_slots,
|
2017-01-12 21:24:17 +03:00
|
|
|
FW_CFG_FILE_SLOTS_DFLT),
|
2014-12-22 15:11:40 +03:00
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
2014-12-22 15:11:35 +03:00
|
|
|
static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
FWCfgMemState *s = FW_CFG_MEM(dev);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
2014-12-22 15:11:40 +03:00
|
|
|
const MemoryRegionOps *data_ops = &fw_cfg_data_mem_ops;
|
2017-01-12 21:24:15 +03:00
|
|
|
Error *local_err = NULL;
|
|
|
|
|
|
|
|
fw_cfg_file_slots_allocate(FW_CFG(s), &local_err);
|
|
|
|
if (local_err) {
|
|
|
|
error_propagate(errp, local_err);
|
|
|
|
return;
|
|
|
|
}
|
2014-12-22 15:11:35 +03:00
|
|
|
|
|
|
|
memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops,
|
2015-10-08 18:02:55 +03:00
|
|
|
FW_CFG(s), "fwcfg.ctl", FW_CFG_CTL_SIZE);
|
2014-12-22 15:11:35 +03:00
|
|
|
sysbus_init_mmio(sbd, &s->ctl_iomem);
|
|
|
|
|
2014-12-22 15:11:40 +03:00
|
|
|
if (s->data_width > data_ops->valid.max_access_size) {
|
|
|
|
/* memberwise copy because the "old_mmio" member is const */
|
|
|
|
s->wide_data_ops.read = data_ops->read;
|
|
|
|
s->wide_data_ops.write = data_ops->write;
|
|
|
|
s->wide_data_ops.endianness = data_ops->endianness;
|
|
|
|
s->wide_data_ops.valid = data_ops->valid;
|
|
|
|
s->wide_data_ops.impl = data_ops->impl;
|
|
|
|
|
|
|
|
s->wide_data_ops.valid.max_access_size = s->data_width;
|
|
|
|
s->wide_data_ops.impl.max_access_size = s->data_width;
|
|
|
|
data_ops = &s->wide_data_ops;
|
|
|
|
}
|
|
|
|
memory_region_init_io(&s->data_iomem, OBJECT(s), data_ops, FW_CFG(s),
|
|
|
|
"fwcfg.data", data_ops->valid.max_access_size);
|
2014-12-22 15:11:35 +03:00
|
|
|
sysbus_init_mmio(sbd, &s->data_iomem);
|
2015-10-08 18:02:55 +03:00
|
|
|
|
|
|
|
if (FW_CFG(s)->dma_enabled) {
|
|
|
|
memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s),
|
|
|
|
&fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma",
|
|
|
|
sizeof(dma_addr_t));
|
|
|
|
sysbus_init_mmio(sbd, &FW_CFG(s)->dma_iomem);
|
|
|
|
}
|
2017-07-14 12:40:07 +03:00
|
|
|
|
|
|
|
fw_cfg_common_realize(dev, errp);
|
2014-12-22 15:11:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static void fw_cfg_mem_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = fw_cfg_mem_realize;
|
2014-12-22 15:11:40 +03:00
|
|
|
dc->props = fw_cfg_mem_properties;
|
2014-12-22 15:11:35 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo fw_cfg_mem_info = {
|
|
|
|
.name = TYPE_FW_CFG_MEM,
|
|
|
|
.parent = TYPE_FW_CFG,
|
|
|
|
.instance_size = sizeof(FWCfgMemState),
|
|
|
|
.class_init = fw_cfg_mem_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void fw_cfg_register_types(void)
|
2010-06-27 20:04:55 +04:00
|
|
|
{
|
2011-12-08 07:34:16 +04:00
|
|
|
type_register_static(&fw_cfg_info);
|
2014-12-22 15:11:35 +03:00
|
|
|
type_register_static(&fw_cfg_io_info);
|
|
|
|
type_register_static(&fw_cfg_mem_info);
|
2010-06-27 20:04:55 +04:00
|
|
|
}
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(fw_cfg_register_types)
|