2003-03-07 02:23:54 +03:00
|
|
|
/*
|
2012-02-06 10:02:55 +04:00
|
|
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* emulator main execution loop
|
2007-09-17 01:08:06 +04:00
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*
|
2005-04-07 00:47:48 +04:00
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|
|
* Copyright (c) 2003-2005 Fabrice Bellard
|
2003-03-07 02:23:54 +03:00
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*
|
2003-03-23 23:17:16 +03:00
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
|
2003-03-07 02:23:54 +03:00
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*
|
2003-03-23 23:17:16 +03:00
|
|
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
|
2003-03-07 02:23:54 +03:00
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*
|
2003-03-23 23:17:16 +03:00
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* You should have received a copy of the GNU Lesser General Public
|
2009-07-17 00:47:01 +04:00
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
2003-03-07 02:23:54 +03:00
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|
*/
|
2016-01-26 21:16:56 +03:00
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|
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#include "qemu/osdep.h"
|
2011-05-15 20:03:25 +04:00
|
|
|
#include "cpu.h"
|
2017-01-25 19:14:15 +03:00
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|
#include "trace-root.h"
|
2012-10-24 13:12:21 +04:00
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|
|
#include "disas/disas.h"
|
2016-03-15 15:18:37 +03:00
|
|
|
#include "exec/exec-all.h"
|
2008-05-10 14:55:51 +04:00
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|
|
#include "tcg.h"
|
2012-12-17 21:20:00 +04:00
|
|
|
#include "qemu/atomic.h"
|
2012-12-17 21:20:04 +04:00
|
|
|
#include "sysemu/qtest.h"
|
2014-07-25 13:56:31 +04:00
|
|
|
#include "qemu/timer.h"
|
2013-08-16 10:26:30 +04:00
|
|
|
#include "exec/address-spaces.h"
|
2015-01-21 14:09:14 +03:00
|
|
|
#include "qemu/rcu.h"
|
2015-05-31 09:11:45 +03:00
|
|
|
#include "exec/tb-hash.h"
|
2016-01-07 16:55:28 +03:00
|
|
|
#include "exec/log.h"
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
#include "qemu/main-loop.h"
|
2015-09-17 19:23:31 +03:00
|
|
|
#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
|
|
|
|
#include "hw/i386/apic.h"
|
|
|
|
#endif
|
2015-09-17 19:24:16 +03:00
|
|
|
#include "sysemu/replay.h"
|
2014-07-25 13:56:31 +04:00
|
|
|
|
|
|
|
/* -icount align implementation. */
|
|
|
|
|
|
|
|
typedef struct SyncClocks {
|
|
|
|
int64_t diff_clk;
|
|
|
|
int64_t last_cpu_icount;
|
2014-07-25 13:56:32 +04:00
|
|
|
int64_t realtime_clock;
|
2014-07-25 13:56:31 +04:00
|
|
|
} SyncClocks;
|
|
|
|
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
|
|
/* Allow the guest to have a max 3ms advance.
|
|
|
|
* The difference between the 2 clocks could therefore
|
|
|
|
* oscillate around 0.
|
|
|
|
*/
|
|
|
|
#define VM_CLOCK_ADVANCE 3000000
|
2014-07-25 13:56:32 +04:00
|
|
|
#define THRESHOLD_REDUCE 1.5
|
|
|
|
#define MAX_DELAY_PRINT_RATE 2000000000LL
|
|
|
|
#define MAX_NB_PRINTS 100
|
2014-07-25 13:56:31 +04:00
|
|
|
|
|
|
|
static void align_clocks(SyncClocks *sc, const CPUState *cpu)
|
|
|
|
{
|
|
|
|
int64_t cpu_icount;
|
|
|
|
|
|
|
|
if (!icount_align_option) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
|
|
|
|
sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
|
|
|
|
sc->last_cpu_icount = cpu_icount;
|
|
|
|
|
|
|
|
if (sc->diff_clk > VM_CLOCK_ADVANCE) {
|
|
|
|
#ifndef _WIN32
|
|
|
|
struct timespec sleep_delay, rem_delay;
|
|
|
|
sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
|
|
|
|
sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
|
|
|
|
if (nanosleep(&sleep_delay, &rem_delay) < 0) {
|
2015-01-28 12:09:55 +03:00
|
|
|
sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
|
2014-07-25 13:56:31 +04:00
|
|
|
} else {
|
|
|
|
sc->diff_clk = 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
Sleep(sc->diff_clk / SCALE_MS);
|
|
|
|
sc->diff_clk = 0;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-07-25 13:56:32 +04:00
|
|
|
static void print_delay(const SyncClocks *sc)
|
|
|
|
{
|
|
|
|
static float threshold_delay;
|
|
|
|
static int64_t last_realtime_clock;
|
|
|
|
static int nb_prints;
|
|
|
|
|
|
|
|
if (icount_align_option &&
|
|
|
|
sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
|
|
|
|
nb_prints < MAX_NB_PRINTS) {
|
|
|
|
if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
|
|
|
|
(-sc->diff_clk / (float)1000000000LL <
|
|
|
|
(threshold_delay - THRESHOLD_REDUCE))) {
|
|
|
|
threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
|
|
|
|
printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
|
|
|
|
threshold_delay - 1,
|
|
|
|
threshold_delay);
|
|
|
|
nb_prints++;
|
|
|
|
last_realtime_clock = sc->realtime_clock;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-07-25 13:56:31 +04:00
|
|
|
static void init_delay_params(SyncClocks *sc,
|
|
|
|
const CPUState *cpu)
|
|
|
|
{
|
|
|
|
if (!icount_align_option) {
|
|
|
|
return;
|
|
|
|
}
|
2015-01-28 12:16:37 +03:00
|
|
|
sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
|
|
|
|
sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
|
2014-07-25 13:56:31 +04:00
|
|
|
sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
|
2014-07-25 13:56:33 +04:00
|
|
|
if (sc->diff_clk < max_delay) {
|
|
|
|
max_delay = sc->diff_clk;
|
|
|
|
}
|
|
|
|
if (sc->diff_clk > max_advance) {
|
|
|
|
max_advance = sc->diff_clk;
|
|
|
|
}
|
2014-07-25 13:56:32 +04:00
|
|
|
|
|
|
|
/* Print every 2s max if the guest is late. We limit the number
|
|
|
|
of printed messages to NB_PRINT_MAX(currently 100) */
|
|
|
|
print_delay(sc);
|
2014-07-25 13:56:31 +04:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
static void align_clocks(SyncClocks *sc, const CPUState *cpu)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif /* CONFIG USER ONLY */
|
2003-03-07 02:23:54 +03:00
|
|
|
|
2013-02-22 22:10:02 +04:00
|
|
|
/* Execute a TB, and fix up the CPU state afterwards if necessary */
|
2016-03-15 17:30:19 +03:00
|
|
|
static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
|
2013-02-22 22:10:02 +04:00
|
|
|
{
|
|
|
|
CPUArchState *env = cpu->env_ptr;
|
2016-04-21 15:58:23 +03:00
|
|
|
uintptr_t ret;
|
|
|
|
TranslationBlock *last_tb;
|
|
|
|
int tb_exit;
|
2016-03-15 17:30:19 +03:00
|
|
|
uint8_t *tb_ptr = itb->tc_ptr;
|
|
|
|
|
2016-03-15 17:30:21 +03:00
|
|
|
qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
|
2016-10-27 18:10:01 +03:00
|
|
|
"Trace %p [%d: " TARGET_FMT_lx "] %s\n",
|
|
|
|
itb->tc_ptr, cpu->cpu_index, itb->pc,
|
|
|
|
lookup_symbol(itb->pc));
|
2013-11-06 11:29:39 +04:00
|
|
|
|
|
|
|
#if defined(DEBUG_DISAS)
|
2016-07-13 09:39:16 +03:00
|
|
|
if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
|
|
|
|
&& qemu_log_in_addr_range(itb->pc)) {
|
2016-09-23 01:17:10 +03:00
|
|
|
qemu_log_lock();
|
2013-11-06 11:29:39 +04:00
|
|
|
#if defined(TARGET_I386)
|
|
|
|
log_cpu_state(cpu, CPU_DUMP_CCOP);
|
|
|
|
#else
|
|
|
|
log_cpu_state(cpu, 0);
|
|
|
|
#endif
|
2016-09-23 01:17:10 +03:00
|
|
|
qemu_log_unlock();
|
2013-11-06 11:29:39 +04:00
|
|
|
}
|
|
|
|
#endif /* DEBUG_DISAS */
|
|
|
|
|
2015-06-24 15:16:26 +03:00
|
|
|
cpu->can_do_io = !use_icount;
|
2016-04-21 15:58:23 +03:00
|
|
|
ret = tcg_qemu_tb_exec(env, tb_ptr);
|
2014-12-08 10:53:17 +03:00
|
|
|
cpu->can_do_io = 1;
|
2016-04-21 15:58:23 +03:00
|
|
|
last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
|
|
|
|
tb_exit = ret & TB_EXIT_MASK;
|
|
|
|
trace_exec_tb_exit(last_tb, tb_exit);
|
2014-08-01 20:08:57 +04:00
|
|
|
|
2016-04-21 15:58:23 +03:00
|
|
|
if (tb_exit > TB_EXIT_IDX1) {
|
2013-02-22 22:10:02 +04:00
|
|
|
/* We didn't start executing this TB (eg because the instruction
|
|
|
|
* counter hit zero); we must restore the guest PC to the address
|
|
|
|
* of the start of the TB.
|
|
|
|
*/
|
2013-06-28 21:31:32 +04:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2016-04-21 15:58:23 +03:00
|
|
|
qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
|
2016-03-15 17:30:21 +03:00
|
|
|
"Stopped execution of TB chain before %p ["
|
|
|
|
TARGET_FMT_lx "] %s\n",
|
2016-04-21 15:58:23 +03:00
|
|
|
last_tb->tc_ptr, last_tb->pc,
|
|
|
|
lookup_symbol(last_tb->pc));
|
2013-06-28 21:31:32 +04:00
|
|
|
if (cc->synchronize_from_tb) {
|
2016-04-21 15:58:23 +03:00
|
|
|
cc->synchronize_from_tb(cpu, last_tb);
|
2013-06-28 21:31:32 +04:00
|
|
|
} else {
|
|
|
|
assert(cc->set_pc);
|
2016-04-21 15:58:23 +03:00
|
|
|
cc->set_pc(cpu, last_tb->pc);
|
2013-06-28 21:31:32 +04:00
|
|
|
}
|
2013-02-22 22:10:02 +04:00
|
|
|
}
|
2016-04-21 15:58:23 +03:00
|
|
|
if (tb_exit == TB_EXIT_REQUESTED) {
|
2013-02-22 22:10:03 +04:00
|
|
|
/* We were asked to stop executing TBs (probably a pending
|
|
|
|
* interrupt. We've now stopped, so clear the flag.
|
|
|
|
*/
|
2016-10-01 00:30:59 +03:00
|
|
|
atomic_set(&cpu->tcg_exit_req, 0);
|
2013-02-22 22:10:03 +04:00
|
|
|
}
|
2016-04-21 15:58:23 +03:00
|
|
|
return ret;
|
2013-02-22 22:10:02 +04:00
|
|
|
}
|
|
|
|
|
2015-08-11 12:05:12 +03:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2008-06-29 05:03:05 +04:00
|
|
|
/* Execute the code without caching the generated code. An interpreter
|
|
|
|
could be used if available. */
|
2015-06-18 20:24:55 +03:00
|
|
|
static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
|
2015-09-17 19:23:59 +03:00
|
|
|
TranslationBlock *orig_tb, bool ignore_icount)
|
2008-06-29 05:03:05 +04:00
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
|
|
|
|
|
|
|
/* Should never happen.
|
|
|
|
We only end up here when an existing TB is too long. */
|
|
|
|
if (max_cycles > CF_COUNT_MASK)
|
|
|
|
max_cycles = CF_COUNT_MASK;
|
|
|
|
|
2016-10-27 18:10:06 +03:00
|
|
|
tb_lock();
|
2015-06-30 12:35:09 +03:00
|
|
|
tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
|
2015-09-17 19:23:59 +03:00
|
|
|
max_cycles | CF_NOCACHE
|
|
|
|
| (ignore_icount ? CF_IGNORE_ICOUNT : 0));
|
2016-08-02 20:27:43 +03:00
|
|
|
tb->orig_tb = orig_tb;
|
2016-10-27 18:10:06 +03:00
|
|
|
tb_unlock();
|
|
|
|
|
2008-06-29 05:03:05 +04:00
|
|
|
/* execute the generated code */
|
2014-08-01 20:08:57 +04:00
|
|
|
trace_exec_tb_nocache(tb, tb->pc);
|
2016-03-15 17:30:19 +03:00
|
|
|
cpu_tb_exec(cpu, tb);
|
2016-10-27 18:10:06 +03:00
|
|
|
|
|
|
|
tb_lock();
|
2008-06-29 05:03:05 +04:00
|
|
|
tb_phys_invalidate(tb, -1);
|
|
|
|
tb_free(tb);
|
2016-10-27 18:10:06 +03:00
|
|
|
tb_unlock();
|
2008-06-29 05:03:05 +04:00
|
|
|
}
|
2015-08-11 12:05:12 +03:00
|
|
|
#endif
|
2008-06-29 05:03:05 +04:00
|
|
|
|
2016-06-30 08:12:55 +03:00
|
|
|
static void cpu_exec_step(CPUState *cpu)
|
|
|
|
{
|
2017-02-23 21:29:15 +03:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2016-06-30 08:12:55 +03:00
|
|
|
CPUArchState *env = (CPUArchState *)cpu->env_ptr;
|
|
|
|
TranslationBlock *tb;
|
|
|
|
target_ulong cs_base, pc;
|
|
|
|
uint32_t flags;
|
|
|
|
|
|
|
|
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
|
2017-02-23 21:29:15 +03:00
|
|
|
if (sigsetjmp(cpu->jmp_env, 0) == 0) {
|
|
|
|
mmap_lock();
|
|
|
|
tb_lock();
|
|
|
|
tb = tb_gen_code(cpu, pc, cs_base, flags,
|
|
|
|
1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
|
|
|
|
tb->orig_tb = NULL;
|
|
|
|
tb_unlock();
|
|
|
|
mmap_unlock();
|
|
|
|
|
|
|
|
cc->cpu_exec_enter(cpu);
|
|
|
|
/* execute the generated code */
|
|
|
|
trace_exec_tb_nocache(tb, pc);
|
|
|
|
cpu_tb_exec(cpu, tb);
|
|
|
|
cc->cpu_exec_exit(cpu);
|
|
|
|
|
|
|
|
tb_lock();
|
|
|
|
tb_phys_invalidate(tb, -1);
|
|
|
|
tb_free(tb);
|
|
|
|
tb_unlock();
|
|
|
|
} else {
|
|
|
|
/* We may have exited due to another problem here, so we need
|
|
|
|
* to reset any tb_locks we may have taken but didn't release.
|
|
|
|
* The mmap_lock is dropped by tb_gen_code if it runs out of
|
|
|
|
* memory.
|
|
|
|
*/
|
|
|
|
#ifndef CONFIG_SOFTMMU
|
|
|
|
tcg_debug_assert(!have_mmap_lock());
|
|
|
|
#endif
|
|
|
|
tb_lock_reset();
|
|
|
|
}
|
2016-06-30 08:12:55 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_exec_step_atomic(CPUState *cpu)
|
|
|
|
{
|
|
|
|
start_exclusive();
|
|
|
|
|
|
|
|
/* Since we got here, we know that parallel_cpus must be true. */
|
|
|
|
parallel_cpus = false;
|
|
|
|
cpu_exec_step(cpu);
|
|
|
|
parallel_cpus = true;
|
|
|
|
|
|
|
|
end_exclusive();
|
|
|
|
}
|
|
|
|
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:32 +03:00
|
|
|
struct tb_desc {
|
|
|
|
target_ulong pc;
|
|
|
|
target_ulong cs_base;
|
|
|
|
CPUArchState *env;
|
|
|
|
tb_page_addr_t phys_page1;
|
|
|
|
uint32_t flags;
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool tb_cmp(const void *p, const void *d)
|
|
|
|
{
|
|
|
|
const TranslationBlock *tb = p;
|
|
|
|
const struct tb_desc *desc = d;
|
|
|
|
|
|
|
|
if (tb->pc == desc->pc &&
|
|
|
|
tb->page_addr[0] == desc->phys_page1 &&
|
|
|
|
tb->cs_base == desc->cs_base &&
|
2016-07-19 09:36:18 +03:00
|
|
|
tb->flags == desc->flags &&
|
|
|
|
!atomic_read(&tb->invalid)) {
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:32 +03:00
|
|
|
/* check next page if needed */
|
|
|
|
if (tb->page_addr[1] == -1) {
|
|
|
|
return true;
|
|
|
|
} else {
|
|
|
|
tb_page_addr_t phys_page2;
|
|
|
|
target_ulong virt_page2;
|
|
|
|
|
|
|
|
virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
|
|
|
|
phys_page2 = get_page_addr_code(desc->env, virt_page2);
|
|
|
|
if (tb->page_addr[1] == phys_page2) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-07-15 20:58:52 +03:00
|
|
|
static TranslationBlock *tb_htable_lookup(CPUState *cpu,
|
2015-08-11 12:33:24 +03:00
|
|
|
target_ulong pc,
|
|
|
|
target_ulong cs_base,
|
2016-04-07 20:19:22 +03:00
|
|
|
uint32_t flags)
|
2005-11-20 13:35:40 +03:00
|
|
|
{
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:32 +03:00
|
|
|
tb_page_addr_t phys_pc;
|
|
|
|
struct tb_desc desc;
|
tb hash: hash phys_pc, pc, and flags with xxhash
For some workloads such as arm bootup, tb_phys_hash is performance-critical.
The is due to the high frequency of accesses to the hash table, originated
by (frequent) TLB flushes that wipe out the cpu-private tb_jmp_cache's.
More info:
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg05098.html
To dig further into this I modified an arm image booting debian jessie to
immediately shut down after boot. Analysis revealed that quite a bit of time
is unnecessarily spent in tb_phys_hash: the cause is poor hashing that
results in very uneven loading of chains in the hash table's buckets;
the longest observed chain had ~550 elements.
The appended addresses this with two changes:
1) Use xxhash as the hash table's hash function. xxhash is a fast,
high-quality hashing function.
2) Feed the hashing function with not just tb_phys, but also pc and flags.
This improves performance over using just tb_phys for hashing, since that
resulted in some hash buckets having many TB's, while others getting very few;
with these changes, the longest observed chain on a single hash bucket is
brought down from ~550 to ~40.
Tests show that the other element checked for in tb_find_physical,
cs_base, is always a match when tb_phys+pc+flags are a match,
so hashing cs_base is wasteful. It could be that this is an ARM-only
thing, though. UPDATE:
On Tue, Apr 05, 2016 at 08:41:43 -0700, Richard Henderson wrote:
> The cs_base field is only used by i386 (in 16-bit modes), and sparc (for a TB
> consisting of only a delay slot).
> It may well still turn out to be reasonable to ignore cs_base for hashing.
BTW, after this change the hash table should not be called "tb_hash_phys"
anymore; this is addressed later in this series.
This change gives consistent bootup time improvements. I tested two
host machines:
- Intel Xeon E5-2690: 11.6% less time
- Intel i7-4790K: 19.2% less time
Increasing the number of hash buckets yields further improvements. However,
using a larger, fixed number of buckets can degrade performance for other
workloads that do not translate as many blocks (600K+ for debian-jessie arm
bootup). This is dealt with later in this series.
Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-8-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:25 +03:00
|
|
|
uint32_t h;
|
2007-09-17 12:09:54 +04:00
|
|
|
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:32 +03:00
|
|
|
desc.env = (CPUArchState *)cpu->env_ptr;
|
|
|
|
desc.cs_base = cs_base;
|
|
|
|
desc.flags = flags;
|
|
|
|
desc.pc = pc;
|
|
|
|
phys_pc = get_page_addr_code(desc.env, pc);
|
|
|
|
desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
|
tb hash: hash phys_pc, pc, and flags with xxhash
For some workloads such as arm bootup, tb_phys_hash is performance-critical.
The is due to the high frequency of accesses to the hash table, originated
by (frequent) TLB flushes that wipe out the cpu-private tb_jmp_cache's.
More info:
https://lists.nongnu.org/archive/html/qemu-devel/2016-03/msg05098.html
To dig further into this I modified an arm image booting debian jessie to
immediately shut down after boot. Analysis revealed that quite a bit of time
is unnecessarily spent in tb_phys_hash: the cause is poor hashing that
results in very uneven loading of chains in the hash table's buckets;
the longest observed chain had ~550 elements.
The appended addresses this with two changes:
1) Use xxhash as the hash table's hash function. xxhash is a fast,
high-quality hashing function.
2) Feed the hashing function with not just tb_phys, but also pc and flags.
This improves performance over using just tb_phys for hashing, since that
resulted in some hash buckets having many TB's, while others getting very few;
with these changes, the longest observed chain on a single hash bucket is
brought down from ~550 to ~40.
Tests show that the other element checked for in tb_find_physical,
cs_base, is always a match when tb_phys+pc+flags are a match,
so hashing cs_base is wasteful. It could be that this is an ARM-only
thing, though. UPDATE:
On Tue, Apr 05, 2016 at 08:41:43 -0700, Richard Henderson wrote:
> The cs_base field is only used by i386 (in 16-bit modes), and sparc (for a TB
> consisting of only a delay slot).
> It may well still turn out to be reasonable to ignore cs_base for hashing.
BTW, after this change the hash table should not be called "tb_hash_phys"
anymore; this is addressed later in this series.
This change gives consistent bootup time improvements. I tested two
host machines:
- Intel Xeon E5-2690: 11.6% less time
- Intel i7-4790K: 19.2% less time
Increasing the number of hash buckets yields further improvements. However,
using a larger, fixed number of buckets can degrade performance for other
workloads that do not translate as many blocks (600K+ for debian-jessie arm
bootup). This is dealt with later in this series.
Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-8-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:25 +03:00
|
|
|
h = tb_hash_func(phys_pc, pc, flags);
|
tb hash: track translated blocks with qht
Having a fixed-size hash table for keeping track of all translation blocks
is suboptimal: some workloads are just too big or too small to get maximum
performance from the hash table. The MRU promotion policy helps improve
performance when the hash table is a little undersized, but it cannot
make up for severely undersized hash tables.
Furthermore, frequent MRU promotions result in writes that are a scalability
bottleneck. For scalability, lookups should only perform reads, not writes.
This is not a big deal for now, but it will become one once MTTCG matures.
The appended fixes these issues by using qht as the implementation of
the TB hash table. This solution is superior to other alternatives considered,
namely:
- master: implementation in QEMU before this patchset
- xxhash: before this patch, i.e. fixed buckets + xxhash hashing + MRU.
- xxhash-rcu: fixed buckets + xxhash + RCU list + MRU.
MRU is implemented here by adding an intermediate struct
that contains the u32 hash and a pointer to the TB; this
allows us, on an MRU promotion, to copy said struct (that is not
at the head), and put this new copy at the head. After a grace
period, the original non-head struct can be eliminated, and
after another grace period, freed.
- qht-fixed-nomru: fixed buckets + xxhash + qht without auto-resize +
no MRU for lookups; MRU for inserts.
The appended solution is the following:
- qht-dyn-nomru: dynamic number of buckets + xxhash + qht w/ auto-resize +
no MRU for lookups; MRU for inserts.
The plots below compare the considered solutions. The Y axis shows the
boot time (in seconds) of a debian jessie image with arm-softmmu; the X axis
sweeps the number of buckets (or initial number of buckets for qht-autoresize).
The plots in PNG format (and with errorbars) can be seen here:
http://imgur.com/a/Awgnq
Each test runs 5 times, and the entire QEMU process is pinned to a
single core for repeatability of results.
Host: Intel Xeon E5-2690
28 ++------------+-------------+-------------+-------------+------------++
A***** + + + master **A*** +
27 ++ * xxhash ##B###++
| A******A****** xxhash-rcu $$C$$$ |
26 C$$ A******A****** qht-fixed-nomru*%%D%%%++
D%%$$ A******A******A*qht-dyn-mru A*E****A
25 ++ %%$$ qht-dyn-nomru &&F&&&++
B#####% |
24 ++ #C$$$$$ ++
| B### $ |
| ## C$$$$$$ |
23 ++ # C$$$$$$ ++
| B###### C$$$$$$ %%%D
22 ++ %B###### C$$$$$$C$$$$$$C$$$$$$C$$$$$$C$$$$$$C
| D%%%%%%B###### @E@@@@@@ %%%D%%%@@@E@@@@@@E
21 E@@@@@@E@@@@@@F&&&@@@E@@@&&&D%%%%%%B######B######B######B######B######B
+ E@@@ F&&& + E@ + F&&& + +
20 ++------------+-------------+-------------+-------------+------------++
14 16 18 20 22 24
log2 number of buckets
Host: Intel i7-4790K
14.5 ++------------+------------+-------------+------------+------------++
A** + + + master **A*** +
14 ++ ** xxhash ##B###++
13.5 ++ ** xxhash-rcu $$C$$$++
| qht-fixed-nomru %%D%%% |
13 ++ A****** qht-dyn-mru @@E@@@++
| A*****A******A****** qht-dyn-nomru &&F&&& |
12.5 C$$ A******A******A*****A****** ***A
12 ++ $$ A*** ++
D%%% $$ |
11.5 ++ %% ++
B### %C$$$$$$ |
11 ++ ## D%%%%% C$$$$$ ++
| # % C$$$$$$ |
10.5 F&&&&&&B######D%%%%% C$$$$$$C$$$$$$C$$$$$$C$$$$$C$$$$$$ $$$C
10 E@@@@@@E@@@@@@B#####B######B######E@@@@@@E@@@%%%D%%%%%D%%%###B######B
+ F&& D%%%%%%B######B######B#####B###@@@D%%% +
9.5 ++------------+------------+-------------+------------+------------++
14 16 18 20 22 24
log2 number of buckets
Note that the original point before this patch series is X=15 for "master";
the little sensitivity to the increased number of buckets is due to the
poor hashing function in master.
xxhash-rcu has significant overhead due to the constant churn of allocating
and deallocating intermediate structs for implementing MRU. An alternative
would be do consider failed lookups as "maybe not there", and then
acquire the external lock (tb_lock in this case) to really confirm that
there was indeed a failed lookup. This, however, would not be enough
to implement dynamic resizing--this is more complex: see
"Resizable, Scalable, Concurrent Hash Tables via Relativistic
Programming" by Triplett, McKenney and Walpole. This solution was
discarded due to the very coarse RCU read critical sections that we have
in MTTCG; resizing requires waiting for readers after every pointer update,
and resizes require many pointer updates, so this would quickly become
prohibitive.
qht-fixed-nomru shows that MRU promotion is advisable for undersized
hash tables.
However, qht-dyn-mru shows that MRU promotion is not important if the
hash table is properly sized: there is virtually no difference in
performance between qht-dyn-nomru and qht-dyn-mru.
Before this patch, we're at X=15 on "xxhash"; after this patch, we're at
X=15 @ qht-dyn-nomru. This patch thus matches the best performance that we
can achieve with optimum sizing of the hash table, while keeping the hash
table scalable for readers.
The improvement we get before and after this patch for booting debian jessie
with arm-softmmu is:
- Intel Xeon E5-2690: 10.5% less time
- Intel i7-4790K: 5.2% less time
We could get this same improvement _for this particular workload_ by
statically increasing the size of the hash table. But this would hurt
workloads that do not need a large hash table. The dynamic (upward)
resizing allows us to start small and enlarge the hash table as needed.
A quick note on downsizing: the table is resized back to 2**15 buckets
on every tb_flush; this makes sense because it is not guaranteed that the
table will reach the same number of TBs later on (e.g. most bootup code is
thrown away after boot); it makes sense to grow the hash table as
more code blocks are translated. This also avoids the complication of
having to build downsizing hysteresis logic into qht.
Reviewed-by: Sergey Fedorov <serge.fedorov@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1465412133-3029-15-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-06-08 21:55:32 +03:00
|
|
|
return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
|
2015-08-11 12:33:24 +03:00
|
|
|
}
|
|
|
|
|
2016-07-15 20:58:51 +03:00
|
|
|
static inline TranslationBlock *tb_find(CPUState *cpu,
|
|
|
|
TranslationBlock *last_tb,
|
|
|
|
int tb_exit)
|
2005-11-20 13:35:40 +03:00
|
|
|
{
|
2015-06-18 20:24:55 +03:00
|
|
|
CPUArchState *env = (CPUArchState *)cpu->env_ptr;
|
2005-11-20 13:35:40 +03:00
|
|
|
TranslationBlock *tb;
|
|
|
|
target_ulong cs_base, pc;
|
2016-04-07 20:19:22 +03:00
|
|
|
uint32_t flags;
|
2016-07-15 20:58:50 +03:00
|
|
|
bool have_tb_lock = false;
|
2005-11-20 13:35:40 +03:00
|
|
|
|
|
|
|
/* we record a subset of the CPU state. It will
|
|
|
|
always be the same before a given translated block
|
|
|
|
is executed. */
|
2008-11-18 22:46:41 +03:00
|
|
|
cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
|
2016-07-15 20:58:43 +03:00
|
|
|
tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
|
2008-07-03 21:57:36 +04:00
|
|
|
if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
|
|
|
|
tb->flags != flags)) {
|
2016-07-15 20:58:52 +03:00
|
|
|
tb = tb_htable_lookup(cpu, pc, cs_base, flags);
|
2016-07-15 20:58:51 +03:00
|
|
|
if (!tb) {
|
|
|
|
|
|
|
|
/* mmap_lock is needed by tb_gen_code, and mmap_lock must be
|
|
|
|
* taken outside tb_lock. As system emulation is currently
|
|
|
|
* single threaded the locks are NOPs.
|
|
|
|
*/
|
|
|
|
mmap_lock();
|
|
|
|
tb_lock();
|
|
|
|
have_tb_lock = true;
|
|
|
|
|
|
|
|
/* There's a chance that our desired tb has been translated while
|
|
|
|
* taking the locks so we check again inside the lock.
|
|
|
|
*/
|
2016-07-15 20:58:52 +03:00
|
|
|
tb = tb_htable_lookup(cpu, pc, cs_base, flags);
|
2016-07-15 20:58:51 +03:00
|
|
|
if (!tb) {
|
|
|
|
/* if no translated code available, then translate it now */
|
|
|
|
tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
mmap_unlock();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We add the TB in the virtual pc hash table for the fast lookup */
|
|
|
|
atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
|
2005-11-20 13:35:40 +03:00
|
|
|
}
|
2016-05-16 16:13:00 +03:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
/* We don't take care of direct jumps when address mapping changes in
|
|
|
|
* system emulation. So it's not safe to make a direct jump to a TB
|
|
|
|
* spanning two pages because the mapping for the second page can change.
|
|
|
|
*/
|
|
|
|
if (tb->page_addr[1] != -1) {
|
2016-07-15 20:58:42 +03:00
|
|
|
last_tb = NULL;
|
2016-05-16 16:13:00 +03:00
|
|
|
}
|
|
|
|
#endif
|
2016-04-25 18:17:30 +03:00
|
|
|
/* See if we can patch the calling TB. */
|
2016-07-15 20:58:42 +03:00
|
|
|
if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
|
2016-07-15 20:58:50 +03:00
|
|
|
if (!have_tb_lock) {
|
|
|
|
tb_lock();
|
|
|
|
have_tb_lock = true;
|
|
|
|
}
|
2016-08-02 20:27:43 +03:00
|
|
|
if (!tb->invalid) {
|
2016-07-15 20:58:44 +03:00
|
|
|
tb_add_jump(last_tb, tb_exit, tb);
|
|
|
|
}
|
2016-07-15 20:58:50 +03:00
|
|
|
}
|
|
|
|
if (have_tb_lock) {
|
2016-07-15 20:58:49 +03:00
|
|
|
tb_unlock();
|
2016-04-25 18:17:30 +03:00
|
|
|
}
|
2005-11-20 13:35:40 +03:00
|
|
|
return tb;
|
|
|
|
}
|
|
|
|
|
2016-05-11 13:21:47 +03:00
|
|
|
static inline bool cpu_handle_halt(CPUState *cpu)
|
|
|
|
{
|
|
|
|
if (cpu->halted) {
|
|
|
|
#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
|
|
|
|
if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
|
|
|
|
&& replay_interrupt()) {
|
|
|
|
X86CPU *x86_cpu = X86_CPU(cpu);
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_lock_iothread();
|
2016-05-11 13:21:47 +03:00
|
|
|
apic_poll_irq(x86_cpu->apic_state);
|
|
|
|
cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2016-05-11 13:21:47 +03:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
if (!cpu_has_work(cpu)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu->halted = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2016-05-11 13:21:48 +03:00
|
|
|
static inline void cpu_handle_debug_exception(CPUState *cpu)
|
2011-03-15 14:26:13 +03:00
|
|
|
{
|
2014-09-12 17:06:48 +04:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2011-03-15 14:26:13 +03:00
|
|
|
CPUWatchpoint *wp;
|
|
|
|
|
2013-08-26 20:23:18 +04:00
|
|
|
if (!cpu->watchpoint_hit) {
|
|
|
|
QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
|
2011-03-15 14:26:13 +03:00
|
|
|
wp->flags &= ~BP_WATCHPOINT_HIT;
|
|
|
|
}
|
|
|
|
}
|
2014-09-12 17:06:48 +04:00
|
|
|
|
|
|
|
cc->debug_excp_handler(cpu);
|
2011-03-15 14:26:13 +03:00
|
|
|
}
|
|
|
|
|
2016-05-11 13:21:48 +03:00
|
|
|
static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
|
|
|
|
{
|
|
|
|
if (cpu->exception_index >= 0) {
|
|
|
|
if (cpu->exception_index >= EXCP_INTERRUPT) {
|
|
|
|
/* exit request from the cpu execution loop */
|
|
|
|
*ret = cpu->exception_index;
|
|
|
|
if (*ret == EXCP_DEBUG) {
|
|
|
|
cpu_handle_debug_exception(cpu);
|
|
|
|
}
|
|
|
|
cpu->exception_index = -1;
|
|
|
|
return true;
|
|
|
|
} else {
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
/* if user mode only, we simulate a fake exception
|
|
|
|
which will be handled outside the cpu execution
|
|
|
|
loop */
|
|
|
|
#if defined(TARGET_I386)
|
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
|
|
|
cc->do_interrupt(cpu);
|
|
|
|
#endif
|
|
|
|
*ret = cpu->exception_index;
|
|
|
|
cpu->exception_index = -1;
|
|
|
|
return true;
|
|
|
|
#else
|
|
|
|
if (replay_exception()) {
|
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_lock_iothread();
|
2016-05-11 13:21:48 +03:00
|
|
|
cc->do_interrupt(cpu);
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2016-05-11 13:21:48 +03:00
|
|
|
cpu->exception_index = -1;
|
|
|
|
} else if (!replay_has_interrupt()) {
|
|
|
|
/* give a chance to iothread in replay mode */
|
|
|
|
*ret = EXCP_INTERRUPT;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
} else if (replay_has_exception()
|
|
|
|
&& cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
|
|
|
|
/* try to cause an exception pending in the log */
|
2016-07-15 20:58:51 +03:00
|
|
|
cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
|
2016-05-11 13:21:48 +03:00
|
|
|
*ret = -1;
|
|
|
|
return true;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-01-27 12:57:18 +03:00
|
|
|
static inline bool cpu_handle_interrupt(CPUState *cpu,
|
2016-05-11 13:21:49 +03:00
|
|
|
TranslationBlock **last_tb)
|
|
|
|
{
|
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
|
|
|
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
if (unlikely(atomic_read(&cpu->interrupt_request))) {
|
|
|
|
int interrupt_request;
|
|
|
|
qemu_mutex_lock_iothread();
|
|
|
|
interrupt_request = cpu->interrupt_request;
|
2016-05-11 13:21:49 +03:00
|
|
|
if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
|
|
|
|
/* Mask out external interrupts for this step. */
|
|
|
|
interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
|
|
|
|
}
|
|
|
|
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
|
|
|
|
cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
|
|
|
|
cpu->exception_index = EXCP_DEBUG;
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2017-01-27 12:57:18 +03:00
|
|
|
return true;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
|
|
|
if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
|
|
|
|
/* Do nothing */
|
|
|
|
} else if (interrupt_request & CPU_INTERRUPT_HALT) {
|
|
|
|
replay_interrupt();
|
|
|
|
cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
|
|
|
|
cpu->halted = 1;
|
|
|
|
cpu->exception_index = EXCP_HLT;
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2017-01-27 12:57:18 +03:00
|
|
|
return true;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
|
|
|
#if defined(TARGET_I386)
|
|
|
|
else if (interrupt_request & CPU_INTERRUPT_INIT) {
|
|
|
|
X86CPU *x86_cpu = X86_CPU(cpu);
|
|
|
|
CPUArchState *env = &x86_cpu->env;
|
|
|
|
replay_interrupt();
|
2017-02-16 14:30:05 +03:00
|
|
|
cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
|
2016-05-11 13:21:49 +03:00
|
|
|
do_cpu_init(x86_cpu);
|
|
|
|
cpu->exception_index = EXCP_HALTED;
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2017-01-27 12:57:18 +03:00
|
|
|
return true;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
|
|
|
#else
|
|
|
|
else if (interrupt_request & CPU_INTERRUPT_RESET) {
|
|
|
|
replay_interrupt();
|
|
|
|
cpu_reset(cpu);
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
qemu_mutex_unlock_iothread();
|
2017-01-27 12:57:18 +03:00
|
|
|
return true;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
/* The target hook has 3 exit conditions:
|
|
|
|
False when the interrupt isn't processed,
|
|
|
|
True when it is, and we should restart on a new TB,
|
|
|
|
and via longjmp via cpu_loop_exit. */
|
|
|
|
else {
|
|
|
|
if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
|
2017-01-24 10:17:08 +03:00
|
|
|
replay_interrupt();
|
2016-05-11 13:21:49 +03:00
|
|
|
*last_tb = NULL;
|
|
|
|
}
|
2016-05-12 19:52:17 +03:00
|
|
|
/* The target hook may have updated the 'cpu->interrupt_request';
|
|
|
|
* reload the 'interrupt_request' value */
|
|
|
|
interrupt_request = cpu->interrupt_request;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
2016-05-12 19:52:17 +03:00
|
|
|
if (interrupt_request & CPU_INTERRUPT_EXITTB) {
|
2016-05-11 13:21:49 +03:00
|
|
|
cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
|
|
|
|
/* ensure that no TB jump will be modified as
|
|
|
|
the program flow was changed */
|
|
|
|
*last_tb = NULL;
|
|
|
|
}
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
|
|
|
|
/* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
|
|
|
|
qemu_mutex_unlock_iothread();
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
|
|
|
|
|
2016-10-01 00:30:59 +03:00
|
|
|
if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
|
|
|
|
atomic_set(&cpu->exit_request, 0);
|
2016-05-11 13:21:49 +03:00
|
|
|
cpu->exception_index = EXCP_INTERRUPT;
|
2017-01-27 12:57:18 +03:00
|
|
|
return true;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
2017-01-27 12:57:18 +03:00
|
|
|
|
|
|
|
return false;
|
2016-05-11 13:21:49 +03:00
|
|
|
}
|
|
|
|
|
2016-05-11 13:21:50 +03:00
|
|
|
static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
|
|
|
|
TranslationBlock **last_tb, int *tb_exit,
|
|
|
|
SyncClocks *sc)
|
|
|
|
{
|
|
|
|
uintptr_t ret;
|
|
|
|
|
2016-10-01 00:30:59 +03:00
|
|
|
if (unlikely(atomic_read(&cpu->exit_request))) {
|
2016-05-11 13:21:50 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
trace_exec_tb(tb, tb->pc);
|
|
|
|
ret = cpu_tb_exec(cpu, tb);
|
2017-01-29 14:00:59 +03:00
|
|
|
tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
|
2016-05-11 13:21:50 +03:00
|
|
|
*tb_exit = ret & TB_EXIT_MASK;
|
|
|
|
switch (*tb_exit) {
|
|
|
|
case TB_EXIT_REQUESTED:
|
2017-02-23 21:29:12 +03:00
|
|
|
/* Something asked us to stop executing chained TBs; just
|
|
|
|
* continue round the main loop. Whatever requested the exit
|
|
|
|
* will also have set something else (eg interrupt_request)
|
|
|
|
* which we will handle next time around the loop. But we
|
|
|
|
* need to ensure the tcg_exit_req read in generated code
|
|
|
|
* comes before the next read of cpu->exit_request or
|
|
|
|
* cpu->interrupt_request.
|
2016-05-11 13:21:50 +03:00
|
|
|
*/
|
2017-01-29 14:15:15 +03:00
|
|
|
smp_mb();
|
2016-05-11 13:21:50 +03:00
|
|
|
*last_tb = NULL;
|
|
|
|
break;
|
|
|
|
case TB_EXIT_ICOUNT_EXPIRED:
|
|
|
|
{
|
|
|
|
/* Instruction counter expired. */
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
abort();
|
|
|
|
#else
|
|
|
|
int insns_left = cpu->icount_decr.u32;
|
2017-01-29 14:00:59 +03:00
|
|
|
*last_tb = NULL;
|
2016-05-11 13:21:50 +03:00
|
|
|
if (cpu->icount_extra && insns_left >= 0) {
|
|
|
|
/* Refill decrementer and continue execution. */
|
|
|
|
cpu->icount_extra += insns_left;
|
|
|
|
insns_left = MIN(0xffff, cpu->icount_extra);
|
|
|
|
cpu->icount_extra -= insns_left;
|
|
|
|
cpu->icount_decr.u16.low = insns_left;
|
|
|
|
} else {
|
|
|
|
if (insns_left > 0) {
|
|
|
|
/* Execute remaining instructions. */
|
2017-01-29 14:00:59 +03:00
|
|
|
cpu_exec_nocache(cpu, insns_left, tb, false);
|
2016-05-11 13:21:50 +03:00
|
|
|
align_clocks(sc, cpu);
|
|
|
|
}
|
|
|
|
cpu->exception_index = EXCP_INTERRUPT;
|
|
|
|
cpu_loop_exit(cpu);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
default:
|
2017-01-29 14:00:59 +03:00
|
|
|
*last_tb = tb;
|
2016-05-11 13:21:50 +03:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2003-03-07 02:23:54 +03:00
|
|
|
/* main execution loop */
|
|
|
|
|
2015-06-18 20:24:55 +03:00
|
|
|
int cpu_exec(CPUState *cpu)
|
2003-03-07 02:23:54 +03:00
|
|
|
{
|
2013-02-02 13:57:51 +04:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2016-05-11 13:21:49 +03:00
|
|
|
int ret;
|
2014-07-25 13:56:31 +04:00
|
|
|
SyncClocks sc;
|
|
|
|
|
2015-09-17 19:24:16 +03:00
|
|
|
/* replay_interrupt may need current_cpu */
|
|
|
|
current_cpu = cpu;
|
|
|
|
|
2016-05-11 13:21:47 +03:00
|
|
|
if (cpu_handle_halt(cpu)) {
|
|
|
|
return EXCP_HALTED;
|
2011-03-12 19:43:56 +03:00
|
|
|
}
|
2005-11-24 00:02:53 +03:00
|
|
|
|
2015-01-21 14:09:14 +03:00
|
|
|
rcu_read_lock();
|
|
|
|
|
2014-09-13 20:45:12 +04:00
|
|
|
cc->cpu_exec_enter(cpu);
|
2003-05-10 17:13:54 +04:00
|
|
|
|
2014-07-25 13:56:31 +04:00
|
|
|
/* Calculate difference between guest clock and host clock.
|
|
|
|
* This delay includes the delay of the last cycle, so
|
|
|
|
* what we have to do is sleep until it is 0. As for the
|
|
|
|
* advance/delay we gain here, we try to fix it next time.
|
|
|
|
*/
|
|
|
|
init_delay_params(&sc, cpu);
|
|
|
|
|
2017-01-29 12:55:14 +03:00
|
|
|
/* prepare setjmp context for exception handling */
|
|
|
|
if (sigsetjmp(cpu->jmp_env, 0) != 0) {
|
2015-09-26 14:23:26 +03:00
|
|
|
#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
|
2017-01-29 12:55:14 +03:00
|
|
|
/* Some compilers wrongly smash all local variables after
|
|
|
|
* siglongjmp. There were bug reports for gcc 4.5.0 and clang.
|
|
|
|
* Reload essential local variables here for those compilers.
|
|
|
|
* Newer versions of gcc would complain about this code (-Wclobbered). */
|
|
|
|
cpu = current_cpu;
|
|
|
|
cc = CPU_GET_CLASS(cpu);
|
2015-09-26 14:23:26 +03:00
|
|
|
#else /* buggy compiler */
|
2017-01-29 12:55:14 +03:00
|
|
|
/* Assert that the compiler does not smash local variables. */
|
|
|
|
g_assert(cpu == current_cpu);
|
|
|
|
g_assert(cc == CPU_GET_CLASS(cpu));
|
2015-09-26 14:23:26 +03:00
|
|
|
#endif /* buggy compiler */
|
2017-01-29 12:55:14 +03:00
|
|
|
cpu->can_do_io = 1;
|
|
|
|
tb_lock_reset();
|
tcg: drop global lock during TCG code execution
This finally allows TCG to benefit from the iothread introduction: Drop
the global mutex while running pure TCG CPU code. Reacquire the lock
when entering MMIO or PIO emulation, or when leaving the TCG loop.
We have to revert a few optimization for the current TCG threading
model, namely kicking the TCG thread in qemu_mutex_lock_iothread and not
kicking it in qemu_cpu_kick. We also need to disable RAM block
reordering until we have a more efficient locking mechanism at hand.
Still, a Linux x86 UP guest and my Musicpal ARM model boot fine here.
These numbers demonstrate where we gain something:
20338 jan 20 0 331m 75m 6904 R 99 0.9 0:50.95 qemu-system-arm
20337 jan 20 0 331m 75m 6904 S 20 0.9 0:26.50 qemu-system-arm
The guest CPU was fully loaded, but the iothread could still run mostly
independent on a second core. Without the patch we don't get beyond
32206 jan 20 0 330m 73m 7036 R 82 0.9 1:06.00 qemu-system-arm
32204 jan 20 0 330m 73m 7036 S 21 0.9 0:17.03 qemu-system-arm
We don't benefit significantly, though, when the guest is not fully
loading a host CPU.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Message-Id: <1439220437-23957-10-git-send-email-fred.konrad@greensocs.com>
[FK: Rebase, fix qemu_devices_reset deadlock, rm address_space_* mutex]
Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com>
[EGC: fixed iothread lock for cpu-exec IRQ handling]
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: -smp single-threaded fix, clean commit msg, BQL fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Pranith Kumar <bobby.prani@gmail.com>
[PM: target-arm changes]
Acked-by: Peter Maydell <peter.maydell@linaro.org>
2017-02-23 21:29:11 +03:00
|
|
|
if (qemu_mutex_iothread_locked()) {
|
|
|
|
qemu_mutex_unlock_iothread();
|
|
|
|
}
|
2017-01-29 12:55:14 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* if an exception is pending, we execute it here */
|
|
|
|
while (!cpu_handle_exception(cpu, &ret)) {
|
|
|
|
TranslationBlock *last_tb = NULL;
|
|
|
|
int tb_exit = 0;
|
|
|
|
|
|
|
|
while (!cpu_handle_interrupt(cpu, &last_tb)) {
|
|
|
|
TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit);
|
|
|
|
cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
|
|
|
|
/* Try to align the host and virtual clocks
|
|
|
|
if the guest is in advance */
|
|
|
|
align_clocks(&sc, cpu);
|
2003-03-07 02:23:54 +03:00
|
|
|
}
|
2017-01-29 12:55:14 +03:00
|
|
|
}
|
2003-06-24 17:22:59 +04:00
|
|
|
|
2014-09-13 20:45:12 +04:00
|
|
|
cc->cpu_exec_exit(cpu);
|
2015-01-21 14:09:14 +03:00
|
|
|
rcu_read_unlock();
|
2007-02-04 16:37:44 +03:00
|
|
|
|
2003-03-07 02:23:54 +03:00
|
|
|
return ret;
|
|
|
|
}
|