2011-07-07 16:37:12 +04:00
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/*
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* Optimizations for Tiny Code Generator for QEMU
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*
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* Copyright (c) 2010 Samsung Electronics.
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* Contributed by Kirill Batuzov <batuzovk@ispras.ru>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2016-01-26 21:17:08 +03:00
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#include "qemu/osdep.h"
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2021-08-26 16:51:39 +03:00
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#include "qemu/int128.h"
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2023-08-24 09:04:24 +03:00
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#include "qemu/interval-tree.h"
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2023-03-29 04:17:24 +03:00
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#include "tcg/tcg-op-common.h"
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2021-03-18 19:21:45 +03:00
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#include "tcg-internal.h"
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2011-07-07 16:37:12 +04:00
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#define CASE_OP_32_64(x) \
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glue(glue(case INDEX_op_, x), _i32): \
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glue(glue(case INDEX_op_, x), _i64)
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2017-11-22 11:07:11 +03:00
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#define CASE_OP_32_64_VEC(x) \
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glue(glue(case INDEX_op_, x), _i32): \
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glue(glue(case INDEX_op_, x), _i64): \
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glue(glue(case INDEX_op_, x), _vec)
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2023-08-24 09:04:24 +03:00
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typedef struct MemCopyInfo {
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IntervalTreeNode itree;
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QSIMPLEQ_ENTRY (MemCopyInfo) next;
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TCGTemp *ts;
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TCGType type;
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} MemCopyInfo;
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2020-03-31 03:44:30 +03:00
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typedef struct TempOptInfo {
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2015-07-27 13:41:44 +03:00
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bool is_const;
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2017-06-20 23:43:15 +03:00
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TCGTemp *prev_copy;
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TCGTemp *next_copy;
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2023-08-24 09:04:24 +03:00
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QSIMPLEQ_HEAD(, MemCopyInfo) mem_copy;
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2020-09-07 02:21:32 +03:00
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uint64_t val;
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2021-08-23 23:07:49 +03:00
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uint64_t z_mask; /* mask bit is 0 if and only if value bit is 0 */
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2021-08-26 22:04:46 +03:00
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uint64_t s_mask; /* a left-aligned mask of clrsb(value) bits. */
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2020-03-31 03:44:30 +03:00
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} TempOptInfo;
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2011-07-07 16:37:13 +04:00
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2021-08-24 08:06:31 +03:00
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typedef struct OptContext {
|
2021-08-24 17:13:45 +03:00
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TCGContext *tcg;
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2021-08-24 17:38:39 +03:00
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TCGOp *prev_mb;
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2021-08-24 08:06:31 +03:00
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TCGTempSet temps_used;
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2021-08-24 18:49:25 +03:00
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2023-08-24 09:04:24 +03:00
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IntervalTreeRoot mem_copy;
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QSIMPLEQ_HEAD(, MemCopyInfo) mem_free;
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|
2021-08-24 18:49:25 +03:00
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/* In flight values from optimization. */
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2021-08-26 08:42:19 +03:00
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uint64_t a_mask; /* mask bit is 0 iff value identical to first input */
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uint64_t z_mask; /* mask bit is 0 iff value bit is 0 */
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2021-08-26 22:04:46 +03:00
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uint64_t s_mask; /* mask of clrsb(value) bits */
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2021-08-25 18:00:20 +03:00
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TCGType type;
|
2021-08-24 08:06:31 +03:00
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} OptContext;
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|
2021-08-26 22:04:46 +03:00
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/* Calculate the smask for a specific value. */
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static uint64_t smask_from_value(uint64_t value)
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{
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int rep = clrsb64(value);
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return ~(~0ull >> rep);
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}
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/*
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* Calculate the smask for a given set of known-zeros.
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* If there are lots of zeros on the left, we can consider the remainder
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* an unsigned field, and thus the corresponding signed field is one bit
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* larger.
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*/
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static uint64_t smask_from_zmask(uint64_t zmask)
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{
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/*
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* Only the 0 bits are significant for zmask, thus the msb itself
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* must be zero, else we have no sign information.
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*/
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int rep = clz64(zmask);
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if (rep == 0) {
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return 0;
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}
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rep -= 1;
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return ~(~0ull >> rep);
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}
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|
2021-08-26 23:24:59 +03:00
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/*
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* Recreate a properly left-aligned smask after manipulation.
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* Some bit-shuffling, particularly shifts and rotates, may
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* retain sign bits on the left, but may scatter disconnected
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* sign bits on the right. Retain only what remains to the left.
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*/
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static uint64_t smask_from_smask(int64_t smask)
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{
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/* Only the 1 bits are significant for smask */
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return smask_from_zmask(~smask);
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}
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|
2020-03-31 03:44:30 +03:00
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static inline TempOptInfo *ts_info(TCGTemp *ts)
|
2015-07-27 13:41:44 +03:00
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{
|
2017-06-20 23:43:15 +03:00
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return ts->state_ptr;
|
2015-07-27 13:41:44 +03:00
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}
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|
2020-03-31 03:44:30 +03:00
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static inline TempOptInfo *arg_info(TCGArg arg)
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2015-07-27 13:41:44 +03:00
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{
|
2017-06-20 23:43:15 +03:00
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return ts_info(arg_temp(arg));
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}
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static inline bool ts_is_const(TCGTemp *ts)
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{
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|
return ts_info(ts)->is_const;
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}
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static inline bool arg_is_const(TCGArg arg)
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{
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return ts_is_const(arg_temp(arg));
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}
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static inline bool ts_is_copy(TCGTemp *ts)
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{
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return ts_info(ts)->next_copy != ts;
|
2015-07-27 13:41:44 +03:00
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}
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|
2023-11-02 23:37:46 +03:00
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static TCGTemp *cmp_better_copy(TCGTemp *a, TCGTemp *b)
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|
{
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return a->kind < b->kind ? b : a;
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}
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|
2015-07-27 13:41:44 +03:00
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/* Initialize and activate a temporary. */
|
2021-08-24 08:06:31 +03:00
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static void init_ts_info(OptContext *ctx, TCGTemp *ts)
|
2015-07-27 13:41:44 +03:00
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{
|
2017-06-20 23:43:15 +03:00
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size_t idx = temp_idx(ts);
|
2020-03-31 05:52:02 +03:00
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TempOptInfo *ti;
|
2017-06-20 23:43:15 +03:00
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|
2021-08-24 08:06:31 +03:00
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if (test_bit(idx, ctx->temps_used.l)) {
|
2020-03-31 05:52:02 +03:00
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|
return;
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|
}
|
2021-08-24 08:06:31 +03:00
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set_bit(idx, ctx->temps_used.l);
|
2020-03-31 05:52:02 +03:00
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ti = ts->state_ptr;
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if (ti == NULL) {
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ti = tcg_malloc(sizeof(TempOptInfo));
|
2017-06-20 23:43:15 +03:00
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ts->state_ptr = ti;
|
2020-03-31 05:52:02 +03:00
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}
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ti->next_copy = ts;
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ti->prev_copy = ts;
|
2023-08-24 09:04:24 +03:00
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QSIMPLEQ_INIT(&ti->mem_copy);
|
2020-03-31 05:52:02 +03:00
|
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|
if (ts->kind == TEMP_CONST) {
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ti->is_const = true;
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ti->val = ts->val;
|
2021-08-23 23:07:49 +03:00
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ti->z_mask = ts->val;
|
2021-08-26 22:04:46 +03:00
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ti->s_mask = smask_from_value(ts->val);
|
2020-03-31 05:52:02 +03:00
|
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|
} else {
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ti->is_const = false;
|
2021-08-23 23:07:49 +03:00
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ti->z_mask = -1;
|
2021-08-26 22:04:46 +03:00
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ti->s_mask = 0;
|
2015-07-27 13:41:44 +03:00
|
|
|
}
|
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|
|
}
|
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|
2023-08-24 09:04:24 +03:00
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static MemCopyInfo *mem_copy_first(OptContext *ctx, intptr_t s, intptr_t l)
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|
|
|
{
|
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|
|
IntervalTreeNode *r = interval_tree_iter_first(&ctx->mem_copy, s, l);
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|
return r ? container_of(r, MemCopyInfo, itree) : NULL;
|
|
|
|
}
|
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|
static MemCopyInfo *mem_copy_next(MemCopyInfo *mem, intptr_t s, intptr_t l)
|
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|
|
{
|
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|
|
IntervalTreeNode *r = interval_tree_iter_next(&mem->itree, s, l);
|
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|
return r ? container_of(r, MemCopyInfo, itree) : NULL;
|
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|
|
}
|
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|
|
static void remove_mem_copy(OptContext *ctx, MemCopyInfo *mc)
|
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|
|
{
|
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|
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TCGTemp *ts = mc->ts;
|
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|
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TempOptInfo *ti = ts_info(ts);
|
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|
|
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|
interval_tree_remove(&mc->itree, &ctx->mem_copy);
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QSIMPLEQ_REMOVE(&ti->mem_copy, mc, MemCopyInfo, next);
|
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|
QSIMPLEQ_INSERT_TAIL(&ctx->mem_free, mc, next);
|
|
|
|
}
|
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|
|
|
|
|
|
static void remove_mem_copy_in(OptContext *ctx, intptr_t s, intptr_t l)
|
|
|
|
{
|
|
|
|
while (true) {
|
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|
|
MemCopyInfo *mc = mem_copy_first(ctx, s, l);
|
|
|
|
if (!mc) {
|
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|
|
break;
|
|
|
|
}
|
|
|
|
remove_mem_copy(ctx, mc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void remove_mem_copy_all(OptContext *ctx)
|
|
|
|
{
|
|
|
|
remove_mem_copy_in(ctx, 0, -1);
|
|
|
|
tcg_debug_assert(interval_tree_is_empty(&ctx->mem_copy));
|
|
|
|
}
|
|
|
|
|
2023-11-02 23:37:46 +03:00
|
|
|
static TCGTemp *find_better_copy(TCGTemp *ts)
|
2012-09-11 14:31:21 +04:00
|
|
|
{
|
2023-11-02 23:37:46 +03:00
|
|
|
TCGTemp *i, *ret;
|
2012-09-11 14:31:21 +04:00
|
|
|
|
2020-04-23 19:02:23 +03:00
|
|
|
/* If this is already readonly, we can't do better. */
|
|
|
|
if (temp_readonly(ts)) {
|
2017-06-20 23:43:15 +03:00
|
|
|
return ts;
|
2012-09-11 14:31:21 +04:00
|
|
|
}
|
|
|
|
|
2023-11-02 23:37:46 +03:00
|
|
|
ret = ts;
|
2017-06-20 23:43:15 +03:00
|
|
|
for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
|
2023-11-02 23:37:46 +03:00
|
|
|
ret = cmp_better_copy(ret, i);
|
2012-09-11 14:31:21 +04:00
|
|
|
}
|
2023-11-02 23:37:46 +03:00
|
|
|
return ret;
|
2012-09-11 14:31:21 +04:00
|
|
|
}
|
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
static void move_mem_copies(TCGTemp *dst_ts, TCGTemp *src_ts)
|
|
|
|
{
|
|
|
|
TempOptInfo *si = ts_info(src_ts);
|
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|
|
TempOptInfo *di = ts_info(dst_ts);
|
|
|
|
MemCopyInfo *mc;
|
|
|
|
|
|
|
|
QSIMPLEQ_FOREACH(mc, &si->mem_copy, next) {
|
|
|
|
tcg_debug_assert(mc->ts == src_ts);
|
|
|
|
mc->ts = dst_ts;
|
|
|
|
}
|
|
|
|
QSIMPLEQ_CONCAT(&di->mem_copy, &si->mem_copy);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Reset TEMP's state, possibly removing the temp for the list of copies. */
|
|
|
|
static void reset_ts(OptContext *ctx, TCGTemp *ts)
|
|
|
|
{
|
|
|
|
TempOptInfo *ti = ts_info(ts);
|
|
|
|
TCGTemp *pts = ti->prev_copy;
|
|
|
|
TCGTemp *nts = ti->next_copy;
|
|
|
|
TempOptInfo *pi = ts_info(pts);
|
|
|
|
TempOptInfo *ni = ts_info(nts);
|
|
|
|
|
|
|
|
ni->prev_copy = ti->prev_copy;
|
|
|
|
pi->next_copy = ti->next_copy;
|
|
|
|
ti->next_copy = ts;
|
|
|
|
ti->prev_copy = ts;
|
|
|
|
ti->is_const = false;
|
|
|
|
ti->z_mask = -1;
|
|
|
|
ti->s_mask = 0;
|
|
|
|
|
|
|
|
if (!QSIMPLEQ_EMPTY(&ti->mem_copy)) {
|
|
|
|
if (ts == nts) {
|
|
|
|
/* Last temp copy being removed, the mem copies die. */
|
|
|
|
MemCopyInfo *mc;
|
|
|
|
QSIMPLEQ_FOREACH(mc, &ti->mem_copy, next) {
|
|
|
|
interval_tree_remove(&mc->itree, &ctx->mem_copy);
|
|
|
|
}
|
|
|
|
QSIMPLEQ_CONCAT(&ctx->mem_free, &ti->mem_copy);
|
|
|
|
} else {
|
|
|
|
move_mem_copies(find_better_copy(nts), ts);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void reset_temp(OptContext *ctx, TCGArg arg)
|
|
|
|
{
|
|
|
|
reset_ts(ctx, arg_temp(arg));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void record_mem_copy(OptContext *ctx, TCGType type,
|
|
|
|
TCGTemp *ts, intptr_t start, intptr_t last)
|
|
|
|
{
|
|
|
|
MemCopyInfo *mc;
|
|
|
|
TempOptInfo *ti;
|
|
|
|
|
|
|
|
mc = QSIMPLEQ_FIRST(&ctx->mem_free);
|
|
|
|
if (mc) {
|
|
|
|
QSIMPLEQ_REMOVE_HEAD(&ctx->mem_free, next);
|
|
|
|
} else {
|
|
|
|
mc = tcg_malloc(sizeof(*mc));
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(mc, 0, sizeof(*mc));
|
|
|
|
mc->itree.start = start;
|
|
|
|
mc->itree.last = last;
|
|
|
|
mc->type = type;
|
|
|
|
interval_tree_insert(&mc->itree, &ctx->mem_copy);
|
|
|
|
|
|
|
|
ts = find_better_copy(ts);
|
|
|
|
ti = ts_info(ts);
|
|
|
|
mc->ts = ts;
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&ti->mem_copy, mc, next);
|
|
|
|
}
|
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
|
2012-09-11 14:31:21 +04:00
|
|
|
{
|
2017-06-20 23:43:15 +03:00
|
|
|
TCGTemp *i;
|
2012-09-11 14:31:21 +04:00
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
if (ts1 == ts2) {
|
2012-09-11 14:31:21 +04:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
|
2012-09-11 14:31:21 +04:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
|
|
|
|
if (i == ts2) {
|
2012-09-11 14:31:21 +04:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
static bool args_are_copies(TCGArg arg1, TCGArg arg2)
|
|
|
|
{
|
|
|
|
return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
|
|
|
|
}
|
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
static TCGTemp *find_mem_copy_for(OptContext *ctx, TCGType type, intptr_t s)
|
|
|
|
{
|
|
|
|
MemCopyInfo *mc;
|
|
|
|
|
|
|
|
for (mc = mem_copy_first(ctx, s, s); mc; mc = mem_copy_next(mc, s, s)) {
|
|
|
|
if (mc->itree.start == s && mc->type == type) {
|
|
|
|
return find_better_copy(mc->ts);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2023-10-23 22:31:57 +03:00
|
|
|
static TCGArg arg_new_constant(OptContext *ctx, uint64_t val)
|
|
|
|
{
|
|
|
|
TCGType type = ctx->type;
|
|
|
|
TCGTemp *ts;
|
|
|
|
|
|
|
|
if (type == TCG_TYPE_I32) {
|
|
|
|
val = (int32_t)val;
|
|
|
|
}
|
|
|
|
|
|
|
|
ts = tcg_constant_internal(type, val);
|
|
|
|
init_ts_info(ctx, ts);
|
|
|
|
|
|
|
|
return temp_arg(ts);
|
|
|
|
}
|
|
|
|
|
2021-08-24 20:57:56 +03:00
|
|
|
static bool tcg_opt_gen_mov(OptContext *ctx, TCGOp *op, TCGArg dst, TCGArg src)
|
2011-07-07 16:37:13 +04:00
|
|
|
{
|
2017-06-20 23:43:15 +03:00
|
|
|
TCGTemp *dst_ts = arg_temp(dst);
|
|
|
|
TCGTemp *src_ts = arg_temp(src);
|
2020-03-31 03:44:30 +03:00
|
|
|
TempOptInfo *di;
|
|
|
|
TempOptInfo *si;
|
2017-06-20 23:43:15 +03:00
|
|
|
TCGOpcode new_op;
|
|
|
|
|
|
|
|
if (ts_are_copies(dst_ts, src_ts)) {
|
2021-08-24 17:13:45 +03:00
|
|
|
tcg_op_remove(ctx->tcg, op);
|
2021-08-24 20:57:56 +03:00
|
|
|
return true;
|
2015-06-04 22:53:25 +03:00
|
|
|
}
|
|
|
|
|
2023-01-10 00:59:35 +03:00
|
|
|
reset_ts(ctx, dst_ts);
|
2017-06-20 23:43:15 +03:00
|
|
|
di = ts_info(dst_ts);
|
|
|
|
si = ts_info(src_ts);
|
2021-08-25 18:00:20 +03:00
|
|
|
|
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
2017-11-22 11:07:11 +03:00
|
|
|
new_op = INDEX_op_mov_i32;
|
2021-08-25 18:00:20 +03:00
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
new_op = INDEX_op_mov_i64;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_V64:
|
|
|
|
case TCG_TYPE_V128:
|
|
|
|
case TCG_TYPE_V256:
|
|
|
|
/* TCGOP_VECL and TCGOP_VECE remain unchanged. */
|
|
|
|
new_op = INDEX_op_mov_vec;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
2017-11-22 11:07:11 +03:00
|
|
|
}
|
2014-09-20 00:49:15 +04:00
|
|
|
op->opc = new_op;
|
2017-06-20 23:43:15 +03:00
|
|
|
op->args[0] = dst;
|
|
|
|
op->args[1] = src;
|
2014-05-22 21:59:12 +04:00
|
|
|
|
2021-08-26 19:03:59 +03:00
|
|
|
di->z_mask = si->z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
di->s_mask = si->s_mask;
|
2012-09-11 14:31:21 +04:00
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
if (src_ts->type == dst_ts->type) {
|
2020-03-31 03:44:30 +03:00
|
|
|
TempOptInfo *ni = ts_info(si->next_copy);
|
2017-06-20 23:43:15 +03:00
|
|
|
|
|
|
|
di->next_copy = si->next_copy;
|
|
|
|
di->prev_copy = src_ts;
|
|
|
|
ni->prev_copy = dst_ts;
|
|
|
|
si->next_copy = dst_ts;
|
|
|
|
di->is_const = si->is_const;
|
|
|
|
di->val = si->val;
|
2023-08-24 09:04:24 +03:00
|
|
|
|
|
|
|
if (!QSIMPLEQ_EMPTY(&si->mem_copy)
|
|
|
|
&& cmp_better_copy(src_ts, dst_ts) == dst_ts) {
|
|
|
|
move_mem_copies(dst_ts, src_ts);
|
|
|
|
}
|
2017-06-20 23:43:15 +03:00
|
|
|
}
|
2021-08-24 20:57:56 +03:00
|
|
|
return true;
|
2011-07-07 16:37:13 +04:00
|
|
|
}
|
|
|
|
|
2021-08-24 20:57:56 +03:00
|
|
|
static bool tcg_opt_gen_movi(OptContext *ctx, TCGOp *op,
|
2021-08-24 17:13:45 +03:00
|
|
|
TCGArg dst, uint64_t val)
|
2020-03-31 06:42:43 +03:00
|
|
|
{
|
2021-08-26 19:03:59 +03:00
|
|
|
/* Convert movi to mov with constant temp. */
|
2023-10-23 22:31:57 +03:00
|
|
|
return tcg_opt_gen_mov(ctx, op, dst, arg_new_constant(ctx, val));
|
2020-03-31 06:42:43 +03:00
|
|
|
}
|
|
|
|
|
2020-09-07 02:21:32 +03:00
|
|
|
static uint64_t do_constant_folding_2(TCGOpcode op, uint64_t x, uint64_t y)
|
2011-07-07 16:37:14 +04:00
|
|
|
{
|
2013-08-15 01:35:56 +04:00
|
|
|
uint64_t l64, h64;
|
|
|
|
|
2011-07-07 16:37:14 +04:00
|
|
|
switch (op) {
|
|
|
|
CASE_OP_32_64(add):
|
|
|
|
return x + y;
|
|
|
|
|
|
|
|
CASE_OP_32_64(sub):
|
|
|
|
return x - y;
|
|
|
|
|
|
|
|
CASE_OP_32_64(mul):
|
|
|
|
return x * y;
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(and):
|
2011-07-07 16:37:15 +04:00
|
|
|
return x & y;
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(or):
|
2011-07-07 16:37:15 +04:00
|
|
|
return x | y;
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(xor):
|
2011-07-07 16:37:15 +04:00
|
|
|
return x ^ y;
|
|
|
|
|
2011-07-07 16:37:16 +04:00
|
|
|
case INDEX_op_shl_i32:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (uint32_t)x << (y & 31);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_shl_i64:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (uint64_t)x << (y & 63);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_shr_i32:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (uint32_t)x >> (y & 31);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_shr_i64:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (uint64_t)x >> (y & 63);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_sar_i32:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (int32_t)x >> (y & 31);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_sar_i64:
|
2014-03-18 18:45:39 +04:00
|
|
|
return (int64_t)x >> (y & 63);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_rotr_i32:
|
2014-03-18 18:45:39 +04:00
|
|
|
return ror32(x, y & 31);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_rotr_i64:
|
2014-03-18 18:45:39 +04:00
|
|
|
return ror64(x, y & 63);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_rotl_i32:
|
2014-03-18 18:45:39 +04:00
|
|
|
return rol32(x, y & 31);
|
2011-07-07 16:37:16 +04:00
|
|
|
|
|
|
|
case INDEX_op_rotl_i64:
|
2014-03-18 18:45:39 +04:00
|
|
|
return rol64(x, y & 63);
|
2011-08-18 01:11:46 +04:00
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(not):
|
2011-07-07 16:37:17 +04:00
|
|
|
return ~x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
2011-08-18 01:11:47 +04:00
|
|
|
CASE_OP_32_64(neg):
|
|
|
|
return -x;
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(andc):
|
2011-08-18 01:11:47 +04:00
|
|
|
return x & ~y;
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64_VEC(orc):
|
2011-08-18 01:11:47 +04:00
|
|
|
return x | ~y;
|
|
|
|
|
2021-12-16 22:17:46 +03:00
|
|
|
CASE_OP_32_64_VEC(eqv):
|
2011-08-18 01:11:47 +04:00
|
|
|
return ~(x ^ y);
|
|
|
|
|
2021-12-16 22:17:46 +03:00
|
|
|
CASE_OP_32_64_VEC(nand):
|
2011-08-18 01:11:47 +04:00
|
|
|
return ~(x & y);
|
|
|
|
|
2021-12-16 22:17:46 +03:00
|
|
|
CASE_OP_32_64_VEC(nor):
|
2011-08-18 01:11:47 +04:00
|
|
|
return ~(x | y);
|
|
|
|
|
2016-11-16 11:23:28 +03:00
|
|
|
case INDEX_op_clz_i32:
|
|
|
|
return (uint32_t)x ? clz32(x) : y;
|
|
|
|
|
|
|
|
case INDEX_op_clz_i64:
|
|
|
|
return x ? clz64(x) : y;
|
|
|
|
|
|
|
|
case INDEX_op_ctz_i32:
|
|
|
|
return (uint32_t)x ? ctz32(x) : y;
|
|
|
|
|
|
|
|
case INDEX_op_ctz_i64:
|
|
|
|
return x ? ctz64(x) : y;
|
|
|
|
|
2016-11-21 13:13:39 +03:00
|
|
|
case INDEX_op_ctpop_i32:
|
|
|
|
return ctpop32(x);
|
|
|
|
|
|
|
|
case INDEX_op_ctpop_i64:
|
|
|
|
return ctpop64(x);
|
|
|
|
|
2011-08-18 01:11:46 +04:00
|
|
|
CASE_OP_32_64(ext8s):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (int8_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext16s):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (int16_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext8u):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (uint8_t)x;
|
2011-08-18 01:11:46 +04:00
|
|
|
|
|
|
|
CASE_OP_32_64(ext16u):
|
2011-07-07 16:37:17 +04:00
|
|
|
return (uint16_t)x;
|
|
|
|
|
2018-11-20 10:53:34 +03:00
|
|
|
CASE_OP_32_64(bswap16):
|
2021-06-13 23:04:00 +03:00
|
|
|
x = bswap16(x);
|
|
|
|
return y & TCG_BSWAP_OS ? (int16_t)x : x;
|
2018-11-20 10:53:34 +03:00
|
|
|
|
|
|
|
CASE_OP_32_64(bswap32):
|
2021-06-13 23:04:00 +03:00
|
|
|
x = bswap32(x);
|
|
|
|
return y & TCG_BSWAP_OS ? (int32_t)x : x;
|
2018-11-20 10:53:34 +03:00
|
|
|
|
|
|
|
case INDEX_op_bswap64_i64:
|
|
|
|
return bswap64(x);
|
|
|
|
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_ext_i32_i64:
|
2011-07-07 16:37:17 +04:00
|
|
|
case INDEX_op_ext32s_i64:
|
|
|
|
return (int32_t)x;
|
|
|
|
|
2015-07-27 13:41:45 +03:00
|
|
|
case INDEX_op_extu_i32_i64:
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrl_i64_i32:
|
2011-07-07 16:37:17 +04:00
|
|
|
case INDEX_op_ext32u_i64:
|
|
|
|
return (uint32_t)x;
|
|
|
|
|
2015-07-24 17:16:00 +03:00
|
|
|
case INDEX_op_extrh_i64_i32:
|
|
|
|
return (uint64_t)x >> 32;
|
|
|
|
|
2013-08-15 01:35:56 +04:00
|
|
|
case INDEX_op_muluh_i32:
|
|
|
|
return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
|
|
|
|
case INDEX_op_mulsh_i32:
|
|
|
|
return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
|
|
|
|
|
|
|
|
case INDEX_op_muluh_i64:
|
|
|
|
mulu64(&l64, &h64, x, y);
|
|
|
|
return h64;
|
|
|
|
case INDEX_op_mulsh_i64:
|
|
|
|
muls64(&l64, &h64, x, y);
|
|
|
|
return h64;
|
|
|
|
|
2013-08-15 02:22:46 +04:00
|
|
|
case INDEX_op_div_i32:
|
|
|
|
/* Avoid crashing on divide by zero, otherwise undefined. */
|
|
|
|
return (int32_t)x / ((int32_t)y ? : 1);
|
|
|
|
case INDEX_op_divu_i32:
|
|
|
|
return (uint32_t)x / ((uint32_t)y ? : 1);
|
|
|
|
case INDEX_op_div_i64:
|
|
|
|
return (int64_t)x / ((int64_t)y ? : 1);
|
|
|
|
case INDEX_op_divu_i64:
|
|
|
|
return (uint64_t)x / ((uint64_t)y ? : 1);
|
|
|
|
|
|
|
|
case INDEX_op_rem_i32:
|
|
|
|
return (int32_t)x % ((int32_t)y ? : 1);
|
|
|
|
case INDEX_op_remu_i32:
|
|
|
|
return (uint32_t)x % ((uint32_t)y ? : 1);
|
|
|
|
case INDEX_op_rem_i64:
|
|
|
|
return (int64_t)x % ((int64_t)y ? : 1);
|
|
|
|
case INDEX_op_remu_i64:
|
|
|
|
return (uint64_t)x % ((uint64_t)y ? : 1);
|
|
|
|
|
2011-07-07 16:37:14 +04:00
|
|
|
default:
|
2023-04-05 22:09:14 +03:00
|
|
|
g_assert_not_reached();
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
static uint64_t do_constant_folding(TCGOpcode op, TCGType type,
|
|
|
|
uint64_t x, uint64_t y)
|
2011-07-07 16:37:14 +04:00
|
|
|
{
|
2020-09-07 02:21:32 +03:00
|
|
|
uint64_t res = do_constant_folding_2(op, x, y);
|
2021-08-25 18:00:20 +03:00
|
|
|
if (type == TCG_TYPE_I32) {
|
tcg/optimize: fix constant signedness
By convention, on a 64-bit host TCG internally stores 32-bit constants
as sign-extended. This is not the case in the optimizer when a 32-bit
constant is folded.
This doesn't seem to have more consequences than suboptimal code
generation. For instance the x86 backend assumes sign-extended constants,
and in some rare cases uses a 32-bit unsigned immediate 0xffffffff
instead of a 8-bit signed immediate 0xff for the constant -1. This is
with a ppc guest:
before
------
---- 0x9f29cc
movi_i32 tmp1,$0xffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7fd8c7dfe90c: xor %ebp,%ebp
0x7fd8c7dfe90e: mov %ebp,%r11d
0x7fd8c7dfe911: mov 0x18(%r14),%r9d
0x7fd8c7dfe915: add %r9d,%r10d
0x7fd8c7dfe918: adc %ebp,%r11d
0x7fd8c7dfe91b: add $0xffffffff,%r10d
0x7fd8c7dfe922: adc %ebp,%r11d
0x7fd8c7dfe925: mov %r11d,0x134(%r14)
0x7fd8c7dfe92c: mov %r10d,0x28(%r14)
after
-----
---- 0x9f29cc
movi_i32 tmp1,$0xffffffffffffffff
movi_i32 tmp2,$0x0
add2_i32 tmp0,CA,CA,tmp2,r6,tmp2
add2_i32 tmp0,CA,tmp0,CA,tmp1,tmp2
mov_i32 r10,tmp0
0x7f37010d490c: xor %ebp,%ebp
0x7f37010d490e: mov %ebp,%r11d
0x7f37010d4911: mov 0x18(%r14),%r9d
0x7f37010d4915: add %r9d,%r10d
0x7f37010d4918: adc %ebp,%r11d
0x7f37010d491b: add $0xffffffffffffffff,%r10d
0x7f37010d491f: adc %ebp,%r11d
0x7f37010d4922: mov %r11d,0x134(%r14)
0x7f37010d4929: mov %r10d,0x28(%r14)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Message-Id: <1436544211-2769-2-git-send-email-aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-07-10 19:03:31 +03:00
|
|
|
res = (int32_t)res;
|
2011-07-07 16:37:14 +04:00
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2012-10-02 22:32:26 +04:00
|
|
|
static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return x == y;
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return x != y;
|
|
|
|
case TCG_COND_LT:
|
|
|
|
return (int32_t)x < (int32_t)y;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
return (int32_t)x >= (int32_t)y;
|
|
|
|
case TCG_COND_LE:
|
|
|
|
return (int32_t)x <= (int32_t)y;
|
|
|
|
case TCG_COND_GT:
|
|
|
|
return (int32_t)x > (int32_t)y;
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return x < y;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return x >= y;
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
return x <= y;
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
return x > y;
|
|
|
|
default:
|
2023-04-05 22:09:14 +03:00
|
|
|
g_assert_not_reached();
|
2012-10-02 22:32:26 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return x == y;
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return x != y;
|
|
|
|
case TCG_COND_LT:
|
|
|
|
return (int64_t)x < (int64_t)y;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
return (int64_t)x >= (int64_t)y;
|
|
|
|
case TCG_COND_LE:
|
|
|
|
return (int64_t)x <= (int64_t)y;
|
|
|
|
case TCG_COND_GT:
|
|
|
|
return (int64_t)x > (int64_t)y;
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return x < y;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return x >= y;
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
return x <= y;
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
return x > y;
|
|
|
|
default:
|
2023-04-05 22:09:14 +03:00
|
|
|
g_assert_not_reached();
|
2012-10-02 22:32:26 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool do_constant_folding_cond_eq(TCGCond c)
|
|
|
|
{
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_GT:
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
case TCG_COND_LT:
|
|
|
|
case TCG_COND_GTU:
|
|
|
|
case TCG_COND_NE:
|
|
|
|
return 0;
|
|
|
|
case TCG_COND_GE:
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
case TCG_COND_LE:
|
|
|
|
case TCG_COND_LEU:
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
return 1;
|
|
|
|
default:
|
2023-04-05 22:09:14 +03:00
|
|
|
g_assert_not_reached();
|
2012-10-02 22:32:26 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-24 18:34:27 +03:00
|
|
|
/*
|
|
|
|
* Return -1 if the condition can't be simplified,
|
|
|
|
* and the result of the condition (0 or 1) if it can.
|
|
|
|
*/
|
2021-08-25 18:00:20 +03:00
|
|
|
static int do_constant_folding_cond(TCGType type, TCGArg x,
|
2021-08-24 18:34:27 +03:00
|
|
|
TCGArg y, TCGCond c)
|
2012-09-06 18:47:14 +04:00
|
|
|
{
|
2017-06-20 23:43:15 +03:00
|
|
|
if (arg_is_const(x) && arg_is_const(y)) {
|
2022-02-09 14:21:42 +03:00
|
|
|
uint64_t xv = arg_info(x)->val;
|
|
|
|
uint64_t yv = arg_info(y)->val;
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
switch (type) {
|
|
|
|
case TCG_TYPE_I32:
|
2017-11-22 11:07:11 +03:00
|
|
|
return do_constant_folding_cond_32(xv, yv, c);
|
2021-08-25 18:00:20 +03:00
|
|
|
case TCG_TYPE_I64:
|
|
|
|
return do_constant_folding_cond_64(xv, yv, c);
|
|
|
|
default:
|
|
|
|
/* Only scalar comparisons are optimizable */
|
|
|
|
return -1;
|
2012-09-18 21:37:00 +04:00
|
|
|
}
|
2017-06-20 23:43:15 +03:00
|
|
|
} else if (args_are_copies(x, y)) {
|
2012-10-02 22:32:26 +04:00
|
|
|
return do_constant_folding_cond_eq(c);
|
2022-02-09 14:21:42 +03:00
|
|
|
} else if (arg_is_const(y) && arg_info(y)->val == 0) {
|
2012-09-18 21:37:00 +04:00
|
|
|
switch (c) {
|
2012-09-06 18:47:14 +04:00
|
|
|
case TCG_COND_LTU:
|
2012-09-18 21:37:00 +04:00
|
|
|
return 0;
|
2012-09-06 18:47:14 +04:00
|
|
|
case TCG_COND_GEU:
|
2012-09-18 21:37:00 +04:00
|
|
|
return 1;
|
|
|
|
default:
|
2021-08-24 18:34:27 +03:00
|
|
|
return -1;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
|
|
|
}
|
2021-08-24 18:34:27 +03:00
|
|
|
return -1;
|
2012-09-06 18:47:14 +04:00
|
|
|
}
|
|
|
|
|
2021-08-24 18:34:27 +03:00
|
|
|
/*
|
|
|
|
* Return -1 if the condition can't be simplified,
|
|
|
|
* and the result of the condition (0 or 1) if it can.
|
|
|
|
*/
|
|
|
|
static int do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
|
2012-10-02 22:32:27 +04:00
|
|
|
{
|
|
|
|
TCGArg al = p1[0], ah = p1[1];
|
|
|
|
TCGArg bl = p2[0], bh = p2[1];
|
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
if (arg_is_const(bl) && arg_is_const(bh)) {
|
|
|
|
tcg_target_ulong blv = arg_info(bl)->val;
|
|
|
|
tcg_target_ulong bhv = arg_info(bh)->val;
|
|
|
|
uint64_t b = deposit64(blv, 32, 32, bhv);
|
2012-10-02 22:32:27 +04:00
|
|
|
|
2017-06-20 23:43:15 +03:00
|
|
|
if (arg_is_const(al) && arg_is_const(ah)) {
|
|
|
|
tcg_target_ulong alv = arg_info(al)->val;
|
|
|
|
tcg_target_ulong ahv = arg_info(ah)->val;
|
|
|
|
uint64_t a = deposit64(alv, 32, 32, ahv);
|
2012-10-02 22:32:27 +04:00
|
|
|
return do_constant_folding_cond_64(a, b, c);
|
|
|
|
}
|
|
|
|
if (b == 0) {
|
|
|
|
switch (c) {
|
|
|
|
case TCG_COND_LTU:
|
|
|
|
return 0;
|
|
|
|
case TCG_COND_GEU:
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2017-06-20 23:43:15 +03:00
|
|
|
if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
|
2012-10-02 22:32:27 +04:00
|
|
|
return do_constant_folding_cond_eq(c);
|
|
|
|
}
|
2021-08-24 18:34:27 +03:00
|
|
|
return -1;
|
2012-10-02 22:32:27 +04:00
|
|
|
}
|
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
/**
|
|
|
|
* swap_commutative:
|
|
|
|
* @dest: TCGArg of the destination argument, or NO_DEST.
|
|
|
|
* @p1: first paired argument
|
|
|
|
* @p2: second paired argument
|
|
|
|
*
|
|
|
|
* If *@p1 is a constant and *@p2 is not, swap.
|
|
|
|
* If *@p2 matches @dest, swap.
|
|
|
|
* Return true if a swap was performed.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define NO_DEST temp_arg(NULL)
|
|
|
|
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
|
|
|
|
{
|
|
|
|
TCGArg a1 = *p1, a2 = *p2;
|
|
|
|
int sum = 0;
|
2017-06-20 23:43:15 +03:00
|
|
|
sum += arg_is_const(a1);
|
|
|
|
sum -= arg_is_const(a2);
|
tcg: Split out swap_commutative as a subroutine
Reduces code duplication and prefers
movcond d, c1, c2, const, s
to
movcond d, c1, c2, s, const
It also prefers
add r, r, c
over
add r, c, r
when both inputs are known constants. This doesn't matter for true add, as
we will fully constant fold that. But it matters for a follow-on patch using
this routine for add2 which may not be fully foldable.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-02 22:32:21 +04:00
|
|
|
|
|
|
|
/* Prefer the constant in second argument, and then the form
|
|
|
|
op a, a, b, which is better handled on non-RISC hosts. */
|
|
|
|
if (sum > 0 || (sum == 0 && dest == a2)) {
|
|
|
|
*p1 = a2;
|
|
|
|
*p2 = a1;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2012-10-02 22:32:23 +04:00
|
|
|
static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
|
|
|
|
{
|
|
|
|
int sum = 0;
|
2017-06-20 23:43:15 +03:00
|
|
|
sum += arg_is_const(p1[0]);
|
|
|
|
sum += arg_is_const(p1[1]);
|
|
|
|
sum -= arg_is_const(p2[0]);
|
|
|
|
sum -= arg_is_const(p2[1]);
|
2012-10-02 22:32:23 +04:00
|
|
|
if (sum > 0) {
|
|
|
|
TCGArg t;
|
|
|
|
t = p1[0], p1[0] = p2[0], p2[0] = t;
|
|
|
|
t = p1[1], p1[1] = p2[1], p2[1] = t;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 18:00:48 +03:00
|
|
|
static void init_arguments(OptContext *ctx, TCGOp *op, int nb_args)
|
|
|
|
{
|
|
|
|
for (int i = 0; i < nb_args; i++) {
|
|
|
|
TCGTemp *ts = arg_temp(op->args[i]);
|
2022-11-11 03:09:37 +03:00
|
|
|
init_ts_info(ctx, ts);
|
2021-08-24 18:00:48 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-24 18:04:47 +03:00
|
|
|
static void copy_propagate(OptContext *ctx, TCGOp *op,
|
|
|
|
int nb_oargs, int nb_iargs)
|
|
|
|
{
|
|
|
|
for (int i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
|
|
|
|
TCGTemp *ts = arg_temp(op->args[i]);
|
2022-11-11 03:09:37 +03:00
|
|
|
if (ts_is_copy(ts)) {
|
2023-11-02 23:37:46 +03:00
|
|
|
op->args[i] = temp_arg(find_better_copy(ts));
|
2021-08-24 18:04:47 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-24 18:49:25 +03:00
|
|
|
static void finish_folding(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
const TCGOpDef *def = &tcg_op_defs[op->opc];
|
|
|
|
int i, nb_oargs;
|
|
|
|
|
|
|
|
/*
|
2023-10-17 05:10:42 +03:00
|
|
|
* We only optimize extended basic blocks. If the opcode ends a BB
|
|
|
|
* and is not a conditional branch, reset all temp data.
|
2021-08-24 18:49:25 +03:00
|
|
|
*/
|
|
|
|
if (def->flags & TCG_OPF_BB_END) {
|
|
|
|
ctx->prev_mb = NULL;
|
2023-10-17 05:10:42 +03:00
|
|
|
if (!(def->flags & TCG_OPF_COND_BRANCH)) {
|
|
|
|
memset(&ctx->temps_used, 0, sizeof(ctx->temps_used));
|
2023-08-24 09:04:24 +03:00
|
|
|
remove_mem_copy_all(ctx);
|
2023-10-17 05:10:42 +03:00
|
|
|
}
|
2021-08-24 18:49:25 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
nb_oargs = def->nb_oargs;
|
|
|
|
for (i = 0; i < nb_oargs; i++) {
|
2021-08-26 22:04:46 +03:00
|
|
|
TCGTemp *ts = arg_temp(op->args[i]);
|
2023-01-10 00:59:35 +03:00
|
|
|
reset_ts(ctx, ts);
|
2021-08-24 18:49:25 +03:00
|
|
|
/*
|
2021-08-26 22:04:46 +03:00
|
|
|
* Save the corresponding known-zero/sign bits mask for the
|
2021-08-24 18:49:25 +03:00
|
|
|
* first output argument (only one supported so far).
|
|
|
|
*/
|
|
|
|
if (i == 0) {
|
2021-08-26 22:04:46 +03:00
|
|
|
ts_info(ts)->z_mask = ctx->z_mask;
|
|
|
|
ts_info(ts)->s_mask = ctx->s_mask;
|
2021-08-24 18:49:25 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
/*
|
|
|
|
* The fold_* functions return true when processing is complete,
|
|
|
|
* usually by folding the operation to a constant or to a copy,
|
|
|
|
* and calling tcg_opt_gen_{mov,movi}. They may do other things,
|
|
|
|
* like collect information about the value produced, for use in
|
|
|
|
* optimizing a subsequent operation.
|
|
|
|
*
|
|
|
|
* These first fold_* functions are all helpers, used by other
|
|
|
|
* folders for more specific operations.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static bool fold_const1(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t;
|
|
|
|
|
|
|
|
t = arg_info(op->args[1])->val;
|
2021-08-25 18:00:20 +03:00
|
|
|
t = do_constant_folding(op->opc, ctx->type, t, 0);
|
2021-08-25 22:03:48 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_const2(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
|
|
|
|
uint64_t t1 = arg_info(op->args[1])->val;
|
|
|
|
uint64_t t2 = arg_info(op->args[2])->val;
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
t1 = do_constant_folding(op->opc, ctx->type, t1, t2);
|
2021-08-25 22:03:48 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t1);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
static bool fold_commutative(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
swap_commutative(op->args[0], &op->args[1], &op->args[2]);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
static bool fold_const2_commutative(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
swap_commutative(op->args[0], &op->args[1], &op->args[2]);
|
|
|
|
return fold_const2(ctx, op);
|
|
|
|
}
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
static bool fold_masks(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
uint64_t a_mask = ctx->a_mask;
|
|
|
|
uint64_t z_mask = ctx->z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
uint64_t s_mask = ctx->s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
/*
|
2021-08-26 19:03:59 +03:00
|
|
|
* 32-bit ops generate 32-bit results, which for the purpose of
|
|
|
|
* simplifying tcg are sign-extended. Certainly that's how we
|
|
|
|
* represent our constants elsewhere. Note that the bits will
|
|
|
|
* be reset properly for a 64-bit value when encountering the
|
|
|
|
* type changing opcodes.
|
2021-08-26 08:42:19 +03:00
|
|
|
*/
|
|
|
|
if (ctx->type == TCG_TYPE_I32) {
|
2021-08-26 19:03:59 +03:00
|
|
|
a_mask = (int32_t)a_mask;
|
|
|
|
z_mask = (int32_t)z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask |= MAKE_64BIT_MASK(32, 32);
|
2021-08-26 19:03:59 +03:00
|
|
|
ctx->z_mask = z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
if (z_mask == 0) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], 0);
|
|
|
|
}
|
|
|
|
if (a_mask == 0) {
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 23:18:01 +03:00
|
|
|
/*
|
|
|
|
* Convert @op to NOT, if NOT is supported by the host.
|
|
|
|
* Return true f the conversion is successful, which will still
|
|
|
|
* indicate that the processing is complete.
|
|
|
|
*/
|
|
|
|
static bool fold_not(OptContext *ctx, TCGOp *op);
|
|
|
|
static bool fold_to_not(OptContext *ctx, TCGOp *op, int idx)
|
|
|
|
{
|
|
|
|
TCGOpcode not_op;
|
|
|
|
bool have_not;
|
|
|
|
|
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
not_op = INDEX_op_not_i32;
|
|
|
|
have_not = TCG_TARGET_HAS_not_i32;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
not_op = INDEX_op_not_i64;
|
|
|
|
have_not = TCG_TARGET_HAS_not_i64;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_V64:
|
|
|
|
case TCG_TYPE_V128:
|
|
|
|
case TCG_TYPE_V256:
|
|
|
|
not_op = INDEX_op_not_vec;
|
|
|
|
have_not = TCG_TARGET_HAS_not_vec;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
if (have_not) {
|
|
|
|
op->opc = not_op;
|
|
|
|
op->args[1] = op->args[idx];
|
|
|
|
return fold_not(ctx, op);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 06:42:04 +03:00
|
|
|
/* If the binary operation has first argument @i, fold to @i. */
|
|
|
|
static bool fold_ix_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1]) && arg_info(op->args[1])->val == i) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 23:18:01 +03:00
|
|
|
/* If the binary operation has first argument @i, fold to NOT. */
|
|
|
|
static bool fold_ix_to_not(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1]) && arg_info(op->args[1])->val == i) {
|
|
|
|
return fold_to_not(ctx, op, 2);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 23:19:52 +03:00
|
|
|
/* If the binary operation has second argument @i, fold to @i. */
|
|
|
|
static bool fold_xi_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 06:28:53 +03:00
|
|
|
/* If the binary operation has second argument @i, fold to identity. */
|
|
|
|
static bool fold_xi_to_x(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 23:18:01 +03:00
|
|
|
/* If the binary operation has second argument @i, fold to NOT. */
|
|
|
|
static bool fold_xi_to_not(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == i) {
|
|
|
|
return fold_to_not(ctx, op, 1);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 23:02:00 +03:00
|
|
|
/* If the binary operation has both arguments equal, fold to @i. */
|
|
|
|
static bool fold_xx_to_i(OptContext *ctx, TCGOp *op, uint64_t i)
|
|
|
|
{
|
|
|
|
if (args_are_copies(op->args[1], op->args[2])) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 23:14:21 +03:00
|
|
|
/* If the binary operation has both arguments equal, fold to identity. */
|
|
|
|
static bool fold_xx_to_x(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (args_are_copies(op->args[1], op->args[2])) {
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
/*
|
|
|
|
* These outermost fold_<op> functions are sorted alphabetically.
|
2021-08-25 23:14:21 +03:00
|
|
|
*
|
|
|
|
* The ordering of the transformations should be:
|
|
|
|
* 1) those that produce a constant
|
|
|
|
* 2) those that produce a copy
|
|
|
|
* 3) those that produce information about the result value.
|
2021-08-25 22:03:48 +03:00
|
|
|
*/
|
|
|
|
|
|
|
|
static bool fold_add(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
/* We cannot as yet do_constant_folding with vectors. */
|
|
|
|
static bool fold_add_vec(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (fold_commutative(ctx, op) ||
|
|
|
|
fold_xi_to_x(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 16:51:39 +03:00
|
|
|
static bool fold_addsub2(OptContext *ctx, TCGOp *op, bool add)
|
2021-08-24 20:30:38 +03:00
|
|
|
{
|
2023-10-26 04:39:44 +03:00
|
|
|
bool a_const = arg_is_const(op->args[2]) && arg_is_const(op->args[3]);
|
|
|
|
bool b_const = arg_is_const(op->args[4]) && arg_is_const(op->args[5]);
|
|
|
|
|
|
|
|
if (a_const && b_const) {
|
2021-08-26 16:51:39 +03:00
|
|
|
uint64_t al = arg_info(op->args[2])->val;
|
|
|
|
uint64_t ah = arg_info(op->args[3])->val;
|
|
|
|
uint64_t bl = arg_info(op->args[4])->val;
|
|
|
|
uint64_t bh = arg_info(op->args[5])->val;
|
2021-08-24 20:30:38 +03:00
|
|
|
TCGArg rl, rh;
|
2021-08-26 16:51:39 +03:00
|
|
|
TCGOp *op2;
|
|
|
|
|
|
|
|
if (ctx->type == TCG_TYPE_I32) {
|
|
|
|
uint64_t a = deposit64(al, 32, 32, ah);
|
|
|
|
uint64_t b = deposit64(bl, 32, 32, bh);
|
|
|
|
|
|
|
|
if (add) {
|
|
|
|
a += b;
|
|
|
|
} else {
|
|
|
|
a -= b;
|
|
|
|
}
|
2021-08-24 20:30:38 +03:00
|
|
|
|
2021-08-26 16:51:39 +03:00
|
|
|
al = sextract64(a, 0, 32);
|
|
|
|
ah = sextract64(a, 32, 32);
|
2021-08-24 20:30:38 +03:00
|
|
|
} else {
|
2021-08-26 16:51:39 +03:00
|
|
|
Int128 a = int128_make128(al, ah);
|
|
|
|
Int128 b = int128_make128(bl, bh);
|
|
|
|
|
|
|
|
if (add) {
|
|
|
|
a = int128_add(a, b);
|
|
|
|
} else {
|
|
|
|
a = int128_sub(a, b);
|
|
|
|
}
|
|
|
|
|
|
|
|
al = int128_getlo(a);
|
|
|
|
ah = int128_gethi(a);
|
2021-08-24 20:30:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
rl = op->args[0];
|
|
|
|
rh = op->args[1];
|
2021-08-26 16:51:39 +03:00
|
|
|
|
|
|
|
/* The proper opcode is supplied by tcg_opt_gen_mov. */
|
2022-12-19 00:18:31 +03:00
|
|
|
op2 = tcg_op_insert_before(ctx->tcg, op, 0, 2);
|
2021-08-26 16:51:39 +03:00
|
|
|
|
|
|
|
tcg_opt_gen_movi(ctx, op, rl, al);
|
|
|
|
tcg_opt_gen_movi(ctx, op2, rh, ah);
|
2021-08-24 20:30:38 +03:00
|
|
|
return true;
|
|
|
|
}
|
2023-10-26 04:39:44 +03:00
|
|
|
|
|
|
|
/* Fold sub2 r,x,i to add2 r,x,-i */
|
|
|
|
if (!add && b_const) {
|
|
|
|
uint64_t bl = arg_info(op->args[4])->val;
|
|
|
|
uint64_t bh = arg_info(op->args[5])->val;
|
|
|
|
|
|
|
|
/* Negate the two parts without assembling and disassembling. */
|
|
|
|
bl = -bl;
|
|
|
|
bh = ~bh + !bl;
|
|
|
|
|
|
|
|
op->opc = (ctx->type == TCG_TYPE_I32
|
|
|
|
? INDEX_op_add2_i32 : INDEX_op_add2_i64);
|
|
|
|
op->args[4] = arg_new_constant(ctx, bl);
|
|
|
|
op->args[5] = arg_new_constant(ctx, bh);
|
|
|
|
}
|
2021-08-24 20:30:38 +03:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 16:51:39 +03:00
|
|
|
static bool fold_add2(OptContext *ctx, TCGOp *op)
|
2021-08-24 20:30:38 +03:00
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
/* Note that the high and low parts may be independently swapped. */
|
|
|
|
swap_commutative(op->args[0], &op->args[2], &op->args[4]);
|
|
|
|
swap_commutative(op->args[1], &op->args[3], &op->args[5]);
|
|
|
|
|
2021-08-26 16:51:39 +03:00
|
|
|
return fold_addsub2(ctx, op, true);
|
2021-08-24 20:30:38 +03:00
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_and(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z1, z2;
|
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-25 23:19:52 +03:00
|
|
|
fold_xi_to_i(ctx, op, 0) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, -1) ||
|
2021-08-25 23:14:21 +03:00
|
|
|
fold_xx_to_x(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
z1 = arg_info(op->args[1])->z_mask;
|
|
|
|
z2 = arg_info(op->args[2])->z_mask;
|
|
|
|
ctx->z_mask = z1 & z2;
|
|
|
|
|
2021-08-26 23:08:54 +03:00
|
|
|
/*
|
|
|
|
* Sign repetitions are perforce all identical, whether they are 1 or 0.
|
|
|
|
* Bitwise operations preserve the relative quantity of the repetitions.
|
|
|
|
*/
|
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
/*
|
|
|
|
* Known-zeros does not imply known-ones. Therefore unless
|
|
|
|
* arg2 is constant, we can't infer affected bits from it.
|
|
|
|
*/
|
|
|
|
if (arg_is_const(op->args[2])) {
|
|
|
|
ctx->a_mask = z1 & ~z2;
|
|
|
|
}
|
|
|
|
|
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_andc(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z1;
|
|
|
|
|
2021-08-25 23:02:00 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xx_to_i(ctx, op, 0) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_ix_to_not(ctx, op, -1)) {
|
2021-08-25 23:02:00 +03:00
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
z1 = arg_info(op->args[1])->z_mask;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Known-zeros does not imply known-ones. Therefore unless
|
|
|
|
* arg2 is constant, we can't infer anything from it.
|
|
|
|
*/
|
|
|
|
if (arg_is_const(op->args[2])) {
|
|
|
|
uint64_t z2 = ~arg_info(op->args[2])->z_mask;
|
|
|
|
ctx->a_mask = z1 & ~z2;
|
|
|
|
z1 &= z2;
|
|
|
|
}
|
|
|
|
ctx->z_mask = z1;
|
|
|
|
|
2021-08-26 23:08:54 +03:00
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 19:30:59 +03:00
|
|
|
static bool fold_brcond(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[2];
|
2021-08-26 17:06:39 +03:00
|
|
|
int i;
|
2021-08-24 19:30:59 +03:00
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
if (swap_commutative(NO_DEST, &op->args[0], &op->args[1])) {
|
|
|
|
op->args[2] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
|
|
|
|
|
|
|
i = do_constant_folding_cond(ctx->type, op->args[0], op->args[1], cond);
|
2021-08-24 19:30:59 +03:00
|
|
|
if (i == 0) {
|
|
|
|
tcg_op_remove(ctx->tcg, op);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
if (i > 0) {
|
|
|
|
op->opc = INDEX_op_br;
|
|
|
|
op->args[0] = op->args[3];
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 19:22:11 +03:00
|
|
|
static bool fold_brcond2(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[4];
|
|
|
|
TCGArg label = op->args[5];
|
2021-08-26 17:06:39 +03:00
|
|
|
int i, inv = 0;
|
|
|
|
|
|
|
|
if (swap_commutative2(&op->args[0], &op->args[2])) {
|
|
|
|
op->args[4] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
2021-08-24 19:22:11 +03:00
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
i = do_constant_folding_cond2(&op->args[0], &op->args[2], cond);
|
2021-08-24 19:22:11 +03:00
|
|
|
if (i >= 0) {
|
|
|
|
goto do_brcond_const;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cond) {
|
|
|
|
case TCG_COND_LT:
|
|
|
|
case TCG_COND_GE:
|
|
|
|
/*
|
|
|
|
* Simplify LT/GE comparisons vs zero to a single compare
|
|
|
|
* vs the high word of the input.
|
|
|
|
*/
|
|
|
|
if (arg_is_const(op->args[2]) && arg_info(op->args[2])->val == 0 &&
|
|
|
|
arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0) {
|
|
|
|
goto do_brcond_high;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TCG_COND_NE:
|
|
|
|
inv = 1;
|
|
|
|
QEMU_FALLTHROUGH;
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
/*
|
|
|
|
* Simplify EQ/NE comparisons where one of the pairs
|
|
|
|
* can be simplified.
|
|
|
|
*/
|
2021-08-25 18:00:20 +03:00
|
|
|
i = do_constant_folding_cond(TCG_TYPE_I32, op->args[0],
|
2021-08-24 19:22:11 +03:00
|
|
|
op->args[2], cond);
|
|
|
|
switch (i ^ inv) {
|
|
|
|
case 0:
|
|
|
|
goto do_brcond_const;
|
|
|
|
case 1:
|
|
|
|
goto do_brcond_high;
|
|
|
|
}
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
i = do_constant_folding_cond(TCG_TYPE_I32, op->args[1],
|
2021-08-24 19:22:11 +03:00
|
|
|
op->args[3], cond);
|
|
|
|
switch (i ^ inv) {
|
|
|
|
case 0:
|
|
|
|
goto do_brcond_const;
|
|
|
|
case 1:
|
|
|
|
op->opc = INDEX_op_brcond_i32;
|
|
|
|
op->args[1] = op->args[2];
|
|
|
|
op->args[2] = cond;
|
|
|
|
op->args[3] = label;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
|
|
|
|
do_brcond_high:
|
|
|
|
op->opc = INDEX_op_brcond_i32;
|
|
|
|
op->args[0] = op->args[1];
|
|
|
|
op->args[1] = op->args[3];
|
|
|
|
op->args[2] = cond;
|
|
|
|
op->args[3] = label;
|
|
|
|
break;
|
|
|
|
|
|
|
|
do_brcond_const:
|
|
|
|
if (i == 0) {
|
|
|
|
tcg_op_remove(ctx->tcg, op);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
op->opc = INDEX_op_br;
|
|
|
|
op->args[0] = label;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-24 21:58:12 +03:00
|
|
|
static bool fold_bswap(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 22:04:46 +03:00
|
|
|
uint64_t z_mask, s_mask, sign;
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-24 21:58:12 +03:00
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t = arg_info(op->args[1])->val;
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
t = do_constant_folding(op->opc, ctx->type, t, op->args[2]);
|
2021-08-24 21:58:12 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
z_mask = arg_info(op->args[1])->z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
switch (op->opc) {
|
|
|
|
case INDEX_op_bswap16_i32:
|
|
|
|
case INDEX_op_bswap16_i64:
|
|
|
|
z_mask = bswap16(z_mask);
|
|
|
|
sign = INT16_MIN;
|
|
|
|
break;
|
|
|
|
case INDEX_op_bswap32_i32:
|
|
|
|
case INDEX_op_bswap32_i64:
|
|
|
|
z_mask = bswap32(z_mask);
|
|
|
|
sign = INT32_MIN;
|
|
|
|
break;
|
|
|
|
case INDEX_op_bswap64_i64:
|
|
|
|
z_mask = bswap64(z_mask);
|
|
|
|
sign = INT64_MIN;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask = smask_from_zmask(z_mask);
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
switch (op->args[2] & (TCG_BSWAP_OZ | TCG_BSWAP_OS)) {
|
|
|
|
case TCG_BSWAP_OZ:
|
|
|
|
break;
|
|
|
|
case TCG_BSWAP_OS:
|
|
|
|
/* If the sign bit may be 1, force all the bits above to 1. */
|
|
|
|
if (z_mask & sign) {
|
|
|
|
z_mask |= sign;
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask = sign << 1;
|
2021-08-26 08:42:19 +03:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
/* The high bits are undefined: force all bits above the sign to 1. */
|
|
|
|
z_mask |= sign << 1;
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask = 0;
|
2021-08-26 08:42:19 +03:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
ctx->z_mask = z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
return fold_masks(ctx, op);
|
2021-08-24 21:58:12 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 18:17:08 +03:00
|
|
|
static bool fold_call(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGContext *s = ctx->tcg;
|
|
|
|
int nb_oargs = TCGOP_CALLO(op);
|
|
|
|
int nb_iargs = TCGOP_CALLI(op);
|
|
|
|
int flags, i;
|
|
|
|
|
|
|
|
init_arguments(ctx, op, nb_oargs + nb_iargs);
|
|
|
|
copy_propagate(ctx, op, nb_oargs, nb_iargs);
|
|
|
|
|
|
|
|
/* If the function reads or writes globals, reset temp data. */
|
|
|
|
flags = tcg_call_flags(op);
|
|
|
|
if (!(flags & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
|
|
|
|
int nb_globals = s->nb_globals;
|
|
|
|
|
|
|
|
for (i = 0; i < nb_globals; i++) {
|
|
|
|
if (test_bit(i, ctx->temps_used.l)) {
|
2023-01-10 00:59:35 +03:00
|
|
|
reset_ts(ctx, &ctx->tcg->temps[i]);
|
2021-08-24 18:17:08 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
/* If the function has side effects, reset mem data. */
|
|
|
|
if (!(flags & TCG_CALL_NO_SIDE_EFFECTS)) {
|
|
|
|
remove_mem_copy_all(ctx);
|
|
|
|
}
|
|
|
|
|
2021-08-24 18:17:08 +03:00
|
|
|
/* Reset temp data for outputs. */
|
|
|
|
for (i = 0; i < nb_oargs; i++) {
|
2023-01-10 00:59:35 +03:00
|
|
|
reset_temp(ctx, op->args[i]);
|
2021-08-24 18:17:08 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Stop optimizing MB across calls. */
|
|
|
|
ctx->prev_mb = NULL;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-08-24 20:51:34 +03:00
|
|
|
static bool fold_count_zeros(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z_mask;
|
|
|
|
|
2021-08-24 20:51:34 +03:00
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t = arg_info(op->args[1])->val;
|
|
|
|
|
|
|
|
if (t != 0) {
|
2021-08-25 18:00:20 +03:00
|
|
|
t = do_constant_folding(op->opc, ctx->type, t, 0);
|
2021-08-24 20:51:34 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[2]);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
z_mask = 31;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
z_mask = 63;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
ctx->z_mask = arg_info(op->args[2])->z_mask | z_mask;
|
2021-08-26 23:24:17 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(ctx->z_mask);
|
2021-08-24 20:51:34 +03:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_ctpop(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
if (fold_const1(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
ctx->z_mask = 32 | 31;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
ctx->z_mask = 64 | 63;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
2021-08-26 23:24:17 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(ctx->z_mask);
|
2021-08-26 08:42:19 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 20:47:04 +03:00
|
|
|
static bool fold_deposit(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2023-08-13 21:03:05 +03:00
|
|
|
TCGOpcode and_opc;
|
|
|
|
|
2021-08-24 20:47:04 +03:00
|
|
|
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
|
|
|
|
uint64_t t1 = arg_info(op->args[1])->val;
|
|
|
|
uint64_t t2 = arg_info(op->args[2])->val;
|
|
|
|
|
|
|
|
t1 = deposit64(t1, op->args[3], op->args[4], t2);
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t1);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2023-08-13 21:03:05 +03:00
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
and_opc = INDEX_op_and_i32;
|
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
and_opc = INDEX_op_and_i64;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Inserting a value into zero at offset 0. */
|
|
|
|
if (arg_is_const(op->args[1])
|
|
|
|
&& arg_info(op->args[1])->val == 0
|
|
|
|
&& op->args[3] == 0) {
|
|
|
|
uint64_t mask = MAKE_64BIT_MASK(0, op->args[4]);
|
|
|
|
|
|
|
|
op->opc = and_opc;
|
|
|
|
op->args[1] = op->args[2];
|
2023-10-23 22:31:57 +03:00
|
|
|
op->args[2] = arg_new_constant(ctx, mask);
|
2023-08-13 21:03:05 +03:00
|
|
|
ctx->z_mask = mask & arg_info(op->args[1])->z_mask;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Inserting zero into a value. */
|
|
|
|
if (arg_is_const(op->args[2])
|
|
|
|
&& arg_info(op->args[2])->val == 0) {
|
|
|
|
uint64_t mask = deposit64(-1, op->args[3], op->args[4], 0);
|
|
|
|
|
|
|
|
op->opc = and_opc;
|
2023-10-23 22:31:57 +03:00
|
|
|
op->args[2] = arg_new_constant(ctx, mask);
|
2023-08-13 21:03:05 +03:00
|
|
|
ctx->z_mask = mask & arg_info(op->args[1])->z_mask;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx->z_mask = deposit64(arg_info(op->args[1])->z_mask,
|
|
|
|
op->args[3], op->args[4],
|
|
|
|
arg_info(op->args[2])->z_mask);
|
2021-08-24 20:47:04 +03:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_divide(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-10-25 21:30:14 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
|
|
|
fold_xi_to_x(ctx, op, 1)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 22:06:33 +03:00
|
|
|
static bool fold_dup(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t = arg_info(op->args[1])->val;
|
|
|
|
t = dup_const(TCGOP_VECE(op), t);
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_dup2(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
|
|
|
|
uint64_t t = deposit64(arg_info(op->args[1])->val, 32, 32,
|
|
|
|
arg_info(op->args[2])->val);
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args_are_copies(op->args[1], op->args[2])) {
|
|
|
|
op->opc = INDEX_op_dup_vec;
|
|
|
|
TCGOP_VECE(op) = MO_32;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_eqv(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, -1) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xi_to_not(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 23:08:54 +03:00
|
|
|
|
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-24 23:18:01 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 20:44:53 +03:00
|
|
|
static bool fold_extract(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z_mask_old, z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
int pos = op->args[2];
|
|
|
|
int len = op->args[3];
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-24 20:44:53 +03:00
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t;
|
|
|
|
|
|
|
|
t = arg_info(op->args[1])->val;
|
2021-08-26 22:04:46 +03:00
|
|
|
t = extract64(t, pos, len);
|
2021-08-24 20:44:53 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
z_mask_old = arg_info(op->args[1])->z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
z_mask = extract64(z_mask_old, pos, len);
|
|
|
|
if (pos == 0) {
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx->a_mask = z_mask_old ^ z_mask;
|
|
|
|
}
|
|
|
|
ctx->z_mask = z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(z_mask);
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
return fold_masks(ctx, op);
|
2021-08-24 20:44:53 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 20:41:39 +03:00
|
|
|
static bool fold_extract2(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
|
|
|
|
uint64_t v1 = arg_info(op->args[1])->val;
|
|
|
|
uint64_t v2 = arg_info(op->args[2])->val;
|
|
|
|
int shr = op->args[3];
|
|
|
|
|
|
|
|
if (op->opc == INDEX_op_extract2_i64) {
|
|
|
|
v1 >>= shr;
|
|
|
|
v2 <<= 64 - shr;
|
|
|
|
} else {
|
|
|
|
v1 = (uint32_t)v1 >> shr;
|
2021-11-10 01:17:59 +03:00
|
|
|
v2 = (uint64_t)((int32_t)v2 << (32 - shr));
|
2021-08-24 20:41:39 +03:00
|
|
|
}
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], v1 | v2);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_exts(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 22:04:46 +03:00
|
|
|
uint64_t s_mask_old, s_mask, z_mask, sign;
|
2021-08-26 08:42:19 +03:00
|
|
|
bool type_change = false;
|
|
|
|
|
|
|
|
if (fold_const1(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-08-26 22:04:46 +03:00
|
|
|
z_mask = arg_info(op->args[1])->z_mask;
|
|
|
|
s_mask = arg_info(op->args[1])->s_mask;
|
|
|
|
s_mask_old = s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
switch (op->opc) {
|
|
|
|
CASE_OP_32_64(ext8s):
|
|
|
|
sign = INT8_MIN;
|
|
|
|
z_mask = (uint8_t)z_mask;
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(ext16s):
|
|
|
|
sign = INT16_MIN;
|
|
|
|
z_mask = (uint16_t)z_mask;
|
|
|
|
break;
|
|
|
|
case INDEX_op_ext_i32_i64:
|
|
|
|
type_change = true;
|
|
|
|
QEMU_FALLTHROUGH;
|
|
|
|
case INDEX_op_ext32s_i64:
|
|
|
|
sign = INT32_MIN;
|
|
|
|
z_mask = (uint32_t)z_mask;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
if (z_mask & sign) {
|
|
|
|
z_mask |= sign;
|
|
|
|
}
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask |= sign << 1;
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx->z_mask = z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = s_mask;
|
|
|
|
if (!type_change) {
|
|
|
|
ctx->a_mask = s_mask & ~s_mask_old;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_extu(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z_mask_old, z_mask;
|
|
|
|
bool type_change = false;
|
|
|
|
|
|
|
|
if (fold_const1(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
z_mask_old = z_mask = arg_info(op->args[1])->z_mask;
|
|
|
|
|
|
|
|
switch (op->opc) {
|
|
|
|
CASE_OP_32_64(ext8u):
|
|
|
|
z_mask = (uint8_t)z_mask;
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(ext16u):
|
|
|
|
z_mask = (uint16_t)z_mask;
|
|
|
|
break;
|
|
|
|
case INDEX_op_extrl_i64_i32:
|
|
|
|
case INDEX_op_extu_i32_i64:
|
|
|
|
type_change = true;
|
|
|
|
QEMU_FALLTHROUGH;
|
|
|
|
case INDEX_op_ext32u_i64:
|
|
|
|
z_mask = (uint32_t)z_mask;
|
|
|
|
break;
|
|
|
|
case INDEX_op_extrh_i64_i32:
|
|
|
|
type_change = true;
|
|
|
|
z_mask >>= 32;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
|
|
|
|
ctx->z_mask = z_mask;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(z_mask);
|
2021-08-26 08:42:19 +03:00
|
|
|
if (!type_change) {
|
|
|
|
ctx->a_mask = z_mask_old ^ z_mask;
|
|
|
|
}
|
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-25 21:06:43 +03:00
|
|
|
static bool fold_mb(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
/* Eliminate duplicate and redundant fence instructions. */
|
|
|
|
if (ctx->prev_mb) {
|
|
|
|
/*
|
|
|
|
* Merge two barriers of the same type into one,
|
|
|
|
* or a weaker barrier into a stronger one,
|
|
|
|
* or two weaker barriers into a stronger one.
|
|
|
|
* mb X; mb Y => mb X|Y
|
|
|
|
* mb; strl => mb; st
|
|
|
|
* ldaq; mb => ld; mb
|
|
|
|
* ldaq; strl => ld; mb; st
|
|
|
|
* Other combinations are also merged into a strong
|
|
|
|
* barrier. This is stricter than specified but for
|
|
|
|
* the purposes of TCG is better than not optimizing.
|
|
|
|
*/
|
|
|
|
ctx->prev_mb->args[0] |= op->args[0];
|
|
|
|
tcg_op_remove(ctx->tcg, op);
|
|
|
|
} else {
|
|
|
|
ctx->prev_mb = op;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-08-25 23:05:43 +03:00
|
|
|
static bool fold_mov(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[1]);
|
|
|
|
}
|
|
|
|
|
2021-08-24 20:37:24 +03:00
|
|
|
static bool fold_movcond(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[5];
|
2021-08-26 17:06:39 +03:00
|
|
|
int i;
|
|
|
|
|
|
|
|
if (swap_commutative(NO_DEST, &op->args[1], &op->args[2])) {
|
|
|
|
op->args[5] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Canonicalize the "false" input reg to match the destination reg so
|
|
|
|
* that the tcg backend can implement a "move if true" operation.
|
|
|
|
*/
|
|
|
|
if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
|
|
|
|
op->args[5] = cond = tcg_invert_cond(cond);
|
|
|
|
}
|
2021-08-24 20:37:24 +03:00
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
i = do_constant_folding_cond(ctx->type, op->args[1], op->args[2], cond);
|
2021-08-24 20:37:24 +03:00
|
|
|
if (i >= 0) {
|
|
|
|
return tcg_opt_gen_mov(ctx, op, op->args[0], op->args[4 - i]);
|
|
|
|
}
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx->z_mask = arg_info(op->args[3])->z_mask
|
|
|
|
| arg_info(op->args[4])->z_mask;
|
2021-08-26 23:08:54 +03:00
|
|
|
ctx->s_mask = arg_info(op->args[3])->s_mask
|
|
|
|
& arg_info(op->args[4])->s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-24 20:37:24 +03:00
|
|
|
if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
|
|
|
|
uint64_t tv = arg_info(op->args[3])->val;
|
|
|
|
uint64_t fv = arg_info(op->args[4])->val;
|
2023-08-05 02:24:04 +03:00
|
|
|
TCGOpcode opc, negopc = 0;
|
2021-08-24 20:37:24 +03:00
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
opc = INDEX_op_setcond_i32;
|
2023-08-05 02:24:04 +03:00
|
|
|
if (TCG_TARGET_HAS_negsetcond_i32) {
|
|
|
|
negopc = INDEX_op_negsetcond_i32;
|
|
|
|
}
|
|
|
|
tv = (int32_t)tv;
|
|
|
|
fv = (int32_t)fv;
|
2021-08-25 18:00:20 +03:00
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
opc = INDEX_op_setcond_i64;
|
2023-08-05 02:24:04 +03:00
|
|
|
if (TCG_TARGET_HAS_negsetcond_i64) {
|
|
|
|
negopc = INDEX_op_negsetcond_i64;
|
|
|
|
}
|
2021-08-25 18:00:20 +03:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
2021-08-24 20:37:24 +03:00
|
|
|
|
|
|
|
if (tv == 1 && fv == 0) {
|
|
|
|
op->opc = opc;
|
|
|
|
op->args[3] = cond;
|
|
|
|
} else if (fv == 1 && tv == 0) {
|
|
|
|
op->opc = opc;
|
|
|
|
op->args[3] = tcg_invert_cond(cond);
|
2023-08-05 02:24:04 +03:00
|
|
|
} else if (negopc) {
|
|
|
|
if (tv == -1 && fv == 0) {
|
|
|
|
op->opc = negopc;
|
|
|
|
op->args[3] = cond;
|
|
|
|
} else if (fv == -1 && tv == 0) {
|
|
|
|
op->opc = negopc;
|
|
|
|
op->args[3] = tcg_invert_cond(cond);
|
|
|
|
}
|
2021-08-24 20:37:24 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_mul(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-25 23:19:52 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
2021-10-25 21:19:14 +03:00
|
|
|
fold_xi_to_i(ctx, op, 0) ||
|
|
|
|
fold_xi_to_x(ctx, op, 1)) {
|
2021-08-25 23:19:52 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_mul_highpart(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-25 23:19:52 +03:00
|
|
|
fold_xi_to_i(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-26 16:33:04 +03:00
|
|
|
static bool fold_multiply2(OptContext *ctx, TCGOp *op)
|
2021-08-24 20:24:12 +03:00
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
swap_commutative(op->args[0], &op->args[2], &op->args[3]);
|
|
|
|
|
2021-08-24 20:24:12 +03:00
|
|
|
if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
|
2021-08-26 16:33:04 +03:00
|
|
|
uint64_t a = arg_info(op->args[2])->val;
|
|
|
|
uint64_t b = arg_info(op->args[3])->val;
|
|
|
|
uint64_t h, l;
|
2021-08-24 20:24:12 +03:00
|
|
|
TCGArg rl, rh;
|
2021-08-26 16:33:04 +03:00
|
|
|
TCGOp *op2;
|
|
|
|
|
|
|
|
switch (op->opc) {
|
|
|
|
case INDEX_op_mulu2_i32:
|
|
|
|
l = (uint64_t)(uint32_t)a * (uint32_t)b;
|
|
|
|
h = (int32_t)(l >> 32);
|
|
|
|
l = (int32_t)l;
|
|
|
|
break;
|
|
|
|
case INDEX_op_muls2_i32:
|
|
|
|
l = (int64_t)(int32_t)a * (int32_t)b;
|
|
|
|
h = l >> 32;
|
|
|
|
l = (int32_t)l;
|
|
|
|
break;
|
|
|
|
case INDEX_op_mulu2_i64:
|
|
|
|
mulu64(&l, &h, a, b);
|
|
|
|
break;
|
|
|
|
case INDEX_op_muls2_i64:
|
|
|
|
muls64(&l, &h, a, b);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
2021-08-24 20:24:12 +03:00
|
|
|
|
|
|
|
rl = op->args[0];
|
|
|
|
rh = op->args[1];
|
2021-08-26 16:33:04 +03:00
|
|
|
|
|
|
|
/* The proper opcode is supplied by tcg_opt_gen_mov. */
|
2022-12-19 00:18:31 +03:00
|
|
|
op2 = tcg_op_insert_before(ctx->tcg, op, 0, 2);
|
2021-08-26 16:33:04 +03:00
|
|
|
|
|
|
|
tcg_opt_gen_movi(ctx, op, rl, l);
|
|
|
|
tcg_opt_gen_movi(ctx, op2, rh, h);
|
2021-08-24 20:24:12 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_nand(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xi_to_not(ctx, op, -1)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 23:08:54 +03:00
|
|
|
|
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-24 23:18:01 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_neg(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
uint64_t z_mask;
|
|
|
|
|
2021-08-24 23:30:32 +03:00
|
|
|
if (fold_const1(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
/* Set to 1 all bits to the left of the rightmost. */
|
|
|
|
z_mask = arg_info(op->args[1])->z_mask;
|
|
|
|
ctx->z_mask = -(z_mask & -z_mask);
|
|
|
|
|
2021-08-24 23:30:32 +03:00
|
|
|
/*
|
|
|
|
* Because of fold_sub_to_neg, we want to always return true,
|
|
|
|
* via finish_folding.
|
|
|
|
*/
|
|
|
|
finish_folding(ctx, op);
|
|
|
|
return true;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_nor(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xi_to_not(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 23:08:54 +03:00
|
|
|
|
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-24 23:18:01 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_not(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-24 23:18:01 +03:00
|
|
|
if (fold_const1(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2021-08-26 23:08:54 +03:00
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask;
|
|
|
|
|
2021-08-24 23:18:01 +03:00
|
|
|
/* Because of fold_to_not, we want to always return true, via finish. */
|
|
|
|
finish_folding(ctx, op);
|
|
|
|
return true;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_or(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0) ||
|
2021-08-25 23:14:21 +03:00
|
|
|
fold_xx_to_x(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
ctx->z_mask = arg_info(op->args[1])->z_mask
|
|
|
|
| arg_info(op->args[2])->z_mask;
|
2021-08-26 23:08:54 +03:00
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_orc(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-24 23:18:01 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
2021-08-26 17:31:13 +03:00
|
|
|
fold_xx_to_i(ctx, op, -1) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, -1) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_ix_to_not(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 23:08:54 +03:00
|
|
|
|
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-24 23:18:01 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-25 21:06:43 +03:00
|
|
|
static bool fold_qemu_ld(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 08:42:19 +03:00
|
|
|
const TCGOpDef *def = &tcg_op_defs[op->opc];
|
|
|
|
MemOpIdx oi = op->args[def->nb_oargs + def->nb_iargs];
|
|
|
|
MemOp mop = get_memop(oi);
|
|
|
|
int width = 8 * memop_size(mop);
|
|
|
|
|
2021-08-26 22:04:46 +03:00
|
|
|
if (width < 64) {
|
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(width, 64 - width);
|
|
|
|
if (!(mop & MO_SIGN)) {
|
|
|
|
ctx->z_mask = MAKE_64BIT_MASK(0, width);
|
|
|
|
ctx->s_mask <<= 1;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
}
|
|
|
|
|
2021-08-25 21:06:43 +03:00
|
|
|
/* Opcodes that touch guest memory stop the mb optimization. */
|
|
|
|
ctx->prev_mb = NULL;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_qemu_st(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
/* Opcodes that touch guest memory stop the mb optimization. */
|
|
|
|
ctx->prev_mb = NULL;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_remainder(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-10-25 21:30:33 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
|
|
|
fold_xx_to_i(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 19:35:30 +03:00
|
|
|
static bool fold_setcond(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[3];
|
2021-08-26 17:06:39 +03:00
|
|
|
int i;
|
|
|
|
|
|
|
|
if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
|
|
|
|
op->args[3] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
2021-08-24 19:35:30 +03:00
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
i = do_constant_folding_cond(ctx->type, op->args[1], op->args[2], cond);
|
2021-08-24 19:35:30 +03:00
|
|
|
if (i >= 0) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
ctx->z_mask = 1;
|
2021-08-26 23:20:39 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(1);
|
2021-08-24 19:35:30 +03:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2023-08-05 02:24:04 +03:00
|
|
|
static bool fold_negsetcond(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[3];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
|
|
|
|
op->args[3] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
|
|
|
|
|
|
|
i = do_constant_folding_cond(ctx->type, op->args[1], op->args[2], cond);
|
|
|
|
if (i >= 0) {
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], -i);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Value is {0,-1} so all bits are repetitions of the sign. */
|
|
|
|
ctx->s_mask = -1;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2021-08-24 19:09:35 +03:00
|
|
|
static bool fold_setcond2(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGCond cond = op->args[5];
|
2021-08-26 17:06:39 +03:00
|
|
|
int i, inv = 0;
|
2021-08-24 19:09:35 +03:00
|
|
|
|
2021-08-26 17:06:39 +03:00
|
|
|
if (swap_commutative2(&op->args[1], &op->args[3])) {
|
|
|
|
op->args[5] = cond = tcg_swap_cond(cond);
|
|
|
|
}
|
|
|
|
|
|
|
|
i = do_constant_folding_cond2(&op->args[1], &op->args[3], cond);
|
2021-08-24 19:09:35 +03:00
|
|
|
if (i >= 0) {
|
|
|
|
goto do_setcond_const;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (cond) {
|
|
|
|
case TCG_COND_LT:
|
|
|
|
case TCG_COND_GE:
|
|
|
|
/*
|
|
|
|
* Simplify LT/GE comparisons vs zero to a single compare
|
|
|
|
* vs the high word of the input.
|
|
|
|
*/
|
|
|
|
if (arg_is_const(op->args[3]) && arg_info(op->args[3])->val == 0 &&
|
|
|
|
arg_is_const(op->args[4]) && arg_info(op->args[4])->val == 0) {
|
|
|
|
goto do_setcond_high;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TCG_COND_NE:
|
|
|
|
inv = 1;
|
|
|
|
QEMU_FALLTHROUGH;
|
|
|
|
case TCG_COND_EQ:
|
|
|
|
/*
|
|
|
|
* Simplify EQ/NE comparisons where one of the pairs
|
|
|
|
* can be simplified.
|
|
|
|
*/
|
2021-08-25 18:00:20 +03:00
|
|
|
i = do_constant_folding_cond(TCG_TYPE_I32, op->args[1],
|
2021-08-24 19:09:35 +03:00
|
|
|
op->args[3], cond);
|
|
|
|
switch (i ^ inv) {
|
|
|
|
case 0:
|
|
|
|
goto do_setcond_const;
|
|
|
|
case 1:
|
|
|
|
goto do_setcond_high;
|
|
|
|
}
|
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
i = do_constant_folding_cond(TCG_TYPE_I32, op->args[2],
|
2021-08-24 19:09:35 +03:00
|
|
|
op->args[4], cond);
|
|
|
|
switch (i ^ inv) {
|
|
|
|
case 0:
|
|
|
|
goto do_setcond_const;
|
|
|
|
case 1:
|
|
|
|
op->args[2] = op->args[3];
|
|
|
|
op->args[3] = cond;
|
|
|
|
op->opc = INDEX_op_setcond_i32;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
|
|
|
|
do_setcond_high:
|
|
|
|
op->args[1] = op->args[2];
|
|
|
|
op->args[2] = op->args[4];
|
|
|
|
op->args[3] = cond;
|
|
|
|
op->opc = INDEX_op_setcond_i32;
|
|
|
|
break;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
ctx->z_mask = 1;
|
2021-08-26 23:20:39 +03:00
|
|
|
ctx->s_mask = smask_from_zmask(1);
|
2021-08-24 19:09:35 +03:00
|
|
|
return false;
|
|
|
|
|
|
|
|
do_setcond_const:
|
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], i);
|
|
|
|
}
|
|
|
|
|
2021-08-24 20:44:53 +03:00
|
|
|
static bool fold_sextract(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 22:04:46 +03:00
|
|
|
uint64_t z_mask, s_mask, s_mask_old;
|
|
|
|
int pos = op->args[2];
|
|
|
|
int len = op->args[3];
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-24 20:44:53 +03:00
|
|
|
if (arg_is_const(op->args[1])) {
|
|
|
|
uint64_t t;
|
|
|
|
|
|
|
|
t = arg_info(op->args[1])->val;
|
2021-08-26 22:04:46 +03:00
|
|
|
t = sextract64(t, pos, len);
|
2021-08-24 20:44:53 +03:00
|
|
|
return tcg_opt_gen_movi(ctx, op, op->args[0], t);
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-26 22:04:46 +03:00
|
|
|
z_mask = arg_info(op->args[1])->z_mask;
|
|
|
|
z_mask = sextract64(z_mask, pos, len);
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx->z_mask = z_mask;
|
|
|
|
|
2021-08-26 22:04:46 +03:00
|
|
|
s_mask_old = arg_info(op->args[1])->s_mask;
|
|
|
|
s_mask = sextract64(s_mask_old, pos, len);
|
|
|
|
s_mask |= MAKE_64BIT_MASK(len, 64 - len);
|
|
|
|
ctx->s_mask = s_mask;
|
|
|
|
|
|
|
|
if (pos == 0) {
|
|
|
|
ctx->a_mask = s_mask & ~s_mask_old;
|
|
|
|
}
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
return fold_masks(ctx, op);
|
2021-08-24 20:44:53 +03:00
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_shift(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 23:24:59 +03:00
|
|
|
uint64_t s_mask, z_mask, sign;
|
|
|
|
|
2021-08-26 06:28:53 +03:00
|
|
|
if (fold_const2(ctx, op) ||
|
2021-08-26 06:42:04 +03:00
|
|
|
fold_ix_to_i(ctx, op, 0) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0)) {
|
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
2021-08-26 23:24:59 +03:00
|
|
|
s_mask = arg_info(op->args[1])->s_mask;
|
|
|
|
z_mask = arg_info(op->args[1])->z_mask;
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
if (arg_is_const(op->args[2])) {
|
2021-08-26 23:24:59 +03:00
|
|
|
int sh = arg_info(op->args[2])->val;
|
|
|
|
|
|
|
|
ctx->z_mask = do_constant_folding(op->opc, ctx->type, z_mask, sh);
|
|
|
|
|
|
|
|
s_mask = do_constant_folding(op->opc, ctx->type, s_mask, sh);
|
|
|
|
ctx->s_mask = smask_from_smask(s_mask);
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
return fold_masks(ctx, op);
|
|
|
|
}
|
2021-08-26 23:24:59 +03:00
|
|
|
|
|
|
|
switch (op->opc) {
|
|
|
|
CASE_OP_32_64(sar):
|
|
|
|
/*
|
|
|
|
* Arithmetic right shift will not reduce the number of
|
|
|
|
* input sign repetitions.
|
|
|
|
*/
|
|
|
|
ctx->s_mask = s_mask;
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(shr):
|
|
|
|
/*
|
|
|
|
* If the sign bit is known zero, then logical right shift
|
|
|
|
* will not reduced the number of input sign repetitions.
|
|
|
|
*/
|
|
|
|
sign = (s_mask & -s_mask) >> 1;
|
|
|
|
if (!(z_mask & sign)) {
|
|
|
|
ctx->s_mask = s_mask;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2021-08-26 06:28:53 +03:00
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 23:30:32 +03:00
|
|
|
static bool fold_sub_to_neg(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGOpcode neg_op;
|
|
|
|
bool have_neg;
|
|
|
|
|
|
|
|
if (!arg_is_const(op->args[1]) || arg_info(op->args[1])->val != 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (ctx->type) {
|
|
|
|
case TCG_TYPE_I32:
|
|
|
|
neg_op = INDEX_op_neg_i32;
|
2023-10-26 07:14:04 +03:00
|
|
|
have_neg = true;
|
2021-08-24 23:30:32 +03:00
|
|
|
break;
|
|
|
|
case TCG_TYPE_I64:
|
|
|
|
neg_op = INDEX_op_neg_i64;
|
2023-10-26 07:14:04 +03:00
|
|
|
have_neg = true;
|
2021-08-24 23:30:32 +03:00
|
|
|
break;
|
|
|
|
case TCG_TYPE_V64:
|
|
|
|
case TCG_TYPE_V128:
|
|
|
|
case TCG_TYPE_V256:
|
|
|
|
neg_op = INDEX_op_neg_vec;
|
|
|
|
have_neg = (TCG_TARGET_HAS_neg_vec &&
|
|
|
|
tcg_can_emit_vec_op(neg_op, ctx->type, TCGOP_VECE(op)) > 0);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
if (have_neg) {
|
|
|
|
op->opc = neg_op;
|
|
|
|
op->args[1] = op->args[2];
|
|
|
|
return fold_neg(ctx, op);
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
/* We cannot as yet do_constant_folding with vectors. */
|
|
|
|
static bool fold_sub_vec(OptContext *ctx, TCGOp *op)
|
2021-08-25 22:03:48 +03:00
|
|
|
{
|
2021-12-16 17:07:25 +03:00
|
|
|
if (fold_xx_to_i(ctx, op, 0) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0) ||
|
2021-08-24 23:30:32 +03:00
|
|
|
fold_sub_to_neg(ctx, op)) {
|
2021-08-25 23:02:00 +03:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2021-12-16 17:07:25 +03:00
|
|
|
static bool fold_sub(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2023-10-26 04:39:43 +03:00
|
|
|
if (fold_const2(ctx, op) || fold_sub_vec(ctx, op)) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Fold sub r,x,i to add r,x,-i */
|
|
|
|
if (arg_is_const(op->args[2])) {
|
|
|
|
uint64_t val = arg_info(op->args[2])->val;
|
|
|
|
|
|
|
|
op->opc = (ctx->type == TCG_TYPE_I32
|
|
|
|
? INDEX_op_add_i32 : INDEX_op_add_i64);
|
|
|
|
op->args[2] = arg_new_constant(ctx, -val);
|
|
|
|
}
|
|
|
|
return false;
|
2021-12-16 17:07:25 +03:00
|
|
|
}
|
|
|
|
|
2021-08-26 16:51:39 +03:00
|
|
|
static bool fold_sub2(OptContext *ctx, TCGOp *op)
|
2021-08-24 20:30:38 +03:00
|
|
|
{
|
2021-08-26 16:51:39 +03:00
|
|
|
return fold_addsub2(ctx, op, false);
|
2021-08-24 20:30:38 +03:00
|
|
|
}
|
|
|
|
|
2021-08-26 08:42:19 +03:00
|
|
|
static bool fold_tcg_ld(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
/* We can't do any folding with a load, but we can record bits. */
|
|
|
|
switch (op->opc) {
|
2021-08-26 22:04:46 +03:00
|
|
|
CASE_OP_32_64(ld8s):
|
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(8, 56);
|
|
|
|
break;
|
2021-08-26 08:42:19 +03:00
|
|
|
CASE_OP_32_64(ld8u):
|
|
|
|
ctx->z_mask = MAKE_64BIT_MASK(0, 8);
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(9, 55);
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(ld16s):
|
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(16, 48);
|
2021-08-26 08:42:19 +03:00
|
|
|
break;
|
|
|
|
CASE_OP_32_64(ld16u):
|
|
|
|
ctx->z_mask = MAKE_64BIT_MASK(0, 16);
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(17, 47);
|
|
|
|
break;
|
|
|
|
case INDEX_op_ld32s_i64:
|
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(32, 32);
|
2021-08-26 08:42:19 +03:00
|
|
|
break;
|
|
|
|
case INDEX_op_ld32u_i64:
|
|
|
|
ctx->z_mask = MAKE_64BIT_MASK(0, 32);
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx->s_mask = MAKE_64BIT_MASK(33, 31);
|
2021-08-26 08:42:19 +03:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
static bool fold_tcg_ld_memcopy(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGTemp *dst, *src;
|
|
|
|
intptr_t ofs;
|
|
|
|
TCGType type;
|
|
|
|
|
|
|
|
if (op->args[1] != tcgv_ptr_arg(tcg_env)) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
type = ctx->type;
|
|
|
|
ofs = op->args[2];
|
|
|
|
dst = arg_temp(op->args[0]);
|
|
|
|
src = find_mem_copy_for(ctx, type, ofs);
|
|
|
|
if (src && src->base_type == type) {
|
|
|
|
return tcg_opt_gen_mov(ctx, op, temp_arg(dst), temp_arg(src));
|
|
|
|
}
|
|
|
|
|
|
|
|
reset_ts(ctx, dst);
|
|
|
|
record_mem_copy(ctx, type, dst, ofs, ofs + tcg_type_size(type) - 1);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_tcg_st(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
intptr_t ofs = op->args[2];
|
|
|
|
intptr_t lm1;
|
|
|
|
|
|
|
|
if (op->args[1] != tcgv_ptr_arg(tcg_env)) {
|
|
|
|
remove_mem_copy_all(ctx);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (op->opc) {
|
|
|
|
CASE_OP_32_64(st8):
|
|
|
|
lm1 = 0;
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(st16):
|
|
|
|
lm1 = 1;
|
|
|
|
break;
|
|
|
|
case INDEX_op_st32_i64:
|
|
|
|
case INDEX_op_st_i32:
|
|
|
|
lm1 = 3;
|
|
|
|
break;
|
|
|
|
case INDEX_op_st_i64:
|
|
|
|
lm1 = 7;
|
|
|
|
break;
|
|
|
|
case INDEX_op_st_vec:
|
|
|
|
lm1 = tcg_type_size(ctx->type) - 1;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
g_assert_not_reached();
|
|
|
|
}
|
|
|
|
remove_mem_copy_in(ctx, ofs, ofs + lm1);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool fold_tcg_st_memcopy(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
|
|
|
TCGTemp *src;
|
|
|
|
intptr_t ofs, last;
|
|
|
|
TCGType type;
|
|
|
|
|
|
|
|
if (op->args[1] != tcgv_ptr_arg(tcg_env)) {
|
|
|
|
fold_tcg_st(ctx, op);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
src = arg_temp(op->args[0]);
|
|
|
|
ofs = op->args[2];
|
|
|
|
type = ctx->type;
|
2023-08-24 09:13:06 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Eliminate duplicate stores of a constant.
|
|
|
|
* This happens frequently when the target ISA zero-extends.
|
|
|
|
*/
|
|
|
|
if (ts_is_const(src)) {
|
|
|
|
TCGTemp *prev = find_mem_copy_for(ctx, type, ofs);
|
|
|
|
if (src == prev) {
|
|
|
|
tcg_op_remove(ctx->tcg, op);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
last = ofs + tcg_type_size(type) - 1;
|
|
|
|
remove_mem_copy_in(ctx, ofs, last);
|
|
|
|
record_mem_copy(ctx, type, src, ofs, last);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2021-08-25 22:03:48 +03:00
|
|
|
static bool fold_xor(OptContext *ctx, TCGOp *op)
|
|
|
|
{
|
2021-08-26 17:06:39 +03:00
|
|
|
if (fold_const2_commutative(ctx, op) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xx_to_i(ctx, op, 0) ||
|
2021-08-26 06:28:53 +03:00
|
|
|
fold_xi_to_x(ctx, op, 0) ||
|
2021-08-24 23:18:01 +03:00
|
|
|
fold_xi_to_not(ctx, op, -1)) {
|
2021-08-25 23:02:00 +03:00
|
|
|
return true;
|
|
|
|
}
|
2021-08-26 08:42:19 +03:00
|
|
|
|
|
|
|
ctx->z_mask = arg_info(op->args[1])->z_mask
|
|
|
|
| arg_info(op->args[2])->z_mask;
|
2021-08-26 23:08:54 +03:00
|
|
|
ctx->s_mask = arg_info(op->args[1])->s_mask
|
|
|
|
& arg_info(op->args[2])->s_mask;
|
2021-08-26 08:42:19 +03:00
|
|
|
return fold_masks(ctx, op);
|
2021-08-25 22:03:48 +03:00
|
|
|
}
|
|
|
|
|
2011-07-07 16:37:13 +04:00
|
|
|
/* Propagate constants and copies, fold constant expressions. */
|
2015-06-04 22:53:27 +03:00
|
|
|
void tcg_optimize(TCGContext *s)
|
2011-07-07 16:37:12 +04:00
|
|
|
{
|
2021-08-24 18:17:08 +03:00
|
|
|
int nb_temps, i;
|
2021-08-24 17:38:39 +03:00
|
|
|
TCGOp *op, *op_next;
|
2021-08-24 17:13:45 +03:00
|
|
|
OptContext ctx = { .tcg = s };
|
2012-09-21 21:13:38 +04:00
|
|
|
|
2023-08-24 09:04:24 +03:00
|
|
|
QSIMPLEQ_INIT(&ctx.mem_free);
|
|
|
|
|
2011-07-07 16:37:13 +04:00
|
|
|
/* Array VALS has an element for each temp.
|
|
|
|
If this temp holds a constant then its value is kept in VALS' element.
|
2012-09-11 14:31:21 +04:00
|
|
|
If this temp is a copy of other ones then the other copies are
|
|
|
|
available through the doubly linked circular list. */
|
2011-07-07 16:37:12 +04:00
|
|
|
|
|
|
|
nb_temps = s->nb_temps;
|
2020-03-31 05:52:02 +03:00
|
|
|
for (i = 0; i < nb_temps; ++i) {
|
|
|
|
s->temps[i].state_ptr = NULL;
|
|
|
|
}
|
2011-07-07 16:37:12 +04:00
|
|
|
|
2017-11-02 17:19:14 +03:00
|
|
|
QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
|
2014-09-20 00:49:15 +04:00
|
|
|
TCGOpcode opc = op->opc;
|
2021-08-24 18:17:08 +03:00
|
|
|
const TCGOpDef *def;
|
2021-08-24 21:08:21 +03:00
|
|
|
bool done = false;
|
2014-09-20 00:49:15 +04:00
|
|
|
|
2021-08-24 18:17:08 +03:00
|
|
|
/* Calls are special. */
|
2014-09-20 00:49:15 +04:00
|
|
|
if (opc == INDEX_op_call) {
|
2021-08-24 18:17:08 +03:00
|
|
|
fold_call(&ctx, op);
|
|
|
|
continue;
|
2014-03-23 07:06:52 +04:00
|
|
|
}
|
2021-08-24 18:17:08 +03:00
|
|
|
|
|
|
|
def = &tcg_op_defs[opc];
|
2021-08-24 18:20:27 +03:00
|
|
|
init_arguments(&ctx, op, def->nb_oargs + def->nb_iargs);
|
|
|
|
copy_propagate(&ctx, op, def->nb_oargs, def->nb_iargs);
|
2011-07-07 16:37:13 +04:00
|
|
|
|
2021-08-25 18:00:20 +03:00
|
|
|
/* Pre-compute the type of the operation. */
|
|
|
|
if (def->flags & TCG_OPF_VECTOR) {
|
|
|
|
ctx.type = TCG_TYPE_V64 + TCGOP_VECL(op);
|
|
|
|
} else if (def->flags & TCG_OPF_64BIT) {
|
|
|
|
ctx.type = TCG_TYPE_I64;
|
|
|
|
} else {
|
|
|
|
ctx.type = TCG_TYPE_I32;
|
|
|
|
}
|
|
|
|
|
2021-08-26 22:04:46 +03:00
|
|
|
/* Assume all bits affected, no bits known zero, no sign reps. */
|
2021-08-26 08:42:19 +03:00
|
|
|
ctx.a_mask = -1;
|
|
|
|
ctx.z_mask = -1;
|
2021-08-26 22:04:46 +03:00
|
|
|
ctx.s_mask = 0;
|
optimize: optimize using nonzero bits
This adds two optimizations using the non-zero bit mask. In some cases
involving shifts or ANDs the value can become zero, and can thus be
optimized to a move of zero. Second, useless zero-extension or an
AND with constant can be detected that would only zero bits that are
already zero.
The main advantage of this optimization is that it turns zero-extensions
into moves, thus enabling much better copy propagation (around 1% code
reduction). Here is for example a "test $0xff0000,%ecx + je" before
optimization:
mov_i64 tmp0,rcx
movi_i64 tmp1,$0xff0000
discard cc_src
and_i64 cc_dst,tmp0,tmp1
movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0
and after (without patch on the left, with on the right):
movi_i64 tmp1,$0xff0000 movi_i64 tmp1,$0xff0000
discard cc_src discard cc_src
and_i64 cc_dst,rcx,tmp1 and_i64 cc_dst,rcx,tmp1
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
Other similar cases: "test %eax, %eax + jne" where eax is already 32-bit
(after optimization, without patch on the left, with on the right):
discard cc_src discard cc_src
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
movi_i32 cc_op,$0x1c movi_i32 cc_op,$0x1c
ext32u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,ne,$0x0 brcond_i64 rax,tmp12,ne,$0x0
"test $0x1, %dl + je":
movi_i64 tmp1,$0x1 movi_i64 tmp1,$0x1
discard cc_src discard cc_src
and_i64 cc_dst,rdx,tmp1 and_i64 cc_dst,rdx,tmp1
movi_i32 cc_op,$0x1a movi_i32 cc_op,$0x1a
ext8u_i64 tmp0,cc_dst
movi_i64 tmp12,$0x0 movi_i64 tmp12,$0x0
brcond_i64 tmp0,tmp12,eq,$0x0 brcond_i64 cc_dst,tmp12,eq,$0x0
In some cases TCG even outsmarts GCC. :) Here the input code has
"and $0x2,%eax + movslq %eax,%rbx + test %rbx, %rbx" and the optimizer,
thanks to copy propagation, does the following:
movi_i64 tmp12,$0x2 movi_i64 tmp12,$0x2
and_i64 rax,rax,tmp12 and_i64 rax,rax,tmp12
mov_i64 cc_dst,rax mov_i64 cc_dst,rax
ext32s_i64 tmp0,rax -> nop
mov_i64 rbx,tmp0 -> mov_i64 rbx,cc_dst
and_i64 cc_dst,rbx,rbx -> nop
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-12 03:42:53 +04:00
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2021-08-25 23:05:43 +03:00
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/*
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* Process each opcode.
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* Sorted alphabetically by opcode as much as possible.
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*/
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2014-09-20 00:49:15 +04:00
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switch (opc) {
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2021-12-16 17:07:25 +03:00
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CASE_OP_32_64(add):
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2021-08-25 22:03:48 +03:00
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done = fold_add(&ctx, op);
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break;
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2021-12-16 17:07:25 +03:00
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case INDEX_op_add_vec:
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done = fold_add_vec(&ctx, op);
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break;
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2021-08-26 16:51:39 +03:00
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CASE_OP_32_64(add2):
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done = fold_add2(&ctx, op);
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2021-08-24 20:30:38 +03:00
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break;
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2021-08-25 22:03:48 +03:00
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CASE_OP_32_64_VEC(and):
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done = fold_and(&ctx, op);
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break;
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CASE_OP_32_64_VEC(andc):
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done = fold_andc(&ctx, op);
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break;
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2021-08-24 19:30:59 +03:00
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CASE_OP_32_64(brcond):
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done = fold_brcond(&ctx, op);
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break;
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2021-08-24 19:22:11 +03:00
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case INDEX_op_brcond2_i32:
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done = fold_brcond2(&ctx, op);
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break;
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2021-08-24 21:58:12 +03:00
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CASE_OP_32_64(bswap16):
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CASE_OP_32_64(bswap32):
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case INDEX_op_bswap64_i64:
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done = fold_bswap(&ctx, op);
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break;
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2021-08-24 20:51:34 +03:00
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CASE_OP_32_64(clz):
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CASE_OP_32_64(ctz):
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done = fold_count_zeros(&ctx, op);
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break;
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2021-08-25 22:03:48 +03:00
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CASE_OP_32_64(ctpop):
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done = fold_ctpop(&ctx, op);
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break;
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2021-08-24 20:47:04 +03:00
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CASE_OP_32_64(deposit):
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done = fold_deposit(&ctx, op);
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break;
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2021-08-25 22:03:48 +03:00
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CASE_OP_32_64(div):
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CASE_OP_32_64(divu):
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done = fold_divide(&ctx, op);
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break;
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2021-08-24 22:06:33 +03:00
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case INDEX_op_dup_vec:
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done = fold_dup(&ctx, op);
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break;
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case INDEX_op_dup2_vec:
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done = fold_dup2(&ctx, op);
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break;
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2021-12-16 22:17:46 +03:00
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CASE_OP_32_64_VEC(eqv):
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2021-08-25 22:03:48 +03:00
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done = fold_eqv(&ctx, op);
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break;
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2021-08-24 20:44:53 +03:00
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CASE_OP_32_64(extract):
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done = fold_extract(&ctx, op);
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break;
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2021-08-24 20:41:39 +03:00
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CASE_OP_32_64(extract2):
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done = fold_extract2(&ctx, op);
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break;
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2021-08-25 22:03:48 +03:00
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CASE_OP_32_64(ext8s):
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CASE_OP_32_64(ext16s):
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case INDEX_op_ext32s_i64:
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case INDEX_op_ext_i32_i64:
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done = fold_exts(&ctx, op);
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break;
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CASE_OP_32_64(ext8u):
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CASE_OP_32_64(ext16u):
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case INDEX_op_ext32u_i64:
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case INDEX_op_extu_i32_i64:
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case INDEX_op_extrl_i64_i32:
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case INDEX_op_extrh_i64_i32:
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done = fold_extu(&ctx, op);
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break;
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2021-08-26 22:04:46 +03:00
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CASE_OP_32_64(ld8s):
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2021-08-26 08:42:19 +03:00
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CASE_OP_32_64(ld8u):
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2021-08-26 22:04:46 +03:00
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CASE_OP_32_64(ld16s):
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2021-08-26 08:42:19 +03:00
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CASE_OP_32_64(ld16u):
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2021-08-26 22:04:46 +03:00
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case INDEX_op_ld32s_i64:
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2021-08-26 08:42:19 +03:00
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case INDEX_op_ld32u_i64:
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done = fold_tcg_ld(&ctx, op);
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break;
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2023-08-24 09:04:24 +03:00
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case INDEX_op_ld_i32:
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case INDEX_op_ld_i64:
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case INDEX_op_ld_vec:
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done = fold_tcg_ld_memcopy(&ctx, op);
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break;
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CASE_OP_32_64(st8):
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CASE_OP_32_64(st16):
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case INDEX_op_st32_i64:
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done = fold_tcg_st(&ctx, op);
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break;
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case INDEX_op_st_i32:
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case INDEX_op_st_i64:
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case INDEX_op_st_vec:
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done = fold_tcg_st_memcopy(&ctx, op);
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break;
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2021-08-25 21:06:43 +03:00
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case INDEX_op_mb:
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done = fold_mb(&ctx, op);
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2021-08-24 20:37:24 +03:00
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break;
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2021-08-25 23:05:43 +03:00
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CASE_OP_32_64_VEC(mov):
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done = fold_mov(&ctx, op);
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break;
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2021-08-24 20:37:24 +03:00
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CASE_OP_32_64(movcond):
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done = fold_movcond(&ctx, op);
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2021-08-25 21:06:43 +03:00
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break;
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2021-08-25 22:03:48 +03:00
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CASE_OP_32_64(mul):
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done = fold_mul(&ctx, op);
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break;
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CASE_OP_32_64(mulsh):
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CASE_OP_32_64(muluh):
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done = fold_mul_highpart(&ctx, op);
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break;
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2021-08-26 16:33:04 +03:00
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CASE_OP_32_64(muls2):
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CASE_OP_32_64(mulu2):
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done = fold_multiply2(&ctx, op);
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2021-08-24 20:24:12 +03:00
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break;
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2021-12-16 22:17:46 +03:00
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CASE_OP_32_64_VEC(nand):
|
2021-08-25 22:03:48 +03:00
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done = fold_nand(&ctx, op);
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break;
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CASE_OP_32_64(neg):
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|
done = fold_neg(&ctx, op);
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break;
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2021-12-16 22:17:46 +03:00
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CASE_OP_32_64_VEC(nor):
|
2021-08-25 22:03:48 +03:00
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|
done = fold_nor(&ctx, op);
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break;
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CASE_OP_32_64_VEC(not):
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done = fold_not(&ctx, op);
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break;
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CASE_OP_32_64_VEC(or):
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|
done = fold_or(&ctx, op);
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break;
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CASE_OP_32_64_VEC(orc):
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|
done = fold_orc(&ctx, op);
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break;
|
2023-05-17 06:07:20 +03:00
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|
|
case INDEX_op_qemu_ld_a32_i32:
|
|
|
|
case INDEX_op_qemu_ld_a64_i32:
|
|
|
|
case INDEX_op_qemu_ld_a32_i64:
|
|
|
|
case INDEX_op_qemu_ld_a64_i64:
|
|
|
|
case INDEX_op_qemu_ld_a32_i128:
|
|
|
|
case INDEX_op_qemu_ld_a64_i128:
|
2021-08-25 21:06:43 +03:00
|
|
|
done = fold_qemu_ld(&ctx, op);
|
|
|
|
break;
|
2023-05-17 06:07:20 +03:00
|
|
|
case INDEX_op_qemu_st8_a32_i32:
|
|
|
|
case INDEX_op_qemu_st8_a64_i32:
|
|
|
|
case INDEX_op_qemu_st_a32_i32:
|
|
|
|
case INDEX_op_qemu_st_a64_i32:
|
|
|
|
case INDEX_op_qemu_st_a32_i64:
|
|
|
|
case INDEX_op_qemu_st_a64_i64:
|
|
|
|
case INDEX_op_qemu_st_a32_i128:
|
|
|
|
case INDEX_op_qemu_st_a64_i128:
|
2021-08-25 21:06:43 +03:00
|
|
|
done = fold_qemu_st(&ctx, op);
|
|
|
|
break;
|
2021-08-25 22:03:48 +03:00
|
|
|
CASE_OP_32_64(rem):
|
|
|
|
CASE_OP_32_64(remu):
|
|
|
|
done = fold_remainder(&ctx, op);
|
|
|
|
break;
|
|
|
|
CASE_OP_32_64(rotl):
|
|
|
|
CASE_OP_32_64(rotr):
|
|
|
|
CASE_OP_32_64(sar):
|
|
|
|
CASE_OP_32_64(shl):
|
|
|
|
CASE_OP_32_64(shr):
|
|
|
|
done = fold_shift(&ctx, op);
|
|
|
|
break;
|
2021-08-24 19:35:30 +03:00
|
|
|
CASE_OP_32_64(setcond):
|
|
|
|
done = fold_setcond(&ctx, op);
|
|
|
|
break;
|
2023-08-05 02:24:04 +03:00
|
|
|
CASE_OP_32_64(negsetcond):
|
|
|
|
done = fold_negsetcond(&ctx, op);
|
|
|
|
break;
|
2021-08-24 19:09:35 +03:00
|
|
|
case INDEX_op_setcond2_i32:
|
|
|
|
done = fold_setcond2(&ctx, op);
|
|
|
|
break;
|
2021-08-24 20:44:53 +03:00
|
|
|
CASE_OP_32_64(sextract):
|
|
|
|
done = fold_sextract(&ctx, op);
|
|
|
|
break;
|
2021-12-16 17:07:25 +03:00
|
|
|
CASE_OP_32_64(sub):
|
2021-08-25 22:03:48 +03:00
|
|
|
done = fold_sub(&ctx, op);
|
|
|
|
break;
|
2021-12-16 17:07:25 +03:00
|
|
|
case INDEX_op_sub_vec:
|
|
|
|
done = fold_sub_vec(&ctx, op);
|
|
|
|
break;
|
2021-08-26 16:51:39 +03:00
|
|
|
CASE_OP_32_64(sub2):
|
|
|
|
done = fold_sub2(&ctx, op);
|
2021-08-24 20:30:38 +03:00
|
|
|
break;
|
2021-08-25 22:03:48 +03:00
|
|
|
CASE_OP_32_64_VEC(xor):
|
|
|
|
done = fold_xor(&ctx, op);
|
2021-08-24 08:30:17 +03:00
|
|
|
break;
|
2021-08-25 23:05:43 +03:00
|
|
|
default:
|
|
|
|
break;
|
2021-08-24 08:30:17 +03:00
|
|
|
}
|
|
|
|
|
2021-08-24 21:08:21 +03:00
|
|
|
if (!done) {
|
|
|
|
finish_folding(&ctx, op);
|
|
|
|
}
|
2011-07-07 16:37:12 +04:00
|
|
|
}
|
|
|
|
}
|