2017-07-14 11:25:40 +03:00
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/*
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* Generic intermediate code generation.
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*
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* Copyright (C) 2016-2017 Lluís Vilanova <vilanova@ac.upc.edu>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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2023-04-02 07:16:39 +03:00
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#include "qemu/log.h"
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2017-07-14 11:25:40 +03:00
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#include "qemu/error-report.h"
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#include "exec/exec-all.h"
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#include "exec/translator.h"
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2023-12-06 01:02:11 +03:00
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#include "exec/cpu_ldst.h"
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2018-12-08 01:35:56 +03:00
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#include "exec/plugin-gen.h"
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2024-04-03 04:13:58 +03:00
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#include "exec/cpu_ldst.h"
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2023-04-02 07:16:39 +03:00
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#include "tcg/tcg-op-common.h"
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2023-09-14 21:57:14 +03:00
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#include "internal-target.h"
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2023-04-02 03:09:47 +03:00
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2023-09-14 18:06:14 +03:00
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static void set_can_do_io(DisasContextBase *db, bool val)
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2023-04-02 03:09:47 +03:00
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{
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2024-04-07 01:17:57 +03:00
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QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1);
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tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env,
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offsetof(ArchCPU, parent_obj.neg.can_do_io) -
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offsetof(ArchCPU, env));
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2023-04-02 03:09:47 +03:00
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}
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2023-05-23 09:08:01 +03:00
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bool translator_io_start(DisasContextBase *db)
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{
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/*
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* Ensure that this instruction will be the last in the TB.
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* The target may override this to something more forceful.
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*/
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if (db->is_jmp == DISAS_NEXT) {
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db->is_jmp = DISAS_TOO_MANY;
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}
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return true;
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}
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2023-09-14 18:06:14 +03:00
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static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags)
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2023-04-02 03:09:47 +03:00
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{
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2023-09-14 17:39:07 +03:00
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TCGv_i32 count = NULL;
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2023-04-02 03:09:47 +03:00
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TCGOp *icount_start_insn = NULL;
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2023-09-14 17:39:07 +03:00
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if ((cflags & CF_USE_ICOUNT) || !(cflags & CF_NOIRQ)) {
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count = tcg_temp_new_i32();
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2023-09-14 02:37:36 +03:00
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tcg_gen_ld_i32(count, tcg_env,
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2023-09-13 03:47:56 +03:00
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offsetof(ArchCPU, parent_obj.neg.icount_decr.u32)
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- offsetof(ArchCPU, env));
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2023-09-14 17:39:07 +03:00
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}
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2023-04-02 03:09:47 +03:00
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if (cflags & CF_USE_ICOUNT) {
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/*
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* We emit a sub with a dummy immediate argument. Keep the insn index
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* of the sub so that we later (when we know the actual insn count)
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* can update the argument with the actual insn count.
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*/
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tcg_gen_sub_i32(count, count, tcg_constant_i32(0));
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icount_start_insn = tcg_last_op();
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}
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/*
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* Emit the check against icount_decr.u32 to see if we should exit
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* unless we suppress the check with CF_NOIRQ. If we are using
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* icount and have suppressed interruption the higher level code
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* should have ensured we don't run more instructions than the
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* budget.
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*/
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if (cflags & CF_NOIRQ) {
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tcg_ctx->exitreq_label = NULL;
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} else {
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tcg_ctx->exitreq_label = gen_new_label();
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tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
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}
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if (cflags & CF_USE_ICOUNT) {
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2023-09-14 02:37:36 +03:00
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tcg_gen_st16_i32(count, tcg_env,
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2023-09-13 03:47:56 +03:00
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offsetof(ArchCPU, parent_obj.neg.icount_decr.u16.low)
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- offsetof(ArchCPU, env));
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2023-04-02 03:09:47 +03:00
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}
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return icount_start_insn;
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}
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static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags,
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TCGOp *icount_start_insn, int num_insns)
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{
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if (cflags & CF_USE_ICOUNT) {
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/*
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* Update the num_insn immediate parameter now that we know
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* the actual insn count.
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*/
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tcg_set_insn_param(icount_start_insn, 2,
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tcgv_i32_arg(tcg_constant_i32(num_insns)));
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}
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if (tcg_ctx->exitreq_label) {
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gen_set_label(tcg_ctx->exitreq_label);
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tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED);
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}
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}
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2023-06-21 16:56:31 +03:00
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bool translator_use_goto_tb(DisasContextBase *db, vaddr dest)
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2021-06-21 01:28:18 +03:00
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{
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2021-07-18 01:18:41 +03:00
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/* Suppress goto_tb if requested. */
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if (tb_cflags(db->tb) & CF_NO_GOTO_TB) {
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return false;
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}
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2021-06-21 01:28:18 +03:00
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/* Check for the dest on the same page as the start of the TB. */
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return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0;
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}
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2023-01-29 04:19:22 +03:00
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void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
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2023-06-21 16:56:31 +03:00
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vaddr pc, void *host_pc, const TranslatorOps *ops,
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DisasContextBase *db)
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2017-07-14 11:25:40 +03:00
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{
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2021-06-30 05:04:34 +03:00
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uint32_t cflags = tb_cflags(tb);
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2023-04-02 03:09:47 +03:00
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TCGOp *icount_start_insn;
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2024-04-07 01:17:57 +03:00
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TCGOp *first_insn_start = NULL;
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2018-12-08 01:35:56 +03:00
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bool plugin_enabled;
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2018-09-12 11:19:10 +03:00
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2017-07-14 11:25:40 +03:00
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/* Initialize DisasContext */
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db->tb = tb;
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2022-08-11 23:48:03 +03:00
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db->pc_first = pc;
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db->pc_next = pc;
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2017-07-14 11:25:40 +03:00
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db->is_jmp = DISAS_NEXT;
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db->num_insns = 0;
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2023-01-29 04:19:22 +03:00
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db->max_insns = *max_insns;
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2021-07-19 23:43:46 +03:00
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db->singlestep_enabled = cflags & CF_SINGLE_STEP;
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2024-04-06 23:42:10 +03:00
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db->insn_start = NULL;
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2024-04-03 21:26:18 +03:00
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db->fake_insn = false;
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2022-08-11 07:39:29 +03:00
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db->host_addr[0] = host_pc;
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db->host_addr[1] = NULL;
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2024-04-03 08:46:33 +03:00
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db->record_start = 0;
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db->record_len = 0;
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2022-08-11 07:39:29 +03:00
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2018-02-20 04:51:58 +03:00
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ops->init_disas_context(db, cpu);
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2017-07-14 11:25:40 +03:00
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tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
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/* Start translating. */
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2023-09-14 18:06:14 +03:00
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icount_start_insn = gen_tb_start(db, cflags);
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2017-07-14 11:25:40 +03:00
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ops->tb_start(db, cpu);
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tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
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2024-04-03 22:31:49 +03:00
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plugin_enabled = plugin_gen_tb_start(cpu, db);
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2023-10-09 19:40:59 +03:00
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db->plugin_enabled = plugin_enabled;
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2018-12-08 01:35:56 +03:00
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2017-07-14 11:25:40 +03:00
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while (true) {
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2023-01-29 08:11:20 +03:00
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*max_insns = ++db->num_insns;
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2017-07-14 11:25:40 +03:00
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ops->insn_start(db, cpu);
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2024-04-06 23:42:10 +03:00
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db->insn_start = tcg_last_op();
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2024-04-07 01:17:57 +03:00
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if (first_insn_start == NULL) {
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first_insn_start = db->insn_start;
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}
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2017-07-14 11:25:40 +03:00
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tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
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2018-12-08 01:35:56 +03:00
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if (plugin_enabled) {
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plugin_gen_insn_start(cpu, db);
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}
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2023-11-10 19:21:23 +03:00
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/*
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* Disassemble one instruction. The translate_insn hook should
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* update db->pc_next and db->is_jmp to indicate what should be
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* done next -- either exiting this loop or locate the start of
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* the next instruction.
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*/
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2023-09-14 17:48:39 +03:00
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ops->translate_insn(db, cpu);
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2017-07-14 11:25:40 +03:00
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2018-12-08 01:35:56 +03:00
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/*
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* We can't instrument after instructions that change control
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* flow although this only really affects post-load operations.
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2023-01-24 21:01:24 +03:00
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*
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* Calling plugin_gen_insn_end() before we possibly stop translation
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* is important. Even if this ends up as dead code, plugin generation
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* needs to see a matching plugin_gen_insn_{start,end}() pair in order
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* to accurately track instrumented helpers that might access memory.
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2018-12-08 01:35:56 +03:00
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*/
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if (plugin_enabled) {
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plugin_gen_insn_end();
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}
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2023-01-24 21:01:24 +03:00
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/* Stop translation if translate_insn so indicated. */
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if (db->is_jmp != DISAS_NEXT) {
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break;
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}
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2017-07-14 11:25:40 +03:00
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/* Stop translation if the output buffer is full,
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or we have executed all of the allowed instructions. */
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2018-02-20 04:51:58 +03:00
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if (tcg_op_buf_full() || db->num_insns >= db->max_insns) {
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2017-07-14 11:25:40 +03:00
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db->is_jmp = DISAS_TOO_MANY;
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break;
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}
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}
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/* Emit code to exit the TB, as indicated by db->is_jmp. */
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ops->tb_stop(db, cpu);
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2023-04-02 03:09:47 +03:00
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gen_tb_end(tb, cflags, icount_start_insn, db->num_insns);
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2017-07-14 11:25:40 +03:00
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2024-04-07 01:17:57 +03:00
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/*
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* Manage can_do_io for the translation block: set to false before
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* the first insn and set to true before the last insn.
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*/
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if (db->num_insns == 1) {
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tcg_debug_assert(first_insn_start == db->insn_start);
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} else {
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tcg_debug_assert(first_insn_start != db->insn_start);
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tcg_ctx->emit_before_op = first_insn_start;
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set_can_do_io(db, false);
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}
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tcg_ctx->emit_before_op = db->insn_start;
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set_can_do_io(db, true);
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tcg_ctx->emit_before_op = NULL;
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2018-12-08 01:35:56 +03:00
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if (plugin_enabled) {
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2023-10-09 19:41:01 +03:00
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plugin_gen_tb_end(cpu, db->num_insns);
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2018-12-08 01:35:56 +03:00
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}
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2017-07-14 11:25:40 +03:00
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/* The disas_log hook may use these values rather than recompute. */
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2020-10-29 19:49:05 +03:00
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tb->size = db->pc_next - db->pc_first;
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tb->icount = db->num_insns;
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2017-07-14 11:25:40 +03:00
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
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&& qemu_log_in_addr_range(db->pc_first)) {
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2022-04-17 21:29:47 +03:00
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FILE *logfile = qemu_log_trylock();
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2022-04-17 21:29:49 +03:00
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if (logfile) {
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fprintf(logfile, "----------------\n");
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2022-04-17 21:29:52 +03:00
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ops->disas_log(db, cpu, logfile);
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2022-04-17 21:29:49 +03:00
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fprintf(logfile, "\n");
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qemu_log_unlock(logfile);
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}
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2017-07-14 11:25:40 +03:00
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}
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}
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2021-08-05 23:48:35 +03:00
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2024-04-03 07:26:33 +03:00
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static bool translator_ld(CPUArchState *env, DisasContextBase *db,
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void *dest, vaddr pc, size_t len)
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2021-08-05 23:48:35 +03:00
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{
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2024-04-03 07:26:33 +03:00
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TranslationBlock *tb = db->tb;
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vaddr last = pc + len - 1;
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2022-08-11 07:39:29 +03:00
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void *host;
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2024-04-03 07:26:33 +03:00
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vaddr base;
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2021-08-05 23:48:35 +03:00
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2022-08-11 07:39:29 +03:00
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/* Use slow path if first page is MMIO. */
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2022-09-20 14:21:40 +03:00
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if (unlikely(tb_page_addr0(tb) == -1)) {
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2024-04-03 08:28:20 +03:00
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/* We capped translation with first page MMIO in tb_gen_code. */
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tcg_debug_assert(db->max_insns == 1);
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2024-04-03 07:26:33 +03:00
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return false;
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2021-08-05 23:48:35 +03:00
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}
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2022-08-11 07:39:29 +03:00
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2024-04-03 07:26:33 +03:00
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host = db->host_addr[0];
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base = db->pc_first;
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2023-02-06 22:26:29 +03:00
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2024-04-03 07:26:33 +03:00
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if (likely(((base ^ last) & TARGET_PAGE_MASK) == 0)) {
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/* Entire read is from the first page. */
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memcpy(dest, host + (pc - base), len);
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return true;
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}
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if (unlikely(((base ^ pc) & TARGET_PAGE_MASK) == 0)) {
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/* Read begins on the first page and extends to the second. */
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size_t len0 = -(pc | TARGET_PAGE_MASK);
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memcpy(dest, host + (pc - base), len0);
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pc += len0;
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dest += len0;
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len -= len0;
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}
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/*
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* The read must conclude on the second page and not extend to a third.
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*
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* TODO: We could allow the two pages to be virtually discontiguous,
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* since we already allow the two pages to be physically discontiguous.
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* The only reasonable use case would be executing an insn at the end
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* of the address space wrapping around to the beginning. For that,
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* we would need to know the current width of the address space.
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* In the meantime, assert.
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*/
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base = (base & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
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assert(((base ^ pc) & TARGET_PAGE_MASK) == 0);
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|
|
assert(((base ^ last) & TARGET_PAGE_MASK) == 0);
|
|
|
|
host = db->host_addr[1];
|
|
|
|
|
|
|
|
if (host == NULL) {
|
|
|
|
tb_page_addr_t page0, old_page1, new_page1;
|
|
|
|
|
|
|
|
new_page1 = get_page_addr_code_hostp(env, base, &db->host_addr[1]);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the second page is MMIO, treat as if the first page
|
|
|
|
* was MMIO as well, so that we do not cache the TB.
|
|
|
|
*/
|
|
|
|
if (unlikely(new_page1 == -1)) {
|
|
|
|
tb_unlock_pages(tb);
|
|
|
|
tb_set_page_addr0(tb, -1);
|
2024-04-03 08:28:20 +03:00
|
|
|
/* Require that this be the final insn. */
|
|
|
|
db->max_insns = db->num_insns;
|
2024-04-03 07:26:33 +03:00
|
|
|
return false;
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
/*
|
|
|
|
* If this is not the first time around, and page1 matches,
|
|
|
|
* then we already have the page locked. Alternately, we're
|
|
|
|
* not doing anything to prevent the PTE from changing, so
|
|
|
|
* we might wind up with a different page, requiring us to
|
|
|
|
* re-do the locking.
|
|
|
|
*/
|
|
|
|
old_page1 = tb_page_addr1(tb);
|
|
|
|
if (likely(new_page1 != old_page1)) {
|
|
|
|
page0 = tb_page_addr0(tb);
|
|
|
|
if (unlikely(old_page1 != -1)) {
|
|
|
|
tb_unlock_page1(page0, old_page1);
|
|
|
|
}
|
|
|
|
tb_set_page_addr1(tb, new_page1);
|
|
|
|
tb_lock_page1(page0, new_page1);
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2024-04-03 07:26:33 +03:00
|
|
|
host = db->host_addr[1];
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
memcpy(dest, host + (pc - base), len);
|
|
|
|
return true;
|
2021-08-05 23:48:35 +03:00
|
|
|
}
|
|
|
|
|
2024-04-03 08:46:33 +03:00
|
|
|
static void record_save(DisasContextBase *db, vaddr pc,
|
|
|
|
const void *from, int size)
|
|
|
|
{
|
|
|
|
int offset;
|
|
|
|
|
|
|
|
/* Do not record probes before the start of TB. */
|
|
|
|
if (pc < db->pc_first) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* In translator_access, we verified that pc is within 2 pages
|
|
|
|
* of pc_first, thus this will never overflow.
|
|
|
|
*/
|
|
|
|
offset = pc - db->pc_first;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Either the first or second page may be I/O. If it is the second,
|
|
|
|
* then the first byte we need to record will be at a non-zero offset.
|
|
|
|
* In either case, we should not need to record but a single insn.
|
|
|
|
*/
|
|
|
|
if (db->record_len == 0) {
|
|
|
|
db->record_start = offset;
|
|
|
|
db->record_len = size;
|
|
|
|
} else {
|
|
|
|
assert(offset == db->record_start + db->record_len);
|
|
|
|
assert(db->record_len + size <= sizeof(db->record));
|
|
|
|
db->record_len += size;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(db->record + (offset - db->record_start), from, size);
|
|
|
|
}
|
|
|
|
|
2024-04-03 11:10:50 +03:00
|
|
|
size_t translator_st_len(const DisasContextBase *db)
|
|
|
|
{
|
|
|
|
return db->fake_insn ? db->record_len : db->tb->size;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool translator_st(const DisasContextBase *db, void *dest,
|
|
|
|
vaddr addr, size_t len)
|
|
|
|
{
|
|
|
|
size_t offset, offset_end;
|
|
|
|
|
|
|
|
if (addr < db->pc_first) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
offset = addr - db->pc_first;
|
|
|
|
offset_end = offset + len;
|
|
|
|
if (offset_end > translator_st_len(db)) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!db->fake_insn) {
|
|
|
|
size_t offset_page1 = -(db->pc_first | TARGET_PAGE_MASK);
|
|
|
|
|
|
|
|
/* Get all the bytes from the first page. */
|
|
|
|
if (db->host_addr[0]) {
|
|
|
|
if (offset_end <= offset_page1) {
|
|
|
|
memcpy(dest, db->host_addr[0] + offset, len);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
if (offset < offset_page1) {
|
|
|
|
size_t len0 = offset_page1 - offset;
|
|
|
|
memcpy(dest, db->host_addr[0] + offset, len0);
|
|
|
|
offset += len0;
|
|
|
|
dest += len0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get any bytes from the second page. */
|
|
|
|
if (db->host_addr[1] && offset >= offset_page1) {
|
|
|
|
memcpy(dest, db->host_addr[1] + (offset - offset_page1),
|
|
|
|
offset_end - offset);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Else get recorded bytes. */
|
|
|
|
if (db->record_len != 0 &&
|
|
|
|
offset >= db->record_start &&
|
|
|
|
offset_end <= db->record_start + db->record_len) {
|
|
|
|
memcpy(dest, db->record + (offset - db->record_start),
|
|
|
|
offset_end - offset);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2024-04-03 04:13:58 +03:00
|
|
|
uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, vaddr pc)
|
2022-08-11 07:39:29 +03:00
|
|
|
{
|
2024-04-03 07:26:33 +03:00
|
|
|
uint8_t raw;
|
2022-08-11 07:39:29 +03:00
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
if (!translator_ld(env, db, &raw, pc, sizeof(raw))) {
|
|
|
|
raw = cpu_ldub_code(env, pc);
|
2024-04-03 08:46:33 +03:00
|
|
|
record_save(db, pc, &raw, sizeof(raw));
|
2021-08-05 23:48:35 +03:00
|
|
|
}
|
2024-04-03 07:26:33 +03:00
|
|
|
return raw;
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2021-08-05 23:48:35 +03:00
|
|
|
|
2024-04-03 04:13:58 +03:00
|
|
|
uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, vaddr pc)
|
2022-08-11 07:39:29 +03:00
|
|
|
{
|
2024-04-03 07:26:33 +03:00
|
|
|
uint16_t raw, tgt;
|
2021-08-05 23:48:35 +03:00
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
|
|
|
|
tgt = tswap16(raw);
|
|
|
|
} else {
|
|
|
|
tgt = cpu_lduw_code(env, pc);
|
|
|
|
raw = tswap16(tgt);
|
2024-04-03 08:46:33 +03:00
|
|
|
record_save(db, pc, &raw, sizeof(raw));
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2024-04-03 07:26:33 +03:00
|
|
|
return tgt;
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
|
|
|
|
2024-04-03 04:13:58 +03:00
|
|
|
uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, vaddr pc)
|
2022-08-11 07:39:29 +03:00
|
|
|
{
|
2024-04-03 07:26:33 +03:00
|
|
|
uint32_t raw, tgt;
|
2022-08-11 07:39:29 +03:00
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
|
|
|
|
tgt = tswap32(raw);
|
|
|
|
} else {
|
|
|
|
tgt = cpu_ldl_code(env, pc);
|
|
|
|
raw = tswap32(tgt);
|
2024-04-03 08:46:33 +03:00
|
|
|
record_save(db, pc, &raw, sizeof(raw));
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2024-04-03 07:26:33 +03:00
|
|
|
return tgt;
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
|
|
|
|
2024-04-03 04:13:58 +03:00
|
|
|
uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, vaddr pc)
|
2022-08-11 07:39:29 +03:00
|
|
|
{
|
2024-04-03 07:26:33 +03:00
|
|
|
uint64_t raw, tgt;
|
2022-08-11 07:39:29 +03:00
|
|
|
|
2024-04-03 07:26:33 +03:00
|
|
|
if (translator_ld(env, db, &raw, pc, sizeof(raw))) {
|
|
|
|
tgt = tswap64(raw);
|
|
|
|
} else {
|
|
|
|
tgt = cpu_ldq_code(env, pc);
|
|
|
|
raw = tswap64(tgt);
|
2024-04-03 08:46:33 +03:00
|
|
|
record_save(db, pc, &raw, sizeof(raw));
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2024-04-03 07:26:33 +03:00
|
|
|
return tgt;
|
2022-08-11 07:39:29 +03:00
|
|
|
}
|
2023-04-02 06:13:56 +03:00
|
|
|
|
2024-04-03 04:27:14 +03:00
|
|
|
void translator_fake_ldb(DisasContextBase *db, vaddr pc, uint8_t insn8)
|
2023-04-02 06:13:56 +03:00
|
|
|
{
|
2024-04-03 08:46:33 +03:00
|
|
|
assert(pc >= db->pc_first);
|
2024-04-03 21:26:18 +03:00
|
|
|
db->fake_insn = true;
|
2024-04-03 08:46:33 +03:00
|
|
|
record_save(db, pc, &insn8, sizeof(insn8));
|
2023-04-02 06:13:56 +03:00
|
|
|
}
|