2003-11-23 17:55:54 +03:00
|
|
|
/*
|
|
|
|
* PPC emulation micro-operations for qemu.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2003 Jocelyn Mayer
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, write to the Free Software
|
|
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
|
|
*/
|
|
|
|
|
2004-04-13 00:39:29 +04:00
|
|
|
//#define DEBUG_OP
|
|
|
|
|
2003-11-23 17:55:54 +03:00
|
|
|
#include "config.h"
|
|
|
|
#include "exec.h"
|
|
|
|
|
|
|
|
#define regs (env)
|
|
|
|
#define Ts0 (int32_t)T0
|
|
|
|
#define Ts1 (int32_t)T1
|
|
|
|
#define Ts2 (int32_t)T2
|
|
|
|
|
2003-11-23 19:58:08 +03:00
|
|
|
#define FT0 (env->ft0)
|
2004-01-04 17:57:11 +03:00
|
|
|
#define FT1 (env->ft1)
|
|
|
|
#define FT2 (env->ft2)
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
#define PPC_OP(name) void glue(op_, name)(void)
|
2003-11-23 17:55:54 +03:00
|
|
|
|
2003-11-23 19:58:08 +03:00
|
|
|
#define REG 0
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 1
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 2
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 3
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 4
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 5
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 6
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 7
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 8
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 9
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 10
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 11
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 12
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 13
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 14
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 15
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 16
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 17
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 18
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 19
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 20
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 21
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 22
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 23
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 24
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 25
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 26
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 27
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 28
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 29
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 30
|
|
|
|
#include "op_template.h"
|
|
|
|
|
|
|
|
#define REG 31
|
|
|
|
#include "op_template.h"
|
|
|
|
|
2003-11-23 17:55:54 +03:00
|
|
|
/* PPC state maintenance operations */
|
|
|
|
/* set_Rc0 */
|
|
|
|
PPC_OP(set_Rc0)
|
|
|
|
{
|
|
|
|
uint32_t tmp;
|
|
|
|
|
|
|
|
if (Ts0 < 0) {
|
|
|
|
tmp = 0x08;
|
|
|
|
} else if (Ts0 > 0) {
|
|
|
|
tmp = 0x04;
|
|
|
|
} else {
|
|
|
|
tmp = 0x02;
|
|
|
|
}
|
|
|
|
tmp |= xer_ov;
|
2004-01-05 01:58:38 +03:00
|
|
|
env->crf[0] = tmp;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* reset_Rc0 */
|
|
|
|
PPC_OP(reset_Rc0)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
env->crf[0] = 0x02 | xer_ov;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* set_Rc0_1 */
|
|
|
|
PPC_OP(set_Rc0_1)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
env->crf[0] = 0x04 | xer_ov;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-04 17:57:11 +03:00
|
|
|
/* Set Rc1 (for floating point arithmetic) */
|
|
|
|
PPC_OP(set_Rc1)
|
|
|
|
{
|
|
|
|
env->crf[1] = regs->fpscr[7];
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Constants load */
|
2003-11-23 17:55:54 +03:00
|
|
|
PPC_OP(set_T0)
|
|
|
|
{
|
|
|
|
T0 = PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(set_T1)
|
|
|
|
{
|
|
|
|
T1 = PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(set_T2)
|
|
|
|
{
|
|
|
|
T2 = PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Generate exceptions */
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(raise_exception_err)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
do_raise_exception_err(PARAM(1), PARAM(2));
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(raise_exception)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
do_raise_exception(PARAM(1));
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(update_nip)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-02-21 17:10:04 +03:00
|
|
|
env->nip = PARAM(1);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2004-04-13 00:39:29 +04:00
|
|
|
PPC_OP(debug)
|
|
|
|
{
|
|
|
|
env->nip = PARAM(1);
|
|
|
|
#if defined (DEBUG_OP)
|
|
|
|
dump_state();
|
|
|
|
#endif
|
2004-05-21 16:59:32 +04:00
|
|
|
do_raise_exception(EXCP_DEBUG);
|
2004-04-13 00:39:29 +04:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Segment registers load and store with immediate index */
|
|
|
|
PPC_OP(load_srin)
|
|
|
|
{
|
|
|
|
T0 = regs->sr[T1 >> 28];
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_srin)
|
|
|
|
{
|
2004-05-24 02:18:12 +04:00
|
|
|
do_store_sr(T1 >> 28);
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_sdr1)
|
|
|
|
{
|
|
|
|
T0 = regs->sdr1;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(store_sdr1)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
regs->sdr1 = T0;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(exit_tb)
|
|
|
|
{
|
|
|
|
EXIT_TB();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Load/store special registers */
|
2003-11-23 17:55:54 +03:00
|
|
|
PPC_OP(load_cr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_load_cr();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_cr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_store_cr(PARAM(1));
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_xer_cr)
|
|
|
|
{
|
|
|
|
T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(clear_xer_cr)
|
|
|
|
{
|
|
|
|
xer_so = 0;
|
|
|
|
xer_ov = 0;
|
|
|
|
xer_ca = 0;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_xer_bc)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
T1 = xer_bc;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_xer)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_load_xer();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_xer)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_store_xer();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_msr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_load_msr();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_msr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_store_msr();
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* SPR */
|
|
|
|
PPC_OP(load_spr)
|
|
|
|
{
|
|
|
|
T0 = regs->spr[PARAM(1)];
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_spr)
|
|
|
|
{
|
|
|
|
regs->spr[PARAM(1)] = T0;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_lr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
T0 = regs->lr;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_lr)
|
|
|
|
{
|
|
|
|
regs->lr = T0;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_ctr)
|
|
|
|
{
|
|
|
|
T0 = regs->ctr;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_ctr)
|
|
|
|
{
|
|
|
|
regs->ctr = T0;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(load_tbl)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
T0 = cpu_ppc_load_tbl(regs);
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(load_tbu)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
T0 = cpu_ppc_load_tbu(regs);
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(store_tbl)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
cpu_ppc_store_tbl(regs, T0);
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(store_tbu)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
cpu_ppc_store_tbu(regs, T0);
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-05-21 16:59:32 +04:00
|
|
|
PPC_OP(load_decr)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
T0 = cpu_ppc_load_decr(regs);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
2004-05-21 16:59:32 +04:00
|
|
|
|
|
|
|
PPC_OP(store_decr)
|
|
|
|
{
|
|
|
|
cpu_ppc_store_decr(regs, T0);
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_ibat)
|
|
|
|
{
|
|
|
|
T0 = regs->IBAT[PARAM(1)][PARAM(2)];
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_ibat)
|
|
|
|
{
|
2004-05-24 02:18:12 +04:00
|
|
|
do_store_ibat(PARAM(1), PARAM(2));
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(load_dbat)
|
|
|
|
{
|
|
|
|
T0 = regs->DBAT[PARAM(1)][PARAM(2)];
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_dbat)
|
|
|
|
{
|
2004-05-24 02:18:12 +04:00
|
|
|
do_store_dbat(PARAM(1), PARAM(2));
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2004-01-04 17:57:11 +03:00
|
|
|
/* FPSCR */
|
|
|
|
PPC_OP(load_fpscr)
|
|
|
|
{
|
|
|
|
do_load_fpscr();
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(store_fpscr)
|
|
|
|
{
|
|
|
|
do_store_fpscr(PARAM(1));
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(reset_scrfx)
|
|
|
|
{
|
|
|
|
regs->fpscr[7] &= ~0x8;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2003-11-23 17:55:54 +03:00
|
|
|
/* crf operations */
|
|
|
|
PPC_OP(getbit_T0)
|
|
|
|
{
|
|
|
|
T0 = (T0 >> PARAM(1)) & 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(getbit_T1)
|
|
|
|
{
|
|
|
|
T1 = (T1 >> PARAM(1)) & 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(setcrfbit)
|
|
|
|
{
|
|
|
|
T1 = (T1 & PARAM(1)) | (T0 << PARAM(2));
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Branch */
|
2004-01-05 01:58:38 +03:00
|
|
|
#define EIP regs->nip
|
|
|
|
|
2004-02-21 18:35:00 +03:00
|
|
|
PPC_OP(setlr)
|
|
|
|
{
|
|
|
|
regs->lr = PARAM1;
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(b)
|
|
|
|
{
|
|
|
|
JUMP_TB(b1, PARAM1, 0, PARAM2);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(b_T1)
|
|
|
|
{
|
2005-06-05 02:19:02 +04:00
|
|
|
regs->nip = T1 & ~3;
|
2004-02-21 18:35:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(btest)
|
|
|
|
{
|
|
|
|
if (T0) {
|
|
|
|
JUMP_TB(btest, PARAM1, 0, PARAM2);
|
|
|
|
} else {
|
|
|
|
JUMP_TB(btest, PARAM1, 1, PARAM3);
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(btest_T1)
|
|
|
|
{
|
|
|
|
if (T0) {
|
|
|
|
regs->nip = T1 & ~3;
|
|
|
|
} else {
|
|
|
|
regs->nip = PARAM1;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(movl_T1_ctr)
|
|
|
|
{
|
|
|
|
T1 = regs->ctr;
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(movl_T1_lr)
|
|
|
|
{
|
|
|
|
T1 = regs->lr;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* tests with result in T0 */
|
|
|
|
|
|
|
|
PPC_OP(test_ctr)
|
|
|
|
{
|
2004-02-22 16:41:47 +03:00
|
|
|
T0 = regs->ctr;
|
2004-02-21 18:35:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_ctr_true)
|
|
|
|
{
|
|
|
|
T0 = (regs->ctr != 0 && (T0 & PARAM(1)) != 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_ctr_false)
|
|
|
|
{
|
|
|
|
T0 = (regs->ctr != 0 && (T0 & PARAM(1)) == 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_ctrz)
|
|
|
|
{
|
|
|
|
T0 = (regs->ctr == 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_ctrz_true)
|
|
|
|
{
|
|
|
|
T0 = (regs->ctr == 0 && (T0 & PARAM(1)) != 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_ctrz_false)
|
|
|
|
{
|
|
|
|
T0 = (regs->ctr == 0 && (T0 & PARAM(1)) == 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_true)
|
|
|
|
{
|
2004-02-22 16:41:47 +03:00
|
|
|
T0 = (T0 & PARAM(1));
|
2004-02-21 18:35:00 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(test_false)
|
|
|
|
{
|
|
|
|
T0 = ((T0 & PARAM(1)) == 0);
|
|
|
|
}
|
2003-11-23 17:55:54 +03:00
|
|
|
|
|
|
|
/* CTR maintenance */
|
|
|
|
PPC_OP(dec_ctr)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
regs->ctr--;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Integer arithmetic ***/
|
|
|
|
/* add */
|
|
|
|
PPC_OP(add)
|
|
|
|
{
|
|
|
|
T0 += T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(addo)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 += T1;
|
|
|
|
if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add carrying */
|
|
|
|
PPC_OP(addc)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 += T1;
|
|
|
|
if (T0 < T2) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(addco)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 += T1;
|
|
|
|
if (T0 < T2) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add extended */
|
|
|
|
/* candidate for helper (too long) */
|
|
|
|
PPC_OP(adde)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 += T1 + xer_ca;
|
|
|
|
if (T0 < T2 || (xer_ca == 1 && T0 == T2)) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(addeo)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 += T1 + xer_ca;
|
|
|
|
if (T0 < T2 || (xer_ca == 1 && T0 == T2)) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
if ((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add immediate */
|
|
|
|
PPC_OP(addi)
|
|
|
|
{
|
|
|
|
T0 += PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add immediate carrying */
|
|
|
|
PPC_OP(addic)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 += PARAM(1);
|
|
|
|
if (T0 < T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add to minus one extended */
|
|
|
|
PPC_OP(addme)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 += xer_ca + (-1);
|
|
|
|
if (T1 != 0)
|
|
|
|
xer_ca = 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(addmeo)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 += xer_ca + (-1);
|
|
|
|
if (T1 & (T1 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
if (T1 != 0)
|
|
|
|
xer_ca = 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* add to zero extended */
|
|
|
|
PPC_OP(addze)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 += xer_ca;
|
|
|
|
if (T0 < T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(addzeo)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 += xer_ca;
|
|
|
|
if ((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
if (T0 < T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* divide word */
|
|
|
|
/* candidate for helper (too long) */
|
|
|
|
PPC_OP(divw)
|
|
|
|
{
|
|
|
|
if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (int32_t)((-1) * (T0 >> 31));
|
2003-11-23 17:55:54 +03:00
|
|
|
} else {
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (Ts0 / Ts1);
|
2003-11-23 17:55:54 +03:00
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(divwo)
|
|
|
|
{
|
|
|
|
if ((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
T0 = (-1) * (T0 >> 31);
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (Ts0 / Ts1);
|
2003-11-23 17:55:54 +03:00
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* divide word unsigned */
|
|
|
|
PPC_OP(divwu)
|
|
|
|
{
|
|
|
|
if (T1 == 0) {
|
|
|
|
T0 = 0;
|
|
|
|
} else {
|
|
|
|
T0 /= T1;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(divwuo)
|
|
|
|
{
|
|
|
|
if (T1 == 0) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
T0 = 0;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
T0 /= T1;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* multiply high word */
|
|
|
|
PPC_OP(mulhw)
|
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = ((int64_t)Ts0 * (int64_t)Ts1) >> 32;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* multiply high word unsigned */
|
|
|
|
PPC_OP(mulhwu)
|
|
|
|
{
|
|
|
|
T0 = ((uint64_t)T0 * (uint64_t)T1) >> 32;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* multiply low immediate */
|
|
|
|
PPC_OP(mulli)
|
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (Ts0 * SPARAM(1));
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* multiply low word */
|
|
|
|
PPC_OP(mullw)
|
|
|
|
{
|
|
|
|
T0 *= T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(mullwo)
|
|
|
|
{
|
|
|
|
int64_t res = (int64_t)Ts0 * (int64_t)Ts1;
|
|
|
|
|
|
|
|
if ((int32_t)res != res) {
|
|
|
|
xer_ov = 1;
|
|
|
|
xer_so = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (int32_t)res;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* negate */
|
|
|
|
PPC_OP(neg)
|
|
|
|
{
|
|
|
|
if (T0 != 0x80000000) {
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = -Ts0;
|
2003-11-23 17:55:54 +03:00
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(nego)
|
|
|
|
{
|
|
|
|
if (T0 == 0x80000000) {
|
|
|
|
xer_ov = 1;
|
|
|
|
xer_so = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = -Ts0;
|
2003-11-23 17:55:54 +03:00
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from */
|
|
|
|
PPC_OP(subf)
|
|
|
|
{
|
|
|
|
T0 = T1 - T0;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(subfo)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 = T1 - T0;
|
|
|
|
if (((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from carrying */
|
|
|
|
PPC_OP(subfc)
|
|
|
|
{
|
|
|
|
T0 = T1 - T0;
|
|
|
|
if (T0 <= T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(subfco)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 = T1 - T0;
|
|
|
|
if (T0 <= T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
if (((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from extended */
|
|
|
|
/* candidate for helper (too long) */
|
|
|
|
PPC_OP(subfe)
|
|
|
|
{
|
|
|
|
T0 = T1 + ~T0 + xer_ca;
|
|
|
|
if (T0 < T1 || (xer_ca == 1 && T0 == T1)) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(subfeo)
|
|
|
|
{
|
|
|
|
T2 = T0;
|
|
|
|
T0 = T1 + ~T0 + xer_ca;
|
|
|
|
if ((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
if (T0 < T1 || (xer_ca == 1 && T0 == T1)) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from immediate carrying */
|
|
|
|
PPC_OP(subfic)
|
|
|
|
{
|
|
|
|
T0 = PARAM(1) + ~T0 + 1;
|
|
|
|
if (T0 <= PARAM(1)) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from minus one extended */
|
|
|
|
PPC_OP(subfme)
|
|
|
|
{
|
|
|
|
T0 = ~T0 + xer_ca - 1;
|
|
|
|
|
|
|
|
if (T0 != -1)
|
|
|
|
xer_ca = 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(subfmeo)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 = ~T0 + xer_ca - 1;
|
|
|
|
if (~T1 & (~T1 ^ T0) & (1 << 31)) {
|
|
|
|
xer_so = 1;
|
|
|
|
xer_ov = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
if (T1 != -1)
|
|
|
|
xer_ca = 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* substract from zero extended */
|
|
|
|
PPC_OP(subfze)
|
|
|
|
{
|
|
|
|
T1 = ~T0;
|
|
|
|
T0 = T1 + xer_ca;
|
|
|
|
if (T0 < T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(subfzeo)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
T0 = ~T0 + xer_ca;
|
|
|
|
if ((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)) {
|
|
|
|
xer_ov = 1;
|
|
|
|
xer_so = 1;
|
|
|
|
} else {
|
|
|
|
xer_ov = 0;
|
|
|
|
}
|
|
|
|
if (T0 < ~T1) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Integer comparison ***/
|
|
|
|
/* compare */
|
|
|
|
PPC_OP(cmp)
|
|
|
|
{
|
|
|
|
if (Ts0 < Ts1) {
|
|
|
|
T0 = 0x08;
|
|
|
|
} else if (Ts0 > Ts1) {
|
|
|
|
T0 = 0x04;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* compare immediate */
|
|
|
|
PPC_OP(cmpi)
|
|
|
|
{
|
|
|
|
if (Ts0 < SPARAM(1)) {
|
|
|
|
T0 = 0x08;
|
|
|
|
} else if (Ts0 > SPARAM(1)) {
|
|
|
|
T0 = 0x04;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* compare logical */
|
|
|
|
PPC_OP(cmpl)
|
|
|
|
{
|
|
|
|
if (T0 < T1) {
|
|
|
|
T0 = 0x08;
|
|
|
|
} else if (T0 > T1) {
|
|
|
|
T0 = 0x04;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* compare logical immediate */
|
|
|
|
PPC_OP(cmpli)
|
|
|
|
{
|
|
|
|
if (T0 < PARAM(1)) {
|
|
|
|
T0 = 0x08;
|
|
|
|
} else if (T0 > PARAM(1)) {
|
|
|
|
T0 = 0x04;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Integer logical ***/
|
|
|
|
/* and */
|
|
|
|
PPC_OP(and)
|
|
|
|
{
|
|
|
|
T0 &= T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* andc */
|
|
|
|
PPC_OP(andc)
|
|
|
|
{
|
|
|
|
T0 &= ~T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* andi. */
|
|
|
|
PPC_OP(andi_)
|
|
|
|
{
|
|
|
|
T0 &= PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* count leading zero */
|
|
|
|
PPC_OP(cntlzw)
|
|
|
|
{
|
|
|
|
T1 = T0;
|
|
|
|
for (T0 = 32; T1 > 0; T0--)
|
|
|
|
T1 = T1 >> 1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* eqv */
|
|
|
|
PPC_OP(eqv)
|
|
|
|
{
|
|
|
|
T0 = ~(T0 ^ T1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extend sign byte */
|
|
|
|
PPC_OP(extsb)
|
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (int32_t)((int8_t)(Ts0));
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extend sign half word */
|
|
|
|
PPC_OP(extsh)
|
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
T0 = (int32_t)((int16_t)(Ts0));
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* nand */
|
|
|
|
PPC_OP(nand)
|
|
|
|
{
|
|
|
|
T0 = ~(T0 & T1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* nor */
|
|
|
|
PPC_OP(nor)
|
|
|
|
{
|
|
|
|
T0 = ~(T0 | T1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* or */
|
|
|
|
PPC_OP(or)
|
|
|
|
{
|
|
|
|
T0 |= T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* orc */
|
|
|
|
PPC_OP(orc)
|
|
|
|
{
|
|
|
|
T0 |= ~T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ori */
|
|
|
|
PPC_OP(ori)
|
|
|
|
{
|
|
|
|
T0 |= PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* xor */
|
|
|
|
PPC_OP(xor)
|
|
|
|
{
|
|
|
|
T0 ^= T1;
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* xori */
|
|
|
|
PPC_OP(xori)
|
|
|
|
{
|
|
|
|
T0 ^= PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Integer rotate ***/
|
|
|
|
/* rotate left word immediate then mask insert */
|
|
|
|
PPC_OP(rlwimi)
|
|
|
|
{
|
2004-01-04 17:57:11 +03:00
|
|
|
T0 = (rotl(T0, PARAM(1)) & PARAM(2)) | (T1 & PARAM(3));
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* rotate left immediate then and with mask insert */
|
|
|
|
PPC_OP(rotlwi)
|
|
|
|
{
|
|
|
|
T0 = rotl(T0, PARAM(1));
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(slwi)
|
|
|
|
{
|
|
|
|
T0 = T0 << PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(srwi)
|
|
|
|
{
|
|
|
|
T0 = T0 >> PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* rotate left word then and with mask insert */
|
|
|
|
PPC_OP(rlwinm)
|
|
|
|
{
|
|
|
|
T0 = rotl(T0, PARAM(1)) & PARAM(2);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(rotl)
|
|
|
|
{
|
|
|
|
T0 = rotl(T0, T1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
PPC_OP(rlwnm)
|
|
|
|
{
|
|
|
|
T0 = rotl(T0, T1) & PARAM(1);
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Integer shift ***/
|
|
|
|
/* shift left word */
|
|
|
|
PPC_OP(slw)
|
|
|
|
{
|
|
|
|
if (T1 & 0x20) {
|
|
|
|
T0 = 0;
|
|
|
|
} else {
|
|
|
|
T0 = T0 << T1;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* shift right algebraic word */
|
|
|
|
PPC_OP(sraw)
|
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_sraw();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* shift right algebraic word immediate */
|
|
|
|
PPC_OP(srawi)
|
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
T1 = T0;
|
|
|
|
T0 = (Ts0 >> PARAM(1));
|
2003-11-23 17:55:54 +03:00
|
|
|
if (Ts1 < 0 && (Ts1 & PARAM(2)) != 0) {
|
|
|
|
xer_ca = 1;
|
|
|
|
} else {
|
|
|
|
xer_ca = 0;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* shift right word */
|
|
|
|
PPC_OP(srw)
|
|
|
|
{
|
|
|
|
if (T1 & 0x20) {
|
|
|
|
T0 = 0;
|
|
|
|
} else {
|
|
|
|
T0 = T0 >> T1;
|
|
|
|
}
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/*** Floating-Point arithmetic ***/
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fadd - fadd. */
|
|
|
|
PPC_OP(fadd)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 += FT1;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fsub - fsub. */
|
|
|
|
PPC_OP(fsub)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 -= FT1;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fmul - fmul. */
|
|
|
|
PPC_OP(fmul)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 *= FT1;
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fdiv - fdiv. */
|
2005-03-13 20:01:22 +03:00
|
|
|
void do_fdiv (void);
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(fdiv)
|
2003-11-23 17:55:54 +03:00
|
|
|
{
|
2005-03-13 20:01:22 +03:00
|
|
|
do_fdiv();
|
2003-11-23 17:55:54 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
2003-11-23 19:58:08 +03:00
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fsqrt - fsqrt. */
|
|
|
|
PPC_OP(fsqrt)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fsqrt();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fres - fres. */
|
|
|
|
PPC_OP(fres)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fres();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* frsqrte - frsqrte. */
|
|
|
|
PPC_OP(frsqrte)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2005-03-13 20:01:22 +03:00
|
|
|
do_frsqrte();
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fsel - fsel. */
|
|
|
|
PPC_OP(fsel)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fsel();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/*** Floating-Point multiply-and-add ***/
|
|
|
|
/* fmadd - fmadd. */
|
|
|
|
PPC_OP(fmadd)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 = (FT0 * FT1) + FT2;
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fmsub - fmsub. */
|
|
|
|
PPC_OP(fmsub)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 = (FT0 * FT1) - FT2;
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fnmadd - fnmadd. - fnmadds - fnmadds. */
|
|
|
|
PPC_OP(fnmadd)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-05-24 02:18:12 +04:00
|
|
|
do_fnmadd();
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fnmsub - fnmsub. */
|
|
|
|
PPC_OP(fnmsub)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-05-24 02:18:12 +04:00
|
|
|
do_fnmsub();
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/*** Floating-Point round & convert ***/
|
|
|
|
/* frsp - frsp. */
|
|
|
|
PPC_OP(frsp)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2005-02-16 02:06:19 +03:00
|
|
|
FT0 = (float)FT0;
|
2004-01-05 01:58:38 +03:00
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fctiw - fctiw. */
|
|
|
|
PPC_OP(fctiw)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fctiw();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fctiwz - fctiwz. */
|
|
|
|
PPC_OP(fctiwz)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fctiwz();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
|
|
|
|
/*** Floating-Point compare ***/
|
|
|
|
/* fcmpu */
|
|
|
|
PPC_OP(fcmpu)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fcmpu();
|
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fcmpo */
|
|
|
|
PPC_OP(fcmpo)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fcmpo();
|
|
|
|
RETURN();
|
2004-01-04 17:57:11 +03:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/*** Floating-point move ***/
|
|
|
|
/* fabs */
|
2005-03-13 20:01:22 +03:00
|
|
|
void do_fabs (void);
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(fabs)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fabs();
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fnabs */
|
2005-03-13 20:01:22 +03:00
|
|
|
void do_fnabs (void);
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(fnabs)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_fnabs();
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* fneg */
|
|
|
|
PPC_OP(fneg)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
FT0 = -FT0;
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Load and store */
|
|
|
|
#define MEMSUFFIX _raw
|
|
|
|
#include "op_mem.h"
|
2004-04-13 00:39:29 +04:00
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
2004-01-05 01:58:38 +03:00
|
|
|
#define MEMSUFFIX _user
|
|
|
|
#include "op_mem.h"
|
|
|
|
|
|
|
|
#define MEMSUFFIX _kernel
|
|
|
|
#include "op_mem.h"
|
|
|
|
#endif
|
|
|
|
|
2004-05-24 02:18:12 +04:00
|
|
|
/* Special op to check and maybe clear reservation */
|
|
|
|
PPC_OP(check_reservation)
|
|
|
|
{
|
|
|
|
do_check_reservation();
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Return from interrupt */
|
|
|
|
PPC_OP(rfi)
|
2003-11-23 19:58:08 +03:00
|
|
|
{
|
2004-05-21 16:59:32 +04:00
|
|
|
regs->nip = regs->spr[SRR0] & ~0x00000003;
|
2004-05-24 02:18:12 +04:00
|
|
|
#if 1 // TRY
|
|
|
|
T0 = regs->spr[SRR1] & ~0xFFF00000;
|
|
|
|
#else
|
2004-01-05 01:58:38 +03:00
|
|
|
T0 = regs->spr[SRR1] & ~0xFFFF0000;
|
2004-05-24 02:18:12 +04:00
|
|
|
#endif
|
2004-01-05 01:58:38 +03:00
|
|
|
do_store_msr();
|
2004-04-13 00:39:29 +04:00
|
|
|
#if defined (DEBUG_OP)
|
2004-01-05 01:58:38 +03:00
|
|
|
dump_rfi();
|
2004-04-13 00:39:29 +04:00
|
|
|
#endif
|
2004-05-21 16:59:32 +04:00
|
|
|
// do_tlbia();
|
|
|
|
do_raise_exception(EXCP_RFI);
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* Trap word */
|
|
|
|
PPC_OP(tw)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
if ((Ts0 < Ts1 && (PARAM(1) & 0x10)) ||
|
|
|
|
(Ts0 > Ts1 && (PARAM(1) & 0x08)) ||
|
|
|
|
(Ts0 == Ts1 && (PARAM(1) & 0x04)) ||
|
|
|
|
(T0 < T1 && (PARAM(1) & 0x02)) ||
|
|
|
|
(T0 > T1 && (PARAM(1) & 0x01)))
|
2004-05-21 16:59:32 +04:00
|
|
|
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(twi)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
if ((Ts0 < SPARAM(1) && (PARAM(2) & 0x10)) ||
|
|
|
|
(Ts0 > SPARAM(1) && (PARAM(2) & 0x08)) ||
|
|
|
|
(Ts0 == SPARAM(1) && (PARAM(2) & 0x04)) ||
|
|
|
|
(T0 < (uint32_t)SPARAM(1) && (PARAM(2) & 0x02)) ||
|
|
|
|
(T0 > (uint32_t)SPARAM(1) && (PARAM(2) & 0x01)))
|
2004-05-21 16:59:32 +04:00
|
|
|
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Instruction cache block invalidate */
|
2004-01-05 01:58:38 +03:00
|
|
|
PPC_OP(icbi)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
|
|
|
do_icbi();
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
/* tlbia */
|
|
|
|
PPC_OP(tlbia)
|
2004-01-04 17:57:11 +03:00
|
|
|
{
|
2004-01-05 01:58:38 +03:00
|
|
|
do_tlbia();
|
|
|
|
RETURN();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* tlbie */
|
|
|
|
PPC_OP(tlbie)
|
|
|
|
{
|
|
|
|
do_tlbie();
|
2004-01-04 17:57:11 +03:00
|
|
|
RETURN();
|
2003-11-23 19:58:08 +03:00
|
|
|
}
|