2007-09-17 01:08:06 +04:00
|
|
|
/*
|
2007-05-23 04:03:59 +04:00
|
|
|
* QEMU I2C bus interface.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2007 CodeSourcery.
|
|
|
|
* Written by Paul Brook
|
|
|
|
*
|
2011-06-26 06:21:35 +04:00
|
|
|
* This code is licensed under the LGPL.
|
2007-05-23 04:03:59 +04:00
|
|
|
*/
|
|
|
|
|
2016-01-26 21:17:30 +03:00
|
|
|
#include "qemu/osdep.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/i2c/i2c.h"
|
2019-08-12 08:23:51 +03:00
|
|
|
#include "hw/qdev-properties.h"
|
2019-08-12 08:23:45 +03:00
|
|
|
#include "migration/vmstate.h"
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 08:31:58 +03:00
|
|
|
#include "qapi/error.h"
|
2019-05-23 17:35:07 +03:00
|
|
|
#include "qemu/module.h"
|
2022-06-30 10:21:14 +03:00
|
|
|
#include "qemu/main-loop.h"
|
2018-06-08 15:15:33 +03:00
|
|
|
#include "trace.h"
|
2007-05-23 04:03:59 +04:00
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|
|
2016-07-27 15:39:58 +03:00
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|
|
#define I2C_BROADCAST 0x00
|
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|
|
2012-03-28 20:01:36 +04:00
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|
|
static Property i2c_props[] = {
|
|
|
|
DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
2012-05-02 11:00:20 +04:00
|
|
|
static const TypeInfo i2c_bus_info = {
|
|
|
|
.name = TYPE_I2C_BUS,
|
|
|
|
.parent = TYPE_BUS,
|
2013-08-03 02:18:51 +04:00
|
|
|
.instance_size = sizeof(I2CBus),
|
2009-06-30 16:12:08 +04:00
|
|
|
};
|
|
|
|
|
2017-09-25 14:29:12 +03:00
|
|
|
static int i2c_bus_pre_save(void *opaque)
|
2008-07-02 03:16:53 +04:00
|
|
|
{
|
2013-08-03 02:18:51 +04:00
|
|
|
I2CBus *bus = opaque;
|
2008-07-02 03:16:53 +04:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
bus->saved_address = -1;
|
|
|
|
if (!QLIST_EMPTY(&bus->current_devs)) {
|
|
|
|
if (!bus->broadcast) {
|
|
|
|
bus->saved_address = QLIST_FIRST(&bus->current_devs)->elt->address;
|
2016-07-27 15:39:58 +03:00
|
|
|
} else {
|
|
|
|
bus->saved_address = I2C_BROADCAST;
|
2016-06-14 17:59:14 +03:00
|
|
|
}
|
|
|
|
}
|
2017-09-25 14:29:12 +03:00
|
|
|
|
|
|
|
return 0;
|
2008-07-02 03:16:53 +04:00
|
|
|
}
|
|
|
|
|
2009-09-30 00:48:27 +04:00
|
|
|
static const VMStateDescription vmstate_i2c_bus = {
|
|
|
|
.name = "i2c_bus",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.pre_save = i2c_bus_pre_save,
|
2014-04-16 18:01:33 +04:00
|
|
|
.fields = (VMStateField[]) {
|
2013-08-03 02:18:51 +04:00
|
|
|
VMSTATE_UINT8(saved_address, I2CBus),
|
2009-09-30 00:48:27 +04:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2007-05-23 04:03:59 +04:00
|
|
|
/* Create a new I2C bus. */
|
2013-08-03 02:18:51 +04:00
|
|
|
I2CBus *i2c_init_bus(DeviceState *parent, const char *name)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2013-08-03 02:18:51 +04:00
|
|
|
I2CBus *bus;
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2021-09-23 15:11:52 +03:00
|
|
|
bus = I2C_BUS(qbus_new(TYPE_I2C_BUS, parent, name));
|
2016-06-14 17:59:14 +03:00
|
|
|
QLIST_INIT(&bus->current_devs);
|
2022-06-30 10:21:14 +03:00
|
|
|
QSIMPLEQ_INIT(&bus->pending_masters);
|
2023-10-20 12:07:20 +03:00
|
|
|
vmstate_register_any(NULL, &vmstate_i2c_bus, bus);
|
2007-05-23 04:03:59 +04:00
|
|
|
return bus;
|
|
|
|
}
|
|
|
|
|
2021-06-17 14:53:31 +03:00
|
|
|
void i2c_slave_set_address(I2CSlave *dev, uint8_t address)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
|
|
|
dev->address = address;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Return nonzero if bus is busy. */
|
2013-08-03 02:18:51 +04:00
|
|
|
int i2c_bus_busy(I2CBus *bus)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2022-06-30 10:21:14 +03:00
|
|
|
return !QLIST_EMPTY(&bus->current_devs) || bus->bh;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2021-04-12 22:45:21 +03:00
|
|
|
bool i2c_scan_bus(I2CBus *bus, uint8_t address, bool broadcast,
|
|
|
|
I2CNodeList *current_devs)
|
|
|
|
{
|
|
|
|
BusChild *kid;
|
|
|
|
|
|
|
|
QTAILQ_FOREACH(kid, &bus->qbus.children, sibling) {
|
|
|
|
DeviceState *qdev = kid->child;
|
|
|
|
I2CSlave *candidate = I2C_SLAVE(qdev);
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(candidate);
|
|
|
|
|
|
|
|
if (sc->match_and_add(candidate, address, broadcast, current_devs)) {
|
|
|
|
if (!broadcast) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If broadcast was true, and the list was full or empty, return true. If
|
|
|
|
* broadcast was false, return false.
|
|
|
|
*/
|
|
|
|
return broadcast;
|
|
|
|
}
|
|
|
|
|
2017-01-09 14:40:20 +03:00
|
|
|
/* TODO: Make this handle multiple masters. */
|
2016-10-24 18:42:33 +03:00
|
|
|
/*
|
2017-01-09 14:40:20 +03:00
|
|
|
* Start or continue an i2c transaction. When this is called for the
|
|
|
|
* first time or after an i2c_end_transfer(), if it returns an error
|
|
|
|
* the bus transaction is terminated (or really never started). If
|
|
|
|
* this is called after another i2c_start_transfer() without an
|
|
|
|
* intervening i2c_end_transfer(), and it returns an error, the
|
|
|
|
* transaction will not be terminated. The caller must do it.
|
|
|
|
*
|
|
|
|
* This corresponds with the way real hardware works. The SMBus
|
|
|
|
* protocol uses a start transfer to switch from write to read mode
|
|
|
|
* without releasing the bus. If that fails, the bus is still
|
|
|
|
* in a transaction.
|
2021-06-17 14:53:33 +03:00
|
|
|
*
|
|
|
|
* @event must be I2C_START_RECV or I2C_START_SEND.
|
2016-10-24 18:42:33 +03:00
|
|
|
*/
|
2021-06-17 14:53:33 +03:00
|
|
|
static int i2c_do_start_transfer(I2CBus *bus, uint8_t address,
|
|
|
|
enum i2c_event event)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
I2CSlaveClass *sc;
|
2016-06-14 17:59:14 +03:00
|
|
|
I2CNode *node;
|
2017-01-09 14:40:20 +03:00
|
|
|
bool bus_scanned = false;
|
2016-06-14 17:59:14 +03:00
|
|
|
|
2016-07-27 15:39:58 +03:00
|
|
|
if (address == I2C_BROADCAST) {
|
2016-06-14 17:59:14 +03:00
|
|
|
/*
|
|
|
|
* This is a broadcast, the current_devs will be all the devices of the
|
|
|
|
* bus.
|
|
|
|
*/
|
|
|
|
bus->broadcast = true;
|
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2016-10-24 18:26:55 +03:00
|
|
|
/*
|
|
|
|
* If there are already devices in the list, that means we are in
|
|
|
|
* the middle of a transaction and we shouldn't rescan the bus.
|
|
|
|
*
|
|
|
|
* This happens with any SMBus transaction, even on a pure I2C
|
|
|
|
* device. The interface does a transaction start without
|
|
|
|
* terminating the previous transaction.
|
|
|
|
*/
|
|
|
|
if (QLIST_EMPTY(&bus->current_devs)) {
|
2021-04-12 22:45:21 +03:00
|
|
|
/* Disregard whether devices were found. */
|
|
|
|
(void)i2c_scan_bus(bus, address, bus->broadcast, &bus->current_devs);
|
2017-01-09 14:40:20 +03:00
|
|
|
bus_scanned = true;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
if (QLIST_EMPTY(&bus->current_devs)) {
|
2007-05-23 04:03:59 +04:00
|
|
|
return 1;
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
QLIST_FOREACH(node, &bus->current_devs, next) {
|
2018-06-08 15:15:33 +03:00
|
|
|
I2CSlave *s = node->elt;
|
2017-01-09 14:40:20 +03:00
|
|
|
int rv;
|
|
|
|
|
2018-06-08 15:15:33 +03:00
|
|
|
sc = I2C_SLAVE_GET_CLASS(s);
|
2016-06-14 17:59:14 +03:00
|
|
|
/* If the bus is already busy, assume this is a repeated
|
|
|
|
start condition. */
|
2017-01-09 14:40:20 +03:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
if (sc->event) {
|
2022-06-30 10:21:14 +03:00
|
|
|
trace_i2c_event(event == I2C_START_SEND ? "start" : "start_async",
|
|
|
|
s->address);
|
2021-06-17 14:53:33 +03:00
|
|
|
rv = sc->event(s, event);
|
2017-01-09 14:40:20 +03:00
|
|
|
if (rv && !bus->broadcast) {
|
|
|
|
if (bus_scanned) {
|
|
|
|
/* First call, terminate the transfer. */
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
|
|
|
return rv;
|
|
|
|
}
|
2016-06-14 17:59:14 +03:00
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2021-06-17 14:53:33 +03:00
|
|
|
int i2c_start_transfer(I2CBus *bus, uint8_t address, bool is_recv)
|
|
|
|
{
|
|
|
|
return i2c_do_start_transfer(bus, address, is_recv
|
|
|
|
? I2C_START_RECV
|
|
|
|
: I2C_START_SEND);
|
2021-06-17 14:53:34 +03:00
|
|
|
}
|
|
|
|
|
2022-06-30 10:21:14 +03:00
|
|
|
void i2c_bus_master(I2CBus *bus, QEMUBH *bh)
|
|
|
|
{
|
2023-03-02 15:57:50 +03:00
|
|
|
I2CPendingMaster *node = g_new(struct I2CPendingMaster, 1);
|
|
|
|
node->bh = bh;
|
|
|
|
|
|
|
|
QSIMPLEQ_INSERT_TAIL(&bus->pending_masters, node, entry);
|
|
|
|
}
|
|
|
|
|
|
|
|
void i2c_schedule_pending_master(I2CBus *bus)
|
|
|
|
{
|
|
|
|
I2CPendingMaster *node;
|
2022-06-30 10:21:14 +03:00
|
|
|
|
2023-03-02 15:57:50 +03:00
|
|
|
if (i2c_bus_busy(bus)) {
|
|
|
|
/* someone is already controlling the bus; wait for it to release it */
|
|
|
|
return;
|
|
|
|
}
|
2022-06-30 10:21:14 +03:00
|
|
|
|
2023-03-02 15:57:50 +03:00
|
|
|
if (QSIMPLEQ_EMPTY(&bus->pending_masters)) {
|
2022-06-30 10:21:14 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2023-03-02 15:57:50 +03:00
|
|
|
node = QSIMPLEQ_FIRST(&bus->pending_masters);
|
|
|
|
bus->bh = node->bh;
|
|
|
|
|
|
|
|
QSIMPLEQ_REMOVE_HEAD(&bus->pending_masters, entry);
|
|
|
|
g_free(node);
|
|
|
|
|
2022-06-30 10:21:14 +03:00
|
|
|
qemu_bh_schedule(bus->bh);
|
|
|
|
}
|
|
|
|
|
|
|
|
void i2c_bus_release(I2CBus *bus)
|
|
|
|
{
|
|
|
|
bus->bh = NULL;
|
2023-03-02 15:57:50 +03:00
|
|
|
|
|
|
|
i2c_schedule_pending_master(bus);
|
2022-06-30 10:21:14 +03:00
|
|
|
}
|
|
|
|
|
2021-06-17 14:53:34 +03:00
|
|
|
int i2c_start_recv(I2CBus *bus, uint8_t address)
|
|
|
|
{
|
|
|
|
return i2c_do_start_transfer(bus, address, I2C_START_RECV);
|
|
|
|
}
|
|
|
|
|
|
|
|
int i2c_start_send(I2CBus *bus, uint8_t address)
|
|
|
|
{
|
|
|
|
return i2c_do_start_transfer(bus, address, I2C_START_SEND);
|
2021-06-17 14:53:33 +03:00
|
|
|
}
|
|
|
|
|
2022-06-30 10:21:14 +03:00
|
|
|
int i2c_start_send_async(I2CBus *bus, uint8_t address)
|
|
|
|
{
|
|
|
|
return i2c_do_start_transfer(bus, address, I2C_START_SEND_ASYNC);
|
|
|
|
}
|
|
|
|
|
2013-08-03 02:18:51 +04:00
|
|
|
void i2c_end_transfer(I2CBus *bus)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
I2CSlaveClass *sc;
|
2016-06-14 17:59:14 +03:00
|
|
|
I2CNode *node, *next;
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
QLIST_FOREACH_SAFE(node, &bus->current_devs, next, next) {
|
2018-06-08 15:15:33 +03:00
|
|
|
I2CSlave *s = node->elt;
|
|
|
|
sc = I2C_SLAVE_GET_CLASS(s);
|
2016-06-14 17:59:14 +03:00
|
|
|
if (sc->event) {
|
2018-06-08 15:15:33 +03:00
|
|
|
trace_i2c_event("finish", s->address);
|
|
|
|
sc->event(s, I2C_FINISH);
|
2016-06-14 17:59:14 +03:00
|
|
|
}
|
|
|
|
QLIST_REMOVE(node, next);
|
|
|
|
g_free(node);
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2016-06-14 17:59:14 +03:00
|
|
|
bus->broadcast = false;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2021-06-17 14:53:30 +03:00
|
|
|
int i2c_send(I2CBus *bus, uint8_t data)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
I2CSlaveClass *sc;
|
2018-06-08 15:15:33 +03:00
|
|
|
I2CSlave *s;
|
2016-06-14 17:59:14 +03:00
|
|
|
I2CNode *node;
|
|
|
|
int ret = 0;
|
|
|
|
|
2021-06-17 14:53:30 +03:00
|
|
|
QLIST_FOREACH(node, &bus->current_devs, next) {
|
|
|
|
s = node->elt;
|
|
|
|
sc = I2C_SLAVE_GET_CLASS(s);
|
|
|
|
if (sc->send) {
|
|
|
|
trace_i2c_send(s->address, data);
|
|
|
|
ret = ret || sc->send(s, data);
|
|
|
|
} else {
|
|
|
|
ret = -1;
|
2016-06-14 17:59:14 +03:00
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2021-06-17 14:53:30 +03:00
|
|
|
return ret ? -1 : 0;
|
2016-06-14 17:59:14 +03:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2022-06-30 10:21:14 +03:00
|
|
|
int i2c_send_async(I2CBus *bus, uint8_t data)
|
|
|
|
{
|
|
|
|
I2CNode *node = QLIST_FIRST(&bus->current_devs);
|
|
|
|
I2CSlave *slave = node->elt;
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_GET_CLASS(slave);
|
|
|
|
|
|
|
|
if (!sc->send_async) {
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
trace_i2c_send_async(slave->address, data);
|
|
|
|
|
|
|
|
sc->send_async(slave, data);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-11-14 20:50:50 +03:00
|
|
|
uint8_t i2c_recv(I2CBus *bus)
|
2016-06-14 17:59:14 +03:00
|
|
|
{
|
2018-11-14 20:50:50 +03:00
|
|
|
uint8_t data = 0xff;
|
2021-06-17 14:53:30 +03:00
|
|
|
I2CSlaveClass *sc;
|
|
|
|
I2CSlave *s;
|
|
|
|
|
|
|
|
if (!QLIST_EMPTY(&bus->current_devs) && !bus->broadcast) {
|
|
|
|
sc = I2C_SLAVE_GET_CLASS(QLIST_FIRST(&bus->current_devs)->elt);
|
|
|
|
if (sc->recv) {
|
|
|
|
s = QLIST_FIRST(&bus->current_devs)->elt;
|
|
|
|
data = sc->recv(s);
|
|
|
|
trace_i2c_recv(s->address, data);
|
|
|
|
}
|
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
|
2018-11-14 20:50:50 +03:00
|
|
|
return data;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2013-08-03 02:18:51 +04:00
|
|
|
void i2c_nack(I2CBus *bus)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
2011-12-05 06:39:20 +04:00
|
|
|
I2CSlaveClass *sc;
|
2016-06-14 17:59:14 +03:00
|
|
|
I2CNode *node;
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
if (QLIST_EMPTY(&bus->current_devs)) {
|
2007-05-23 04:03:59 +04:00
|
|
|
return;
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
|
2016-06-14 17:59:14 +03:00
|
|
|
QLIST_FOREACH(node, &bus->current_devs, next) {
|
|
|
|
sc = I2C_SLAVE_GET_CLASS(node->elt);
|
|
|
|
if (sc->event) {
|
2018-06-08 15:15:33 +03:00
|
|
|
trace_i2c_event("nack", node->elt->address);
|
2016-06-14 17:59:14 +03:00
|
|
|
sc->event(node->elt, I2C_NACK);
|
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2022-06-30 10:21:14 +03:00
|
|
|
void i2c_ack(I2CBus *bus)
|
|
|
|
{
|
|
|
|
if (!bus->bh) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
trace_i2c_ack();
|
|
|
|
|
|
|
|
qemu_bh_schedule(bus->bh);
|
|
|
|
}
|
|
|
|
|
2009-09-30 00:48:28 +04:00
|
|
|
static int i2c_slave_post_load(void *opaque, int version_id)
|
2007-05-24 22:50:09 +04:00
|
|
|
{
|
2011-12-05 06:28:27 +04:00
|
|
|
I2CSlave *dev = opaque;
|
2013-08-03 02:18:51 +04:00
|
|
|
I2CBus *bus;
|
2016-06-14 17:59:14 +03:00
|
|
|
I2CNode *node;
|
|
|
|
|
2013-06-07 16:45:17 +04:00
|
|
|
bus = I2C_BUS(qdev_get_parent_bus(DEVICE(dev)));
|
2016-07-27 15:39:58 +03:00
|
|
|
if ((bus->saved_address == dev->address) ||
|
|
|
|
(bus->saved_address == I2C_BROADCAST)) {
|
2022-03-15 17:41:56 +03:00
|
|
|
node = g_new(struct I2CNode, 1);
|
2016-06-14 17:59:14 +03:00
|
|
|
node->elt = dev;
|
|
|
|
QLIST_INSERT_HEAD(&bus->current_devs, node, next);
|
2009-05-15 01:35:08 +04:00
|
|
|
}
|
2009-09-30 00:48:28 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-09-30 00:48:30 +04:00
|
|
|
const VMStateDescription vmstate_i2c_slave = {
|
2011-12-05 06:28:27 +04:00
|
|
|
.name = "I2CSlave",
|
2009-09-30 00:48:28 +04:00
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.post_load = i2c_slave_post_load,
|
2014-04-16 18:01:33 +04:00
|
|
|
.fields = (VMStateField[]) {
|
2011-12-05 06:28:27 +04:00
|
|
|
VMSTATE_UINT8(address, I2CSlave),
|
2009-09-30 00:48:28 +04:00
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2020-07-06 01:41:51 +03:00
|
|
|
I2CSlave *i2c_slave_new(const char *name, uint8_t addr)
|
2009-05-15 01:35:08 +04:00
|
|
|
{
|
|
|
|
DeviceState *dev;
|
|
|
|
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 08:31:58 +03:00
|
|
|
dev = qdev_new(name);
|
2009-09-30 00:48:26 +04:00
|
|
|
qdev_prop_set_uint8(dev, "address", addr);
|
2020-07-06 01:41:51 +03:00
|
|
|
return I2C_SLAVE(dev);
|
2020-06-23 10:27:15 +03:00
|
|
|
}
|
|
|
|
|
2020-07-06 01:41:52 +03:00
|
|
|
bool i2c_slave_realize_and_unref(I2CSlave *dev, I2CBus *bus, Error **errp)
|
2020-06-23 10:27:15 +03:00
|
|
|
{
|
2020-07-06 01:41:52 +03:00
|
|
|
return qdev_realize_and_unref(&dev->qdev, &bus->qbus, errp);
|
2020-06-23 10:27:15 +03:00
|
|
|
}
|
|
|
|
|
2020-07-06 01:41:53 +03:00
|
|
|
I2CSlave *i2c_slave_create_simple(I2CBus *bus, const char *name, uint8_t addr)
|
2020-06-23 10:27:15 +03:00
|
|
|
{
|
2020-07-06 01:41:51 +03:00
|
|
|
I2CSlave *dev = i2c_slave_new(name, addr);
|
2020-06-23 10:27:15 +03:00
|
|
|
|
2020-07-06 01:41:53 +03:00
|
|
|
i2c_slave_realize_and_unref(dev, bus, &error_abort);
|
2020-06-23 10:27:15 +03:00
|
|
|
|
2020-07-06 01:41:53 +03:00
|
|
|
return dev;
|
2007-05-24 22:50:09 +04:00
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
|
2021-04-12 22:45:20 +03:00
|
|
|
static bool i2c_slave_match(I2CSlave *candidate, uint8_t address,
|
|
|
|
bool broadcast, I2CNodeList *current_devs)
|
|
|
|
{
|
|
|
|
if ((candidate->address == address) || (broadcast)) {
|
2022-03-15 17:41:56 +03:00
|
|
|
I2CNode *node = g_new(struct I2CNode, 1);
|
2021-04-12 22:45:20 +03:00
|
|
|
node->elt = candidate;
|
|
|
|
QLIST_INSERT_HEAD(current_devs, node, next);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Not found and not broadcast. */
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2011-12-08 07:34:16 +04:00
|
|
|
static void i2c_slave_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *k = DEVICE_CLASS(klass);
|
2021-04-12 22:45:20 +03:00
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
|
2013-07-29 18:17:45 +04:00
|
|
|
set_bit(DEVICE_CATEGORY_MISC, k->categories);
|
2012-05-02 11:00:20 +04:00
|
|
|
k->bus_type = TYPE_I2C_BUS;
|
2020-01-10 18:30:32 +03:00
|
|
|
device_class_set_props(k, i2c_props);
|
2021-04-12 22:45:20 +03:00
|
|
|
sc->match_and_add = i2c_slave_match;
|
2011-12-08 07:34:16 +04:00
|
|
|
}
|
|
|
|
|
2013-01-10 19:19:07 +04:00
|
|
|
static const TypeInfo i2c_slave_type_info = {
|
2011-12-05 06:39:20 +04:00
|
|
|
.name = TYPE_I2C_SLAVE,
|
|
|
|
.parent = TYPE_DEVICE,
|
|
|
|
.instance_size = sizeof(I2CSlave),
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(I2CSlaveClass),
|
2011-12-08 07:34:16 +04:00
|
|
|
.class_init = i2c_slave_class_init,
|
2011-12-05 06:39:20 +04:00
|
|
|
};
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void i2c_slave_register_types(void)
|
2011-12-05 06:39:20 +04:00
|
|
|
{
|
2012-05-02 11:00:20 +04:00
|
|
|
type_register_static(&i2c_bus_info);
|
2011-12-05 06:39:20 +04:00
|
|
|
type_register_static(&i2c_slave_type_info);
|
|
|
|
}
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(i2c_slave_register_types)
|