2017-07-24 11:52:47 +03:00
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/*
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* S390x DIAG instruction helper functions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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2017-08-18 14:43:49 +03:00
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#include "internal.h"
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2017-07-24 11:52:47 +03:00
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#include "exec/address-spaces.h"
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#include "exec/exec-all.h"
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#include "hw/watchdog/wdt_diag288.h"
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#include "sysemu/cpus.h"
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#include "hw/s390x/ipl.h"
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2017-09-13 16:24:01 +03:00
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#include "hw/s390x/s390-virtio-ccw.h"
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2017-07-24 11:52:47 +03:00
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static int modified_clear_reset(S390CPU *cpu)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUState *t;
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pause_all_vcpus();
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cpu_synchronize_all_states();
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
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}
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s390_cmma_reset();
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subsystem_reset();
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s390_crypto_reset();
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scc->load_normal(CPU(cpu));
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cpu_synchronize_all_post_reset();
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resume_all_vcpus();
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return 0;
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}
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2017-08-18 14:43:47 +03:00
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static inline void s390_do_cpu_reset(CPUState *cs, run_on_cpu_data arg)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cs);
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scc->cpu_reset(cs);
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}
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2017-07-24 11:52:47 +03:00
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static int load_normal_reset(S390CPU *cpu)
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{
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUState *t;
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pause_all_vcpus();
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cpu_synchronize_all_states();
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CPU_FOREACH(t) {
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run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
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}
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s390_cmma_reset();
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subsystem_reset();
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scc->initial_cpu_reset(CPU(cpu));
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scc->load_normal(CPU(cpu));
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cpu_synchronize_all_post_reset();
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resume_all_vcpus();
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return 0;
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}
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int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
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{
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uint64_t func = env->regs[r1];
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uint64_t timeout = env->regs[r1 + 1];
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uint64_t action = env->regs[r3];
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Object *obj;
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DIAG288State *diag288;
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DIAG288Class *diag288_class;
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if (r1 % 2 || action != 0) {
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return -1;
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}
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/* Timeout must be more than 15 seconds except for timer deletion */
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if (func != WDT_DIAG288_CANCEL && timeout < 15) {
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return -1;
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}
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obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
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if (!obj) {
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return -1;
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}
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diag288 = DIAG288(obj);
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diag288_class = DIAG288_GET_CLASS(diag288);
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return diag288_class->handle_timer(diag288, func, timeout);
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}
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#define DIAG_308_RC_OK 0x0001
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#define DIAG_308_RC_NO_CONF 0x0102
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#define DIAG_308_RC_INVALID 0x0402
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2017-11-30 19:27:34 +03:00
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void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3, uintptr_t ra)
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2017-07-24 11:52:47 +03:00
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{
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uint64_t addr = env->regs[r1];
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uint64_t subcode = env->regs[r3];
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IplParameterBlock *iplb;
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if (env->psw.mask & PSW_MASK_PSTATE) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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switch (subcode) {
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case 0:
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modified_clear_reset(s390_env_get_cpu(env));
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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break;
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case 1:
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load_normal_reset(s390_env_get_cpu(env));
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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break;
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case 3:
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s390_reipl_request();
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if (tcg_enabled()) {
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cpu_loop_exit(CPU(s390_env_get_cpu(env)));
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}
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break;
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case 5:
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if ((r1 & 1) || (addr & 0x0fffULL)) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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if (!address_space_access_valid(&address_space_memory, addr,
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sizeof(IplParameterBlock), false)) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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2017-10-07 02:49:21 +03:00
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iplb = g_new0(IplParameterBlock, 1);
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2017-07-24 11:52:47 +03:00
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cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
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if (!iplb_valid_len(iplb)) {
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env->regs[r1 + 1] = DIAG_308_RC_INVALID;
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goto out;
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}
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cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
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if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
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env->regs[r1 + 1] = DIAG_308_RC_INVALID;
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goto out;
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}
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s390_ipl_update_diag308(iplb);
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env->regs[r1 + 1] = DIAG_308_RC_OK;
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out:
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g_free(iplb);
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return;
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case 6:
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if ((r1 & 1) || (addr & 0x0fffULL)) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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if (!address_space_access_valid(&address_space_memory, addr,
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sizeof(IplParameterBlock), true)) {
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2017-11-30 19:27:34 +03:00
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s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra);
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2017-07-24 11:52:47 +03:00
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return;
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}
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iplb = s390_ipl_get_iplb();
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if (iplb) {
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cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
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env->regs[r1 + 1] = DIAG_308_RC_OK;
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} else {
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env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
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}
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return;
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default:
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hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
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break;
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}
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}
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