2007-11-17 20:14:51 +03:00
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/*
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* Misc ARM declarations
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*
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* Copyright (c) 2006 CodeSourcery.
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* Written by Paul Brook
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*
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2011-06-26 06:21:35 +04:00
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* This code is licensed under the LGPL.
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2007-11-17 20:14:51 +03:00
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*
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*/
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#ifndef ARM_MISC_H
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#define ARM_MISC_H 1
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2011-07-25 15:27:01 +04:00
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#include "memory.h"
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2007-11-17 20:14:51 +03:00
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/* The CPU is also modeled as an interrupt controller. */
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#define ARM_PIC_CPU_IRQ 0
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#define ARM_PIC_CPU_FIQ 1
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qemu_irq *arm_pic_init_cpu(CPUState *env);
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/* armv7m.c */
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2011-07-25 15:27:01 +04:00
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qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
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int flash_size, int sram_size,
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2007-11-17 20:14:51 +03:00
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const char *kernel_filename, const char *cpu_model);
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/* arm_boot.c */
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2008-04-15 00:27:51 +04:00
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struct arm_boot_info {
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int ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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2012-03-02 15:56:38 +04:00
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const char *dtb_filename;
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2009-10-02 01:12:16 +04:00
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target_phys_addr_t loader_start;
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2012-01-26 15:43:48 +04:00
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/* multicore boards that use the default secondary core boot functions
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* need to put the address of the secondary boot code, the boot reg,
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* and the GIC address in the next 3 values, respectively. boards that
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* have their own boot functions can use these values as they want.
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*/
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2009-10-02 01:12:16 +04:00
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target_phys_addr_t smp_loader_start;
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2012-01-14 00:52:40 +04:00
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target_phys_addr_t smp_bootreg_addr;
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2012-02-16 13:56:09 +04:00
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target_phys_addr_t gic_cpu_if_addr;
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2008-04-15 00:27:51 +04:00
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int nb_cpus;
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int board_id;
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2011-06-23 19:53:48 +04:00
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int (*atag_board)(const struct arm_boot_info *info, void *p);
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2012-01-26 15:43:48 +04:00
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/* multicore boards that use the default secondary core boot functions
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* can ignore these two function calls. If the default functions won't
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* work, then write_secondary_boot() should write a suitable blob of
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* code mimicing the secondary CPU startup process used by the board's
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* boot loader/boot ROM code, and secondary_cpu_reset_hook() should
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* perform any necessary CPU reset handling and set the PC for thei
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* secondary CPUs to point at this boot blob.
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*/
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void (*write_secondary_boot)(CPUState *env,
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const struct arm_boot_info *info);
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void (*secondary_cpu_reset_hook)(CPUState *env,
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const struct arm_boot_info *info);
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2009-11-11 21:07:53 +03:00
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/* Used internally by arm_boot.c */
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int is_linux;
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target_phys_addr_t initrd_size;
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target_phys_addr_t entry;
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2008-04-15 00:27:51 +04:00
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};
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void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
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2007-11-17 20:14:51 +03:00
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2008-08-30 13:51:20 +04:00
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/* Multiplication factor to convert from system clock ticks to qemu timer
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ticks. */
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2008-09-17 23:04:14 +04:00
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extern int system_clock_scale;
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2007-11-17 20:14:51 +03:00
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#endif /* !ARM_MISC_H */
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