2020-10-16 09:51:58 +03:00
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/*
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* LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) data structures
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* defined at arch/mips/include/asm/mach-loongson64/boot_param.h in Linux kernel
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*
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* Copyright (c) 2017-2020 Huacai Chen (chenhc@lemote.com)
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* Copyright (c) 2017-2020 Jiaxun Yang <jiaxun.yang@flygoat.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef HW_MIPS_LOONGSON3_BOOTP_H
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#define HW_MIPS_LOONGSON3_BOOTP_H
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struct efi_memory_map_loongson {
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uint16_t vers; /* version of efi_memory_map */
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uint32_t nr_map; /* number of memory_maps */
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2024-02-20 11:52:12 +03:00
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uint32_t mem_freq; /* memory frequency */
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2020-10-16 09:51:58 +03:00
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struct mem_map {
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uint32_t node_id; /* node_id which memory attached to */
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uint32_t mem_type; /* system memory, pci memory, pci io, etc. */
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uint64_t mem_start; /* memory map start address */
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uint32_t mem_size; /* each memory_map size, not the total size */
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} map[128];
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} QEMU_PACKED;
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enum loongson_cpu_type {
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Legacy_2E = 0x0,
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Legacy_2F = 0x1,
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Legacy_3A = 0x2,
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Legacy_3B = 0x3,
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Legacy_1A = 0x4,
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Legacy_1B = 0x5,
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Legacy_2G = 0x6,
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Legacy_2H = 0x7,
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Loongson_1A = 0x100,
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Loongson_1B = 0x101,
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Loongson_2E = 0x200,
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Loongson_2F = 0x201,
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Loongson_2G = 0x202,
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Loongson_2H = 0x203,
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Loongson_3A = 0x300,
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Loongson_3B = 0x301
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};
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/*
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* Capability and feature descriptor structure for MIPS CPU
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*/
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struct efi_cpuinfo_loongson {
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uint16_t vers; /* version of efi_cpuinfo_loongson */
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uint32_t processor_id; /* PRID, e.g. 6305, 6306 */
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uint32_t cputype; /* Loongson_3A/3B, etc. */
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uint32_t total_node; /* num of total numa nodes */
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uint16_t cpu_startup_core_id; /* Boot core id */
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uint16_t reserved_cores_mask;
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uint32_t cpu_clock_freq; /* cpu_clock */
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uint32_t nr_cpus;
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char cpuname[64];
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} QEMU_PACKED;
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#define MAX_UARTS 64
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struct uart_device {
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uint32_t iotype;
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uint32_t uartclk;
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uint32_t int_offset;
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uint64_t uart_base;
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} QEMU_PACKED;
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#define MAX_SENSORS 64
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#define SENSOR_TEMPER 0x00000001
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#define SENSOR_VOLTAGE 0x00000002
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#define SENSOR_FAN 0x00000004
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struct sensor_device {
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char name[32]; /* a formal name */
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char label[64]; /* a flexible description */
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uint32_t type; /* SENSOR_* */
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uint32_t id; /* instance id of a sensor-class */
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uint32_t fan_policy; /* step speed or constant speed */
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uint32_t fan_percent;/* only for constant speed policy */
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uint64_t base_addr; /* base address of device registers */
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} QEMU_PACKED;
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struct system_loongson {
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uint16_t vers; /* version of system_loongson */
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uint32_t ccnuma_smp; /* 0: no numa; 1: has numa */
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uint32_t sing_double_channel;/* 1: single; 2: double */
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uint32_t nr_uarts;
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struct uart_device uarts[MAX_UARTS];
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uint32_t nr_sensors;
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struct sensor_device sensors[MAX_SENSORS];
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char has_ec;
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char ec_name[32];
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uint64_t ec_base_addr;
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char has_tcm;
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char tcm_name[32];
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uint64_t tcm_base_addr;
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uint64_t workarounds;
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uint64_t of_dtb_addr; /* NULL if not support */
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} QEMU_PACKED;
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struct irq_source_routing_table {
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uint16_t vers;
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uint16_t size;
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uint16_t rtr_bus;
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uint16_t rtr_devfn;
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uint32_t vendor;
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uint32_t device;
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uint32_t PIC_type; /* conform use HT or PCI to route to CPU-PIC */
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uint64_t ht_int_bit; /* 3A: 1<<24; 3B: 1<<16 */
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uint64_t ht_enable; /* irqs used in this PIC */
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uint32_t node_id; /* node id: 0x0-0; 0x1-1; 0x10-2; 0x11-3 */
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uint64_t pci_mem_start_addr;
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uint64_t pci_mem_end_addr;
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uint64_t pci_io_start_addr;
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uint64_t pci_io_end_addr;
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uint64_t pci_config_addr;
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uint16_t dma_mask_bits;
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uint16_t dma_noncoherent;
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} QEMU_PACKED;
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struct interface_info {
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uint16_t vers; /* version of the specificition */
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uint16_t size;
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uint8_t flag;
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char description[64];
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} QEMU_PACKED;
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#define MAX_RESOURCE_NUMBER 128
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struct resource_loongson {
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uint64_t start; /* resource start address */
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uint64_t end; /* resource end address */
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char name[64];
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uint32_t flags;
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};
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struct archdev_data {}; /* arch specific additions */
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struct board_devices {
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char name[64]; /* hold the device name */
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uint32_t num_resources; /* number of device_resource */
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/* for each device's resource */
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struct resource_loongson resource[MAX_RESOURCE_NUMBER];
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/* arch specific additions */
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struct archdev_data archdata;
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};
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struct loongson_special_attribute {
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uint16_t vers; /* version of this special */
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2024-02-20 11:52:12 +03:00
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char special_name[64]; /* special_attribute_name */
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2020-10-16 09:51:58 +03:00
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uint32_t loongson_special_type; /* type of special device */
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/* for each device's resource */
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struct resource_loongson resource[MAX_RESOURCE_NUMBER];
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};
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struct loongson_params {
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uint64_t memory_offset; /* efi_memory_map_loongson struct offset */
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uint64_t cpu_offset; /* efi_cpuinfo_loongson struct offset */
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uint64_t system_offset; /* system_loongson struct offset */
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uint64_t irq_offset; /* irq_source_routing_table struct offset */
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uint64_t interface_offset; /* interface_info struct offset */
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uint64_t special_offset; /* loongson_special_attribute struct offset */
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uint64_t boarddev_table_offset; /* board_devices offset */
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};
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struct smbios_tables {
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uint16_t vers; /* version of smbios */
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uint64_t vga_bios; /* vga_bios address */
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struct loongson_params lp;
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};
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struct efi_reset_system_t {
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uint64_t ResetCold;
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uint64_t ResetWarm;
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uint64_t ResetType;
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uint64_t Shutdown;
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uint64_t DoSuspend; /* NULL if not support */
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};
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struct efi_loongson {
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uint64_t mps; /* MPS table */
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uint64_t acpi; /* ACPI table (IA64 ext 0.71) */
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uint64_t acpi20; /* ACPI table (ACPI 2.0) */
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struct smbios_tables smbios; /* SM BIOS table */
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uint64_t sal_systab; /* SAL system table */
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uint64_t boot_info; /* boot info table */
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};
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struct boot_params {
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struct efi_loongson efi;
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struct efi_reset_system_t reset_system;
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};
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2024-05-08 16:06:50 +03:00
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#define LOONGSON3_CORE_PER_NODE 4
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2020-10-16 09:51:58 +03:00
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/* Overall MMIO & Memory layout */
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enum {
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VIRT_LOWMEM,
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VIRT_PM,
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VIRT_FW_CFG,
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VIRT_RTC,
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VIRT_PCIE_PIO,
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VIRT_PCIE_ECAM,
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VIRT_BIOS_ROM,
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VIRT_UART,
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VIRT_LIOINTC,
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2024-05-08 16:06:50 +03:00
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VIRT_IPI,
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2020-10-16 09:51:58 +03:00
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VIRT_PCIE_MMIO,
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VIRT_HIGHMEM
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};
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/* Low MEM layout for QEMU kernel loader */
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enum {
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LOADER_KERNEL,
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LOADER_INITRD,
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LOADER_CMDLINE
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};
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/* BIOS ROM layout for QEMU kernel loader */
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enum {
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LOADER_BOOTROM,
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LOADER_PARAM,
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};
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2021-01-22 15:24:04 +03:00
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extern const MemMapEntry virt_memmap[];
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2020-10-16 09:51:58 +03:00
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void init_loongson_params(struct loongson_params *lp, void *p,
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uint64_t cpu_freq, uint64_t ram_size);
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void init_reset_system(struct efi_reset_system_t *reset);
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#endif
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