110 lines
3.1 KiB
C
110 lines
3.1 KiB
C
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/*
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* USB xHCI controller for system-bus interface
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* Based on hcd-echi-sysbus.c
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* SPDX-FileCopyrightText: 2020 Xilinx
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* SPDX-FileContributor: Author: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#include "trace.h"
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#include "qapi/error.h"
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#include "hcd-xhci-sysbus.h"
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#include "hw/irq.h"
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static void xhci_sysbus_intr_raise(XHCIState *xhci, int n, bool level)
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{
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XHCISysbusState *s = container_of(xhci, XHCISysbusState, xhci);
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qemu_set_irq(s->irq[n], level);
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}
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void xhci_sysbus_reset(DeviceState *dev)
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{
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XHCISysbusState *s = XHCI_SYSBUS(dev);
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device_legacy_reset(DEVICE(&s->xhci));
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}
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static void xhci_sysbus_realize(DeviceState *dev, Error **errp)
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{
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XHCISysbusState *s = XHCI_SYSBUS(dev);
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Error *err = NULL;
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object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL);
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object_property_set_bool(OBJECT(&s->xhci), "realized", true, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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s->irq = g_new0(qemu_irq, s->xhci.numintrs);
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qdev_init_gpio_out_named(dev, s->irq, SYSBUS_DEVICE_GPIO_IRQ,
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s->xhci.numintrs);
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if (s->xhci.dma_mr) {
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s->xhci.as = g_malloc0(sizeof(AddressSpace));
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address_space_init(s->xhci.as, s->xhci.dma_mr, NULL);
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} else {
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s->xhci.as = &address_space_memory;
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}
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sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->xhci.mem);
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}
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static void xhci_sysbus_instance_init(Object *obj)
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{
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XHCISysbusState *s = XHCI_SYSBUS(obj);
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object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI);
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qdev_alias_all_properties(DEVICE(&s->xhci), obj);
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object_property_add_link(obj, "dma", TYPE_MEMORY_REGION,
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(Object **)&s->xhci.dma_mr,
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qdev_prop_allow_set_link_before_realize,
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OBJ_PROP_LINK_STRONG);
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s->xhci.intr_update = NULL;
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s->xhci.intr_raise = xhci_sysbus_intr_raise;
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}
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static Property xhci_sysbus_props[] = {
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DEFINE_PROP_UINT32("intrs", XHCISysbusState, xhci.numintrs, MAXINTRS),
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DEFINE_PROP_UINT32("slots", XHCISysbusState, xhci.numslots, MAXSLOTS),
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DEFINE_PROP_END_OF_LIST(),
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};
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static const VMStateDescription vmstate_xhci_sysbus = {
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.name = "xhci-sysbus",
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.version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT(xhci, XHCISysbusState, 1, vmstate_xhci, XHCIState),
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VMSTATE_END_OF_LIST()
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}
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};
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static void xhci_sysbus_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = xhci_sysbus_reset;
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dc->realize = xhci_sysbus_realize;
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dc->vmsd = &vmstate_xhci_sysbus;
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device_class_set_props(dc, xhci_sysbus_props);
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}
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static const TypeInfo xhci_sysbus_info = {
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.name = TYPE_XHCI_SYSBUS,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(XHCISysbusState),
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.class_init = xhci_sysbus_class_init,
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.instance_init = xhci_sysbus_instance_init
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};
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static void xhci_sysbus_register_types(void)
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{
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type_register_static(&xhci_sysbus_info);
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}
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type_init(xhci_sysbus_register_types);
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