2021-06-14 22:32:19 +03:00
|
|
|
/*
|
|
|
|
* QEMU Floppy disk emulator (Intel 82078)
|
|
|
|
*
|
|
|
|
* Copyright (c) 2003, 2007 Jocelyn Mayer
|
|
|
|
* Copyright (c) 2008 Hervé Poussineau
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "qemu/osdep.h"
|
|
|
|
#include "qapi/error.h"
|
|
|
|
#include "qom/object.h"
|
2024-01-14 15:39:02 +03:00
|
|
|
#include "exec/memory.h"
|
2021-06-14 22:32:19 +03:00
|
|
|
#include "hw/sysbus.h"
|
|
|
|
#include "hw/block/fdc.h"
|
|
|
|
#include "migration/vmstate.h"
|
|
|
|
#include "fdc-internal.h"
|
|
|
|
#include "trace.h"
|
|
|
|
|
|
|
|
#define TYPE_SYSBUS_FDC "base-sysbus-fdc"
|
|
|
|
typedef struct FDCtrlSysBusClass FDCtrlSysBusClass;
|
|
|
|
typedef struct FDCtrlSysBus FDCtrlSysBus;
|
|
|
|
DECLARE_OBJ_CHECKERS(FDCtrlSysBus, FDCtrlSysBusClass,
|
|
|
|
SYSBUS_FDC, TYPE_SYSBUS_FDC)
|
|
|
|
|
|
|
|
struct FDCtrlSysBusClass {
|
|
|
|
/*< private >*/
|
|
|
|
SysBusDeviceClass parent_class;
|
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
bool use_strict_io;
|
|
|
|
};
|
|
|
|
|
|
|
|
struct FDCtrlSysBus {
|
|
|
|
/*< private >*/
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
/*< public >*/
|
|
|
|
|
|
|
|
struct FDCtrl state;
|
2024-01-14 15:39:02 +03:00
|
|
|
MemoryRegion iomem;
|
2021-06-14 22:32:19 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
static uint64_t fdctrl_read_mem(void *opaque, hwaddr reg, unsigned ize)
|
|
|
|
{
|
|
|
|
return fdctrl_read(opaque, (uint32_t)reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fdctrl_write_mem(void *opaque, hwaddr reg,
|
|
|
|
uint64_t value, unsigned size)
|
|
|
|
{
|
|
|
|
fdctrl_write(opaque, (uint32_t)reg, value);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const MemoryRegionOps fdctrl_mem_ops = {
|
|
|
|
.read = fdctrl_read_mem,
|
|
|
|
.write = fdctrl_write_mem,
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const MemoryRegionOps fdctrl_mem_strict_ops = {
|
|
|
|
.read = fdctrl_read_mem,
|
|
|
|
.write = fdctrl_write_mem,
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
|
|
.valid = {
|
|
|
|
.min_access_size = 1,
|
|
|
|
.max_access_size = 1,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static void fdctrl_external_reset_sysbus(DeviceState *d)
|
|
|
|
{
|
|
|
|
FDCtrlSysBus *sys = SYSBUS_FDC(d);
|
|
|
|
FDCtrl *s = &sys->state;
|
|
|
|
|
|
|
|
fdctrl_reset(s, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fdctrl_handle_tc(void *opaque, int irq, int level)
|
|
|
|
{
|
|
|
|
trace_fdctrl_tc_pulse(level);
|
|
|
|
}
|
|
|
|
|
2022-05-05 13:18:42 +03:00
|
|
|
void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds)
|
2021-06-14 22:32:19 +03:00
|
|
|
{
|
|
|
|
DeviceState *dev;
|
|
|
|
SysBusDevice *sbd;
|
|
|
|
FDCtrlSysBus *sys;
|
|
|
|
|
|
|
|
dev = qdev_new("sysbus-fdc");
|
|
|
|
sys = SYSBUS_FDC(dev);
|
|
|
|
sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
sysbus_realize_and_unref(sbd, &error_fatal);
|
|
|
|
sysbus_connect_irq(sbd, 0, irq);
|
|
|
|
sysbus_mmio_map(sbd, 0, mmio_base);
|
|
|
|
|
|
|
|
fdctrl_init_drives(&sys->state.bus, fds);
|
|
|
|
}
|
|
|
|
|
|
|
|
void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
|
|
|
|
DriveInfo **fds, qemu_irq *fdc_tc)
|
|
|
|
{
|
|
|
|
DeviceState *dev;
|
|
|
|
FDCtrlSysBus *sys;
|
|
|
|
|
|
|
|
dev = qdev_new("sun-fdtwo");
|
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
|
|
|
sys = SYSBUS_FDC(dev);
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
|
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
|
|
|
|
*fdc_tc = qdev_get_gpio_in(dev, 0);
|
|
|
|
|
|
|
|
fdctrl_init_drives(&sys->state.bus, fds);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sysbus_fdc_common_instance_init(Object *obj)
|
|
|
|
{
|
|
|
|
DeviceState *dev = DEVICE(obj);
|
|
|
|
FDCtrlSysBusClass *sbdc = SYSBUS_FDC_GET_CLASS(obj);
|
|
|
|
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
|
|
|
|
FDCtrlSysBus *sys = SYSBUS_FDC(obj);
|
|
|
|
FDCtrl *fdctrl = &sys->state;
|
|
|
|
|
2022-05-05 13:18:42 +03:00
|
|
|
/*
|
|
|
|
* DMA is not currently supported for sysbus floppy controllers.
|
|
|
|
* If we wanted to add support then probably the best approach is
|
|
|
|
* to have a QOM link property 'dma-controller' which the board
|
|
|
|
* code can set to an instance of IsaDmaClass, and an integer
|
|
|
|
* property 'dma-channel', so that we can set fdctrl->dma and
|
|
|
|
* fdctrl->dma_chann accordingly.
|
|
|
|
*/
|
|
|
|
fdctrl->dma_chann = -1;
|
|
|
|
|
2021-06-14 22:32:19 +03:00
|
|
|
qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
|
|
|
|
|
2024-01-14 15:39:02 +03:00
|
|
|
memory_region_init_io(&sys->iomem, obj,
|
2021-06-14 22:32:19 +03:00
|
|
|
sbdc->use_strict_io ? &fdctrl_mem_strict_ops
|
|
|
|
: &fdctrl_mem_ops,
|
|
|
|
fdctrl, "fdc", 0x08);
|
2024-01-14 15:39:02 +03:00
|
|
|
sysbus_init_mmio(sbd, &sys->iomem);
|
2021-06-14 22:32:19 +03:00
|
|
|
|
|
|
|
sysbus_init_irq(sbd, &fdctrl->irq);
|
|
|
|
qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sysbus_fdc_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
FDCtrlSysBus *sys = SYSBUS_FDC(dev);
|
|
|
|
FDCtrl *fdctrl = &sys->state;
|
|
|
|
|
|
|
|
fdctrl_realize_common(dev, fdctrl, errp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_sysbus_fdc = {
|
|
|
|
.name = "fdc",
|
|
|
|
.version_id = 2,
|
|
|
|
.minimum_version_id = 2,
|
2023-12-21 06:16:05 +03:00
|
|
|
.fields = (const VMStateField[]) {
|
2021-06-14 22:32:19 +03:00
|
|
|
VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = sysbus_fdc_realize;
|
2024-09-13 17:31:44 +03:00
|
|
|
device_class_set_legacy_reset(dc, fdctrl_external_reset_sysbus);
|
2021-06-14 22:32:19 +03:00
|
|
|
dc->vmsd = &vmstate_sysbus_fdc;
|
|
|
|
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo sysbus_fdc_common_typeinfo = {
|
|
|
|
.name = TYPE_SYSBUS_FDC,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
.instance_size = sizeof(FDCtrlSysBus),
|
|
|
|
.instance_init = sysbus_fdc_common_instance_init,
|
|
|
|
.abstract = true,
|
|
|
|
.class_init = sysbus_fdc_common_class_init,
|
|
|
|
.class_size = sizeof(FDCtrlSysBusClass),
|
|
|
|
};
|
|
|
|
|
|
|
|
static Property sysbus_fdc_properties[] = {
|
|
|
|
DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
|
|
|
|
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
|
|
|
|
FloppyDriveType),
|
|
|
|
DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
|
|
|
|
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
|
|
|
|
FloppyDriveType),
|
|
|
|
DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
|
|
|
|
FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
|
|
|
|
FloppyDriveType),
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
2021-06-14 22:32:20 +03:00
|
|
|
dc->desc = "virtual floppy controller";
|
2021-06-14 22:32:19 +03:00
|
|
|
device_class_set_props(dc, sysbus_fdc_properties);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo sysbus_fdc_typeinfo = {
|
|
|
|
.name = "sysbus-fdc",
|
|
|
|
.parent = TYPE_SYSBUS_FDC,
|
|
|
|
.class_init = sysbus_fdc_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static Property sun4m_fdc_properties[] = {
|
|
|
|
DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
|
|
|
|
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
|
|
|
|
FloppyDriveType),
|
|
|
|
DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
|
|
|
|
FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
|
|
|
|
FloppyDriveType),
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
|
|
|
static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
FDCtrlSysBusClass *sbdc = SYSBUS_FDC_CLASS(klass);
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
sbdc->use_strict_io = true;
|
2021-06-14 22:32:20 +03:00
|
|
|
dc->desc = "virtual floppy controller";
|
2021-06-14 22:32:19 +03:00
|
|
|
device_class_set_props(dc, sun4m_fdc_properties);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const TypeInfo sun4m_fdc_typeinfo = {
|
|
|
|
.name = "sun-fdtwo",
|
|
|
|
.parent = TYPE_SYSBUS_FDC,
|
|
|
|
.class_init = sun4m_fdc_class_init,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void sysbus_fdc_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&sysbus_fdc_common_typeinfo);
|
|
|
|
type_register_static(&sysbus_fdc_typeinfo);
|
|
|
|
type_register_static(&sun4m_fdc_typeinfo);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(sysbus_fdc_register_types)
|