2021-06-27 17:28:16 +03:00
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'virt' Generic Virtual Platform (``virt``)
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==========================================
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2021-07-26 17:23:36 +03:00
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The ``virt`` board is a platform which does not correspond to any real hardware;
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2021-06-27 17:28:16 +03:00
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it is designed for use in virtual machines. It is the recommended board type
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if you simply want to run a guest such as Linux and do not care about
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reproducing the idiosyncrasies and limitations of a particular bit of
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real-world hardware.
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Supported devices
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-----------------
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The ``virt`` machine supports the following devices:
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2023-10-20 23:02:47 +03:00
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* Up to 512 generic RV32GC/RV64GC cores, with optional extensions
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2021-06-27 17:28:16 +03:00
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* Core Local Interruptor (CLINT)
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* Platform-Level Interrupt Controller (PLIC)
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* CFI parallel NOR flash memory
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* 1 NS16550 compatible UART
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* 1 Google Goldfish RTC
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* 1 SiFive Test device
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* 8 virtio-mmio transport devices
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* 1 generic PCIe host bridge
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* The fw_cfg device that allows a guest to obtain data from QEMU
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2022-02-08 16:07:23 +03:00
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The hypervisor extension has been enabled for the default CPU, so virtual
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machines with hypervisor extension can simply be used without explicitly
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declaring.
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2021-06-27 17:28:16 +03:00
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Hardware configuration information
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----------------------------------
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The ``virt`` machine automatically generates a device tree blob ("dtb")
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which it passes to the guest, if there is no ``-dtb`` option. This provides
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information about the addresses, interrupt lines and other configuration of
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the various devices in the system. Guest software should discover the devices
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that are present in the generated DTB.
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If users want to provide their own DTB, they can use the ``-dtb`` option.
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These DTBs should have the following requirements:
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* The number of subnodes of the /cpus node should match QEMU's ``-smp`` option
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* The /memory reg size should match QEMU’s selected ram_size via ``-m``
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* Should contain a node for the CLINT device with a compatible string
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"riscv,clint0" if using with OpenSBI BIOS images
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Boot options
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------------
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The ``virt`` machine can start using the standard -kernel functionality
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for loading a Linux kernel, a VxWorks kernel, an S-mode U-Boot bootloader
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with the default OpenSBI firmware image as the -bios. It also supports
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the recommended RISC-V bootflow: U-Boot SPL (M-mode) loads OpenSBI fw_dynamic
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firmware and U-Boot proper (S-mode), using the standard -bios functionality.
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2023-06-01 07:59:10 +03:00
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Using flash devices
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-------------------
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By default, the first flash device (pflash0) is expected to contain
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S-mode firmware code. It can be configured as read-only, with the
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second flash device (pflash1) available to store configuration data.
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For example, booting edk2 looks like
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.. code-block:: bash
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$ qemu-system-riscv64 \
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-blockdev node-name=pflash0,driver=file,read-only=on,filename=<edk2_code> \
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-blockdev node-name=pflash1,driver=file,filename=<edk2_vars> \
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-M virt,pflash0=pflash0,pflash1=pflash1 \
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... other args ....
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For TCG guests only, it is also possible to boot M-mode firmware from
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the first flash device (pflash0) by additionally passing ``-bios
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none``, as in
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.. code-block:: bash
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$ qemu-system-riscv64 \
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-bios none \
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-blockdev node-name=pflash0,driver=file,read-only=on,filename=<m_mode_code> \
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-M virt,pflash0=pflash0 \
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... other args ....
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Firmware images used for pflash must be exactly 32 MiB in size.
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2021-08-31 14:06:03 +03:00
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Machine-specific options
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------------------------
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The following machine-specific options are supported:
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- aclint=[on|off]
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When this option is "on", ACLINT devices will be emulated instead of
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SiFive CLINT. When not specified, this option is assumed to be "off".
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2023-06-29 15:11:03 +03:00
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This option is restricted to the TCG accelerator.
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2021-08-31 14:06:03 +03:00
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2023-12-20 22:34:36 +03:00
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- acpi=[on|off|auto]
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When this option is "on" (which is the default), ACPI tables are generated and
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exposed as firmware tables etc/acpi/rsdp and etc/acpi/tables.
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2022-02-20 11:55:25 +03:00
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- aia=[none|aplic|aplic-imsic]
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This option allows selecting interrupt controller defined by the AIA
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(advanced interrupt architecture) specification. The "aia=aplic" selects
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APLIC (advanced platform level interrupt controller) to handle wired
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interrupts whereas the "aia=aplic-imsic" selects APLIC and IMSIC (incoming
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message signaled interrupt controller) to handle both wired interrupts and
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MSIs. When not specified, this option is assumed to be "none" which selects
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SiFive PLIC to handle wired interrupts.
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- aia-guests=nnn
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The number of per-HART VS-level AIA IMSIC pages to be emulated for a guest
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having AIA IMSIC (i.e. "aia=aplic-imsic" selected). When not specified,
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the default number of per-HART VS-level AIA IMSIC pages is 0.
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2021-06-27 17:28:16 +03:00
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Running Linux kernel
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--------------------
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Linux mainline v5.12 release is tested at the time of writing. To build a
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Linux mainline kernel that can be booted by the ``virt`` machine in
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64-bit mode, simply configure the kernel using the defconfig configuration:
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.. code-block:: bash
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$ export ARCH=riscv
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$ export CROSS_COMPILE=riscv64-linux-
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$ make defconfig
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$ make
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To boot the newly built Linux kernel in QEMU with the ``virt`` machine:
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.. code-block:: bash
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$ qemu-system-riscv64 -M virt -smp 4 -m 2G \
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-display none -serial stdio \
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-kernel arch/riscv/boot/Image \
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-initrd /path/to/rootfs.cpio \
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-append "root=/dev/ram"
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To build a Linux mainline kernel that can be booted by the ``virt`` machine
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in 32-bit mode, use the rv32_defconfig configuration. A patch is required to
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fix the 32-bit boot issue for Linux kernel v5.12.
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.. code-block:: bash
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$ export ARCH=riscv
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$ export CROSS_COMPILE=riscv64-linux-
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$ curl https://patchwork.kernel.org/project/linux-riscv/patch/20210627135117.28641-1-bmeng.cn@gmail.com/mbox/ > riscv.patch
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$ git am riscv.patch
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$ make rv32_defconfig
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$ make
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Replace ``qemu-system-riscv64`` with ``qemu-system-riscv32`` in the command
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line above to boot the 32-bit Linux kernel. A rootfs image containing 32-bit
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applications shall be used in order for kernel to boot to user space.
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Running U-Boot
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--------------
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U-Boot mainline v2021.04 release is tested at the time of writing. To build an
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S-mode U-Boot bootloader that can be booted by the ``virt`` machine, use
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the qemu-riscv64_smode_defconfig with similar commands as described above for Linux:
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.. code-block:: bash
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$ export CROSS_COMPILE=riscv64-linux-
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$ make qemu-riscv64_smode_defconfig
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Boot the 64-bit U-Boot S-mode image directly:
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.. code-block:: bash
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$ qemu-system-riscv64 -M virt -smp 4 -m 2G \
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-display none -serial stdio \
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-kernel /path/to/u-boot.bin
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To test booting U-Boot SPL which in M-mode, which in turn loads a FIT image
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that bundles OpenSBI fw_dynamic firmware and U-Boot proper (S-mode) together,
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build the U-Boot images using riscv64_spl_defconfig:
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.. code-block:: bash
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$ export CROSS_COMPILE=riscv64-linux-
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$ export OPENSBI=/path/to/opensbi-riscv64-generic-fw_dynamic.bin
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$ make qemu-riscv64_spl_defconfig
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The minimal QEMU commands to run U-Boot SPL are:
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.. code-block:: bash
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$ qemu-system-riscv64 -M virt -smp 4 -m 2G \
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-display none -serial stdio \
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-bios /path/to/u-boot-spl \
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-device loader,file=/path/to/u-boot.itb,addr=0x80200000
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To test 32-bit U-Boot images, switch to use qemu-riscv32_smode_defconfig and
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riscv32_spl_defconfig builds, and replace ``qemu-system-riscv64`` with
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``qemu-system-riscv32`` in the command lines above to boot the 32-bit U-Boot.
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2022-04-28 02:41:46 +03:00
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Enabling TPM
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------------
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A TPM device can be connected to the virt board by following the steps below.
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2022-09-05 19:39:39 +03:00
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First launch the TPM emulator:
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2022-04-28 02:41:46 +03:00
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2022-09-05 19:39:39 +03:00
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.. code-block:: bash
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$ swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \
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--ctrl type=unixio,path=swtpm-sock
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2022-09-05 19:39:39 +03:00
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Then launch QEMU with some additional arguments to link a TPM device to the backend:
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.. code-block:: bash
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2022-04-28 02:41:46 +03:00
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2022-09-05 19:39:39 +03:00
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$ qemu-system-riscv64 \
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... other args .... \
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2022-04-28 02:41:46 +03:00
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-chardev socket,id=chrtpm,path=swtpm-sock \
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-tpmdev emulator,id=tpm0,chardev=chrtpm \
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-device tpm-tis-device,tpmdev=tpm0
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The TPM device can be seen in the memory tree and the generated device
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tree and should be accessible from the guest software.
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