2008-03-13 04:19:15 +03:00
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/*
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* QEMU NVRAM emulation for DS1225Y chip
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2008-03-13 22:23:00 +03:00
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*
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* Copyright (c) 2007-2008 Herv<EFBFBD> Poussineau
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*
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2008-03-13 04:19:15 +03:00
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2011-07-19 01:34:22 +04:00
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#include "sysbus.h"
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2011-07-19 01:34:21 +04:00
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#include "trace.h"
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2008-03-13 04:19:15 +03:00
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2011-07-19 01:34:22 +04:00
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typedef struct {
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DeviceState qdev;
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2008-03-13 22:23:00 +03:00
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uint32_t chip_size;
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2011-07-19 01:34:22 +04:00
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char *filename;
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2011-09-13 16:41:18 +04:00
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FILE *file;
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2008-03-13 22:23:00 +03:00
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uint8_t *contents;
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2011-07-19 01:34:22 +04:00
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} NvRamState;
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2008-03-13 04:19:15 +03:00
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2009-10-02 01:12:16 +04:00
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static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
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2008-03-13 04:19:15 +03:00
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{
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2011-07-19 01:34:22 +04:00
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NvRamState *s = opaque;
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2008-03-13 22:23:00 +03:00
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uint32_t val;
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2008-12-01 21:59:50 +03:00
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val = s->contents[addr];
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2011-07-19 01:34:21 +04:00
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trace_nvram_read(addr, val);
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2008-03-13 22:23:00 +03:00
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return val;
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}
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2008-03-13 04:19:15 +03:00
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2009-10-02 01:12:16 +04:00
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static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
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2008-03-13 22:23:00 +03:00
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{
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uint32_t v;
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v = nvram_readb(opaque, addr);
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v |= nvram_readb(opaque, addr + 1) << 8;
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return v;
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}
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2008-03-13 04:19:15 +03:00
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2009-10-02 01:12:16 +04:00
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static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
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2008-03-13 22:23:00 +03:00
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{
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uint32_t v;
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v = nvram_readb(opaque, addr);
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v |= nvram_readb(opaque, addr + 1) << 8;
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v |= nvram_readb(opaque, addr + 2) << 16;
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v |= nvram_readb(opaque, addr + 3) << 24;
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return v;
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2008-03-13 04:19:15 +03:00
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}
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2009-10-02 01:12:16 +04:00
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static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
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2008-03-13 04:19:15 +03:00
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{
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2011-07-19 01:34:22 +04:00
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NvRamState *s = opaque;
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2008-03-13 04:19:15 +03:00
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2011-07-19 01:34:21 +04:00
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val &= 0xff;
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trace_nvram_write(addr, s->contents[addr], val);
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2008-03-13 22:23:00 +03:00
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2011-07-19 01:34:21 +04:00
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s->contents[addr] = val;
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2008-03-13 22:23:00 +03:00
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if (s->file) {
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2011-09-13 16:41:18 +04:00
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fseek(s->file, addr, SEEK_SET);
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fputc(val, s->file);
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fflush(s->file);
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2008-03-13 04:19:15 +03:00
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}
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}
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2009-10-02 01:12:16 +04:00
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static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
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2008-03-13 22:23:00 +03:00
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{
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nvram_writeb(opaque, addr, val & 0xff);
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nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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}
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2009-10-02 01:12:16 +04:00
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static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
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2008-03-13 22:23:00 +03:00
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{
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nvram_writeb(opaque, addr, val & 0xff);
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nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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nvram_writeb(opaque, addr + 2, (val >> 16) & 0xff);
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nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
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}
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2009-08-25 22:29:31 +04:00
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static CPUReadMemoryFunc * const nvram_read[] = {
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2008-03-13 04:19:15 +03:00
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&nvram_readb,
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2008-03-13 22:23:00 +03:00
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&nvram_readw,
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&nvram_readl,
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2008-03-13 04:19:15 +03:00
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};
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2009-08-25 22:29:31 +04:00
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static CPUWriteMemoryFunc * const nvram_write[] = {
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2008-03-13 04:19:15 +03:00
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&nvram_writeb,
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2008-03-13 22:23:00 +03:00
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&nvram_writew,
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&nvram_writel,
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2008-03-13 04:19:15 +03:00
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};
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2011-07-19 01:34:22 +04:00
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static int nvram_post_load(void *opaque, int version_id)
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2008-03-13 04:19:15 +03:00
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{
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2011-07-19 01:34:22 +04:00
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NvRamState *s = opaque;
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/* Close file, as filename may has changed in load/store process */
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if (s->file) {
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2011-09-13 16:41:18 +04:00
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fclose(s->file);
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2011-07-19 01:34:22 +04:00
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}
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/* Write back nvram contents */
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2011-09-13 16:41:18 +04:00
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s->file = fopen(s->filename, "wb");
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2011-07-19 01:34:22 +04:00
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if (s->file) {
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/* Write back contents, as 'wb' mode cleaned the file */
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2011-09-13 16:41:18 +04:00
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if (fwrite(s->contents, s->chip_size, 1, s->file) != 1) {
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printf("nvram_post_load: short write\n");
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}
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fflush(s->file);
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2011-07-19 01:34:22 +04:00
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}
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return 0;
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}
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static const VMStateDescription vmstate_nvram = {
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.name = "nvram",
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.version_id = 0,
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.minimum_version_id = 0,
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.minimum_version_id_old = 0,
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.post_load = nvram_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
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vmstate_info_uint8, uint8_t),
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VMSTATE_END_OF_LIST()
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}
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};
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typedef struct {
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SysBusDevice busdev;
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NvRamState nvram;
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} SysBusNvRamState;
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static int nvram_sysbus_initfn(SysBusDevice *dev)
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{
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NvRamState *s = &FROM_SYSBUS(SysBusNvRamState, dev)->nvram;
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2011-09-13 16:41:18 +04:00
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FILE *file;
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2011-07-19 01:34:22 +04:00
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int s_io;
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2008-03-13 04:19:15 +03:00
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2011-08-21 07:09:37 +04:00
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s->contents = g_malloc0(s->chip_size);
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2008-03-13 22:23:00 +03:00
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2011-07-19 01:34:22 +04:00
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s_io = cpu_register_io_memory(nvram_read, nvram_write, s,
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, s->chip_size, s_io);
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2008-03-13 22:23:00 +03:00
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/* Read current file */
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2011-09-13 16:41:18 +04:00
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file = fopen(s->filename, "rb");
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2008-03-13 22:23:00 +03:00
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if (file) {
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/* Read nvram contents */
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2011-09-13 16:41:18 +04:00
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if (fread(s->contents, s->chip_size, 1, file) != 1) {
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printf("nvram_sysbus_initfn: short read\n");
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}
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fclose(file);
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2008-03-13 22:23:00 +03:00
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}
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2011-07-19 01:34:22 +04:00
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nvram_post_load(s, 0);
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2008-03-13 04:19:15 +03:00
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2011-07-19 01:34:22 +04:00
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return 0;
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2008-03-13 04:19:15 +03:00
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}
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2011-07-19 01:34:22 +04:00
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static SysBusDeviceInfo nvram_sysbus_info = {
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.qdev.name = "ds1225y",
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.qdev.size = sizeof(SysBusNvRamState),
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.qdev.vmsd = &vmstate_nvram,
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.init = nvram_sysbus_initfn,
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.qdev.props = (Property[]) {
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DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
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DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
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DEFINE_PROP_END_OF_LIST(),
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},
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};
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static void nvram_register(void)
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{
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sysbus_register_withprop(&nvram_sysbus_info);
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}
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device_init(nvram_register)
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