2007-09-17 01:08:06 +04:00
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/*
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2007-05-23 04:03:59 +04:00
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* QEMU SMBus device emulation.
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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2011-06-26 06:21:35 +04:00
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* This code is licensed under the LGPL.
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2007-05-23 04:03:59 +04:00
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*/
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/* TODO: Implement PEC. */
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2016-01-26 21:17:30 +03:00
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#include "qemu/osdep.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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2013-02-05 20:06:20 +04:00
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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2007-05-23 04:03:59 +04:00
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//#define DEBUG_SMBUS 1
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#ifdef DEBUG_SMBUS
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2009-05-13 21:53:17 +04:00
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#define DPRINTF(fmt, ...) \
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do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
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2007-05-23 04:03:59 +04:00
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#else
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2009-05-13 21:53:17 +04:00
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#define DPRINTF(fmt, ...) do {} while(0)
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#define BADF(fmt, ...) \
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do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
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2007-05-23 04:03:59 +04:00
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#endif
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enum {
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SMBUS_IDLE,
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SMBUS_WRITE_DATA,
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SMBUS_RECV_BYTE,
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SMBUS_READ_DATA,
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SMBUS_DONE,
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SMBUS_CONFUSED = -1
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};
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static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
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{
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2011-12-05 06:39:20 +04:00
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SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
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2009-05-15 01:35:08 +04:00
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2007-05-23 04:03:59 +04:00
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DPRINTF("Quick Command %d\n", recv);
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2011-12-05 06:39:20 +04:00
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if (sc->quick_cmd) {
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sc->quick_cmd(dev, recv);
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}
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2007-05-23 04:03:59 +04:00
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}
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static void smbus_do_write(SMBusDevice *dev)
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{
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2011-12-05 06:39:20 +04:00
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SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
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2009-05-15 01:35:08 +04:00
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2007-05-23 04:03:59 +04:00
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if (dev->data_len == 0) {
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smbus_do_quick_cmd(dev, 0);
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} else if (dev->data_len == 1) {
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DPRINTF("Send Byte\n");
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2011-12-05 06:39:20 +04:00
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if (sc->send_byte) {
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sc->send_byte(dev, dev->data_buf[0]);
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2007-05-23 04:03:59 +04:00
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}
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} else {
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dev->command = dev->data_buf[0];
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DPRINTF("Command %d len %d\n", dev->command, dev->data_len - 1);
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2011-12-05 06:39:20 +04:00
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if (sc->write_data) {
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sc->write_data(dev, dev->command, dev->data_buf + 1,
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dev->data_len - 1);
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2007-05-23 04:03:59 +04:00
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}
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}
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}
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2017-01-09 14:40:20 +03:00
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static int smbus_i2c_event(I2CSlave *s, enum i2c_event event)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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SMBusDevice *dev = SMBUS_DEVICE(s);
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2009-05-15 01:35:08 +04:00
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2007-05-23 04:03:59 +04:00
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switch (event) {
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case I2C_START_SEND:
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switch (dev->mode) {
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case SMBUS_IDLE:
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DPRINTF("Incoming data\n");
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dev->mode = SMBUS_WRITE_DATA;
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break;
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default:
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BADF("Unexpected send start condition in state %d\n", dev->mode);
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dev->mode = SMBUS_CONFUSED;
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break;
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}
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break;
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case I2C_START_RECV:
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switch (dev->mode) {
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case SMBUS_IDLE:
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DPRINTF("Read mode\n");
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dev->mode = SMBUS_RECV_BYTE;
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break;
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case SMBUS_WRITE_DATA:
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if (dev->data_len == 0) {
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BADF("Read after write with no data\n");
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dev->mode = SMBUS_CONFUSED;
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} else {
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if (dev->data_len > 1) {
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smbus_do_write(dev);
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} else {
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dev->command = dev->data_buf[0];
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DPRINTF("%02x: Command %d\n", dev->i2c.address,
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dev->command);
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}
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DPRINTF("Read mode\n");
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dev->data_len = 0;
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dev->mode = SMBUS_READ_DATA;
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}
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break;
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default:
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BADF("Unexpected recv start condition in state %d\n", dev->mode);
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dev->mode = SMBUS_CONFUSED;
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break;
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}
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break;
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case I2C_FINISH:
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switch (dev->mode) {
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case SMBUS_WRITE_DATA:
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smbus_do_write(dev);
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break;
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case SMBUS_RECV_BYTE:
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smbus_do_quick_cmd(dev, 1);
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break;
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case SMBUS_READ_DATA:
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BADF("Unexpected stop during receive\n");
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break;
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default:
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/* Nothing to do. */
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break;
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}
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dev->mode = SMBUS_IDLE;
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dev->data_len = 0;
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break;
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case I2C_NACK:
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switch (dev->mode) {
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case SMBUS_DONE:
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/* Nothing to do. */
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break;
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case SMBUS_READ_DATA:
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dev->mode = SMBUS_DONE;
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break;
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default:
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BADF("Unexpected NACK in state %d\n", dev->mode);
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dev->mode = SMBUS_CONFUSED;
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break;
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}
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}
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2017-01-09 14:40:20 +03:00
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return 0;
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2007-05-23 04:03:59 +04:00
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}
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2011-12-05 06:28:27 +04:00
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static int smbus_i2c_recv(I2CSlave *s)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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SMBusDevice *dev = SMBUS_DEVICE(s);
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SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
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2007-05-23 04:03:59 +04:00
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int ret;
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switch (dev->mode) {
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case SMBUS_RECV_BYTE:
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2011-12-05 06:39:20 +04:00
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if (sc->receive_byte) {
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ret = sc->receive_byte(dev);
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2007-05-23 04:03:59 +04:00
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} else {
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ret = 0;
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}
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DPRINTF("Receive Byte %02x\n", ret);
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dev->mode = SMBUS_DONE;
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break;
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case SMBUS_READ_DATA:
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2011-12-05 06:39:20 +04:00
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if (sc->read_data) {
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ret = sc->read_data(dev, dev->command, dev->data_len);
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2007-05-23 04:03:59 +04:00
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dev->data_len++;
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} else {
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ret = 0;
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}
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DPRINTF("Read data %02x\n", ret);
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break;
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default:
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BADF("Unexpected read in state %d\n", dev->mode);
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dev->mode = SMBUS_CONFUSED;
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ret = 0;
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break;
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}
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return ret;
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}
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2011-12-05 06:28:27 +04:00
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static int smbus_i2c_send(I2CSlave *s, uint8_t data)
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2007-05-23 04:03:59 +04:00
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{
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2011-12-05 06:39:20 +04:00
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SMBusDevice *dev = SMBUS_DEVICE(s);
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2009-05-15 01:35:08 +04:00
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2007-05-23 04:03:59 +04:00
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switch (dev->mode) {
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case SMBUS_WRITE_DATA:
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DPRINTF("Write data %02x\n", data);
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2018-12-03 15:52:50 +03:00
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if (dev->data_len >= sizeof(dev->data_buf)) {
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BADF("Too many bytes sent\n");
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} else {
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dev->data_buf[dev->data_len++] = data;
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}
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2007-05-23 04:03:59 +04:00
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break;
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default:
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BADF("Unexpected write in state %d\n", dev->mode);
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break;
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}
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return 0;
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}
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/* Master device commands. */
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2014-03-31 20:26:30 +04:00
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int smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
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2007-05-23 04:03:59 +04:00
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{
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, read)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_end_transfer(bus);
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2014-03-31 20:26:30 +04:00
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return 0;
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2007-05-23 04:03:59 +04:00
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}
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2014-03-31 20:26:29 +04:00
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int smbus_receive_byte(I2CBus *bus, uint8_t addr)
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2007-05-23 04:03:59 +04:00
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{
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uint8_t data;
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 1)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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2014-03-31 20:26:30 +04:00
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int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
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2007-05-23 04:03:59 +04:00
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{
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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2014-03-31 20:26:30 +04:00
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return 0;
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2007-05-23 04:03:59 +04:00
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}
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2014-03-31 20:26:29 +04:00
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int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
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2007-05-23 04:03:59 +04:00
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{
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uint8_t data;
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_send(bus, command);
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2016-10-24 18:42:33 +03:00
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if (i2c_start_transfer(bus, addr, 1)) {
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2017-01-09 14:40:20 +03:00
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i2c_end_transfer(bus);
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return -1;
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2016-10-24 18:42:33 +03:00
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}
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2007-05-23 04:03:59 +04:00
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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2014-03-31 20:26:30 +04:00
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int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
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2007-05-23 04:03:59 +04:00
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{
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_send(bus, command);
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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2014-03-31 20:26:30 +04:00
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return 0;
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2007-05-23 04:03:59 +04:00
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}
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2014-03-31 20:26:29 +04:00
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int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
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2007-05-23 04:03:59 +04:00
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{
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uint16_t data;
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_send(bus, command);
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2016-10-24 18:42:33 +03:00
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if (i2c_start_transfer(bus, addr, 1)) {
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2017-01-09 14:40:20 +03:00
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i2c_end_transfer(bus);
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return -1;
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2016-10-24 18:42:33 +03:00
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}
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2007-05-23 04:03:59 +04:00
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data = i2c_recv(bus);
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data |= i2c_recv(bus) << 8;
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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2014-03-31 20:26:30 +04:00
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int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
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2007-05-23 04:03:59 +04:00
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{
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2014-03-31 20:26:30 +04:00
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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2007-05-23 04:03:59 +04:00
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i2c_send(bus, command);
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i2c_send(bus, data & 0xff);
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i2c_send(bus, data >> 8);
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i2c_end_transfer(bus);
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2014-03-31 20:26:30 +04:00
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return 0;
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2007-05-23 04:03:59 +04:00
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}
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2018-08-20 23:26:02 +03:00
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int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
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int len, bool recv_len, bool send_cmd)
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2007-05-23 04:03:59 +04:00
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{
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2018-08-20 23:26:02 +03:00
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int rlen;
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2007-05-23 04:03:59 +04:00
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int i;
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2018-08-20 23:26:02 +03:00
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if (send_cmd) {
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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2014-03-31 20:26:30 +04:00
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}
|
2016-10-24 18:42:33 +03:00
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if (i2c_start_transfer(bus, addr, 1)) {
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2018-08-20 23:26:02 +03:00
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if (send_cmd) {
|
|
|
|
i2c_end_transfer(bus);
|
|
|
|
}
|
2017-01-09 14:40:20 +03:00
|
|
|
return -1;
|
2016-10-24 18:42:33 +03:00
|
|
|
}
|
2018-08-20 23:26:02 +03:00
|
|
|
if (recv_len) {
|
|
|
|
rlen = i2c_recv(bus);
|
|
|
|
} else {
|
|
|
|
rlen = len;
|
2014-03-31 20:26:30 +04:00
|
|
|
}
|
2018-08-20 23:26:02 +03:00
|
|
|
if (rlen > len) {
|
|
|
|
rlen = 0;
|
|
|
|
}
|
|
|
|
for (i = 0; i < rlen; i++) {
|
2007-05-23 04:03:59 +04:00
|
|
|
data[i] = i2c_recv(bus);
|
2014-03-31 20:26:30 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
i2c_nack(bus);
|
|
|
|
i2c_end_transfer(bus);
|
2018-08-20 23:26:02 +03:00
|
|
|
return rlen;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
|
|
|
|
2014-03-31 20:26:30 +04:00
|
|
|
int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
2018-08-20 23:26:02 +03:00
|
|
|
int len, bool send_len)
|
2007-05-23 04:03:59 +04:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (len > 32)
|
|
|
|
len = 32;
|
|
|
|
|
2014-03-31 20:26:30 +04:00
|
|
|
if (i2c_start_transfer(bus, addr, 0)) {
|
|
|
|
return -1;
|
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
i2c_send(bus, command);
|
2018-08-20 23:26:02 +03:00
|
|
|
if (send_len) {
|
|
|
|
i2c_send(bus, len);
|
|
|
|
}
|
2014-03-31 20:26:30 +04:00
|
|
|
for (i = 0; i < len; i++) {
|
2007-05-23 04:03:59 +04:00
|
|
|
i2c_send(bus, data[i]);
|
2014-03-31 20:26:30 +04:00
|
|
|
}
|
2007-05-23 04:03:59 +04:00
|
|
|
i2c_end_transfer(bus);
|
2014-03-31 20:26:30 +04:00
|
|
|
return 0;
|
2007-05-23 04:03:59 +04:00
|
|
|
}
|
2011-12-05 06:39:20 +04:00
|
|
|
|
|
|
|
static void smbus_device_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
|
|
|
|
|
|
|
|
sc->event = smbus_i2c_event;
|
|
|
|
sc->recv = smbus_i2c_recv;
|
|
|
|
sc->send = smbus_i2c_send;
|
|
|
|
}
|
|
|
|
|
2013-01-10 19:19:07 +04:00
|
|
|
static const TypeInfo smbus_device_type_info = {
|
2011-12-05 06:39:20 +04:00
|
|
|
.name = TYPE_SMBUS_DEVICE,
|
|
|
|
.parent = TYPE_I2C_SLAVE,
|
|
|
|
.instance_size = sizeof(SMBusDevice),
|
|
|
|
.abstract = true,
|
|
|
|
.class_size = sizeof(SMBusDeviceClass),
|
|
|
|
.class_init = smbus_device_class_init,
|
|
|
|
};
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
static void smbus_device_register_types(void)
|
2011-12-05 06:39:20 +04:00
|
|
|
{
|
|
|
|
type_register_static(&smbus_device_type_info);
|
|
|
|
}
|
|
|
|
|
2012-02-09 18:20:55 +04:00
|
|
|
type_init(smbus_device_register_types)
|