2007-11-25 04:57:38 +03:00
|
|
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/*
|
|
|
|
* PXA270-based Intel Mainstone platforms.
|
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*
|
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* Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
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* <akuster@mvista.com>
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*
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* Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This code is licensed under the GNU GPL v2.
|
2012-01-13 20:44:23 +04:00
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
|
2007-11-25 04:57:38 +03:00
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|
*/
|
2015-12-07 19:23:45 +03:00
|
|
|
#include "qemu/osdep.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 11:01:28 +03:00
|
|
|
#include "qapi/error.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/hw.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/arm/pxa.h"
|
2013-04-09 18:26:55 +04:00
|
|
|
#include "hw/arm/arm.h"
|
2012-10-24 10:43:34 +04:00
|
|
|
#include "net/net.h"
|
2013-04-09 18:26:55 +04:00
|
|
|
#include "hw/devices.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/boards.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/block/flash.h"
|
2014-10-07 15:59:13 +04:00
|
|
|
#include "sysemu/block-backend.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/sysbus.h"
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/address-spaces.h"
|
2013-07-29 19:12:41 +04:00
|
|
|
#include "sysemu/qtest.h"
|
2017-09-13 19:04:57 +03:00
|
|
|
#include "cpu.h"
|
2007-11-25 04:57:38 +03:00
|
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|
2011-02-12 03:15:25 +03:00
|
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|
/* Device addresses */
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|
#define MST_FPGA_PHYS 0x08000000
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|
|
#define MST_ETH_PHYS 0x10000300
|
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|
|
#define MST_FLASH_0 0x00000000
|
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|
|
#define MST_FLASH_1 0x04000000
|
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|
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|
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|
|
/* IRQ definitions */
|
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|
|
#define MMC_IRQ 0
|
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|
|
#define USIM_IRQ 1
|
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|
|
#define USBC_IRQ 2
|
|
|
|
#define ETHERNET_IRQ 3
|
|
|
|
#define AC97_IRQ 4
|
|
|
|
#define PEN_IRQ 5
|
|
|
|
#define MSINS_IRQ 6
|
|
|
|
#define EXBRD_IRQ 7
|
|
|
|
#define S0_CD_IRQ 9
|
|
|
|
#define S0_STSCHG_IRQ 10
|
|
|
|
#define S0_IRQ 11
|
|
|
|
#define S1_CD_IRQ 13
|
|
|
|
#define S1_STSCHG_IRQ 14
|
|
|
|
#define S1_IRQ 15
|
|
|
|
|
2013-12-22 18:22:57 +04:00
|
|
|
static const struct keymap map[0xE0] = {
|
2007-12-16 15:19:43 +03:00
|
|
|
[0 ... 0xDF] = { -1, -1 },
|
|
|
|
[0x1e] = {0,0}, /* a */
|
|
|
|
[0x30] = {0,1}, /* b */
|
|
|
|
[0x2e] = {0,2}, /* c */
|
|
|
|
[0x20] = {0,3}, /* d */
|
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|
[0x12] = {0,4}, /* e */
|
|
|
|
[0x21] = {0,5}, /* f */
|
|
|
|
[0x22] = {1,0}, /* g */
|
|
|
|
[0x23] = {1,1}, /* h */
|
|
|
|
[0x17] = {1,2}, /* i */
|
|
|
|
[0x24] = {1,3}, /* j */
|
|
|
|
[0x25] = {1,4}, /* k */
|
|
|
|
[0x26] = {1,5}, /* l */
|
|
|
|
[0x32] = {2,0}, /* m */
|
|
|
|
[0x31] = {2,1}, /* n */
|
|
|
|
[0x18] = {2,2}, /* o */
|
|
|
|
[0x19] = {2,3}, /* p */
|
|
|
|
[0x10] = {2,4}, /* q */
|
|
|
|
[0x13] = {2,5}, /* r */
|
|
|
|
[0x1f] = {3,0}, /* s */
|
|
|
|
[0x14] = {3,1}, /* t */
|
|
|
|
[0x16] = {3,2}, /* u */
|
|
|
|
[0x2f] = {3,3}, /* v */
|
|
|
|
[0x11] = {3,4}, /* w */
|
|
|
|
[0x2d] = {3,5}, /* x */
|
2016-10-04 15:28:08 +03:00
|
|
|
[0x34] = {4,0}, /* . */
|
2007-12-16 15:19:43 +03:00
|
|
|
[0x15] = {4,2}, /* y */
|
|
|
|
[0x2c] = {4,3}, /* z */
|
2016-10-04 15:28:08 +03:00
|
|
|
[0x35] = {4,4}, /* / */
|
2007-12-16 15:19:43 +03:00
|
|
|
[0xc7] = {5,0}, /* Home */
|
|
|
|
[0x2a] = {5,1}, /* shift */
|
2013-12-22 23:42:05 +04:00
|
|
|
/*
|
|
|
|
* There are two matrix positions which map to space,
|
|
|
|
* but QEMU can only use one of them for the reverse
|
|
|
|
* mapping, so simply use the second one.
|
|
|
|
*/
|
|
|
|
/* [0x39] = {5,2}, space */
|
2007-12-16 15:19:43 +03:00
|
|
|
[0x39] = {5,3}, /* space */
|
2013-12-22 23:42:05 +04:00
|
|
|
/*
|
|
|
|
* Matrix position {5,4} and other keys are missing here.
|
|
|
|
* TODO: Compare with Linux code and test real hardware.
|
|
|
|
*/
|
2016-10-04 15:28:07 +03:00
|
|
|
[0x1c] = {5,4}, /* enter */
|
2016-10-04 15:28:08 +03:00
|
|
|
[0x0e] = {5,5}, /* backspace */
|
2007-12-16 15:19:43 +03:00
|
|
|
[0xc8] = {6,0}, /* up */
|
|
|
|
[0xd0] = {6,1}, /* down */
|
|
|
|
[0xcb] = {6,2}, /* left */
|
|
|
|
[0xcd] = {6,3}, /* right */
|
|
|
|
};
|
|
|
|
|
2007-11-25 04:57:38 +03:00
|
|
|
enum mainstone_model_e { mainstone };
|
|
|
|
|
2008-04-24 21:59:27 +04:00
|
|
|
#define MAINSTONE_RAM 0x04000000
|
|
|
|
#define MAINSTONE_ROM 0x00800000
|
|
|
|
#define MAINSTONE_FLASH 0x02000000
|
|
|
|
|
2008-04-15 00:27:51 +04:00
|
|
|
static struct arm_boot_info mainstone_binfo = {
|
|
|
|
.loader_start = PXA2XX_SDRAM_BASE,
|
|
|
|
.ram_size = 0x04000000,
|
|
|
|
};
|
|
|
|
|
2011-08-08 22:08:45 +04:00
|
|
|
static void mainstone_common_init(MemoryRegion *address_space_mem,
|
2014-05-07 18:42:57 +04:00
|
|
|
MachineState *machine,
|
2012-10-30 11:45:08 +04:00
|
|
|
enum mainstone_model_e model, int arm_id)
|
2007-11-25 04:57:38 +03:00
|
|
|
{
|
2008-01-05 22:29:17 +03:00
|
|
|
uint32_t sector_len = 256 * 1024;
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
|
2012-05-14 03:11:15 +04:00
|
|
|
PXA2xxState *mpu;
|
2011-02-12 03:15:24 +03:00
|
|
|
DeviceState *mst_irq;
|
2009-07-22 18:42:57 +04:00
|
|
|
DriveInfo *dinfo;
|
|
|
|
int i;
|
2011-08-25 23:39:18 +04:00
|
|
|
int be;
|
2011-08-08 22:08:45 +04:00
|
|
|
MemoryRegion *rom = g_new(MemoryRegion, 1);
|
2007-11-25 04:57:38 +03:00
|
|
|
|
|
|
|
/* Setup CPU & memory */
|
2017-09-13 19:04:57 +03:00
|
|
|
mpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size,
|
|
|
|
machine->cpu_type);
|
2017-07-07 17:42:53 +03:00
|
|
|
memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM,
|
Fix bad error handling after memory_region_init_ram()
Symptom:
$ qemu-system-x86_64 -m 10000000
Unexpected error in ram_block_add() at /work/armbru/qemu/exec.c:1456:
upstream-qemu: cannot set up guest memory 'pc.ram': Cannot allocate memory
Aborted (core dumped)
Root cause: commit ef701d7 screwed up handling of out-of-memory
conditions. Before the commit, we report the error and exit(1), in
one place, ram_block_add(). The commit lifts the error handling up
the call chain some, to three places. Fine. Except it uses
&error_abort in these places, changing the behavior from exit(1) to
abort(), and thus undoing the work of commit 3922825 "exec: Don't
abort when we can't allocate guest memory".
The three places are:
* memory_region_init_ram()
Commit 4994653 (right after commit ef701d7) lifted the error
handling further, through memory_region_init_ram(), multiplying the
incorrect use of &error_abort. Later on, imitation of existing
(bad) code may have created more.
* memory_region_init_ram_ptr()
The &error_abort is still there.
* memory_region_init_rom_device()
Doesn't need fixing, because commit 33e0eb5 (soon after commit
ef701d7) lifted the error handling further, and in the process
changed it from &error_abort to passing it up the call chain.
Correct, because the callers are realize() methods.
Fix the error handling after memory_region_init_ram() with a
Coccinelle semantic patch:
@r@
expression mr, owner, name, size, err;
position p;
@@
memory_region_init_ram(mr, owner, name, size,
(
- &error_abort
+ &error_fatal
|
err@p
)
);
@script:python@
p << r.p;
@@
print "%s:%s:%s" % (p[0].file, p[0].line, p[0].column)
When the last argument is &error_abort, it gets replaced by
&error_fatal. This is the fix.
If the last argument is anything else, its position is reported. This
lets us check the fix is complete. Four positions get reported:
* ram_backend_memory_alloc()
Error is passed up the call chain, ultimately through
user_creatable_complete(). As far as I can tell, it's callers all
handle the error sanely.
* fsl_imx25_realize(), fsl_imx31_realize(), dp8393x_realize()
DeviceClass.realize() methods, errors handled sanely further up the
call chain.
We're good. Test case again behaves:
$ qemu-system-x86_64 -m 10000000
qemu-system-x86_64: cannot set up guest memory 'pc.ram': Cannot allocate memory
[Exit 1 ]
The next commits will repair the rest of commit ef701d7's damage.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1441983105-26376-3-git-send-email-armbru@redhat.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
2015-09-11 17:51:43 +03:00
|
|
|
&error_fatal);
|
2011-08-08 22:08:45 +04:00
|
|
|
memory_region_set_readonly(rom, true);
|
|
|
|
memory_region_add_subregion(address_space_mem, 0, rom);
|
2007-11-25 04:57:38 +03:00
|
|
|
|
2010-03-29 23:23:56 +04:00
|
|
|
#ifdef TARGET_WORDS_BIGENDIAN
|
2011-08-25 23:39:18 +04:00
|
|
|
be = 1;
|
2010-03-29 23:23:56 +04:00
|
|
|
#else
|
2011-08-25 23:39:18 +04:00
|
|
|
be = 0;
|
2010-03-29 23:23:56 +04:00
|
|
|
#endif
|
2007-12-02 07:51:10 +03:00
|
|
|
/* There are two 32MiB flash devices on the board */
|
2008-01-05 22:29:17 +03:00
|
|
|
for (i = 0; i < 2; i ++) {
|
2009-07-22 18:42:57 +04:00
|
|
|
dinfo = drive_get(IF_PFLASH, 0, i);
|
|
|
|
if (!dinfo) {
|
2013-07-29 19:12:41 +04:00
|
|
|
if (qtest_enabled()) {
|
|
|
|
break;
|
|
|
|
}
|
2008-01-05 22:29:17 +03:00
|
|
|
fprintf(stderr, "Two flash images must be given with the "
|
|
|
|
"'pflash' parameter\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2011-08-04 16:55:30 +04:00
|
|
|
if (!pflash_cfi01_register(mainstone_flash_base[i], NULL,
|
|
|
|
i ? "mainstone.flash1" : "mainstone.flash0",
|
|
|
|
MAINSTONE_FLASH,
|
2014-10-07 15:59:18 +04:00
|
|
|
blk_by_legacy_dinfo(dinfo),
|
2014-10-07 15:59:13 +04:00
|
|
|
sector_len, MAINSTONE_FLASH / sector_len,
|
|
|
|
4, 0, 0, 0, 0, be)) {
|
2008-01-05 22:29:17 +03:00
|
|
|
fprintf(stderr, "qemu: Error registering flash memory.\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2007-12-02 07:51:10 +03:00
|
|
|
}
|
2007-12-02 05:20:03 +03:00
|
|
|
|
2011-02-12 03:15:24 +03:00
|
|
|
mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
|
2012-05-14 03:11:15 +04:00
|
|
|
qdev_get_gpio_in(mpu->gpio, 0));
|
2007-12-09 05:38:34 +03:00
|
|
|
|
2007-12-16 15:19:43 +03:00
|
|
|
/* setup keypad */
|
2012-05-14 03:11:15 +04:00
|
|
|
pxa27x_register_keypad(mpu->kp, map, 0xe0);
|
2007-12-16 15:19:43 +03:00
|
|
|
|
2007-12-09 05:38:34 +03:00
|
|
|
/* MMC/SD host */
|
2012-05-14 03:11:15 +04:00
|
|
|
pxa2xx_mmci_handlers(mpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
|
2007-12-09 05:38:34 +03:00
|
|
|
|
2012-05-14 03:11:15 +04:00
|
|
|
pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[0],
|
2011-03-04 03:54:59 +03:00
|
|
|
qdev_get_gpio_in(mst_irq, S0_IRQ),
|
|
|
|
qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
|
2012-05-14 03:11:15 +04:00
|
|
|
pxa2xx_pcmcia_set_irq_cb(mpu->pcmcia[1],
|
2011-03-04 03:54:59 +03:00
|
|
|
qdev_get_gpio_in(mst_irq, S1_IRQ),
|
|
|
|
qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
|
|
|
|
|
2011-02-12 03:15:24 +03:00
|
|
|
smc91c111_init(&nd_table[0], MST_ETH_PHYS,
|
|
|
|
qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
|
2007-11-25 04:57:38 +03:00
|
|
|
|
2014-05-07 18:42:57 +04:00
|
|
|
mainstone_binfo.kernel_filename = machine->kernel_filename;
|
|
|
|
mainstone_binfo.kernel_cmdline = machine->kernel_cmdline;
|
|
|
|
mainstone_binfo.initrd_filename = machine->initrd_filename;
|
2008-04-15 00:27:51 +04:00
|
|
|
mainstone_binfo.board_id = arm_id;
|
2012-05-14 04:39:57 +04:00
|
|
|
arm_load_kernel(mpu->cpu, &mainstone_binfo);
|
2007-11-25 04:57:38 +03:00
|
|
|
}
|
|
|
|
|
2014-05-07 18:42:57 +04:00
|
|
|
static void mainstone_init(MachineState *machine)
|
2007-11-25 04:57:38 +03:00
|
|
|
{
|
2014-05-07 18:42:57 +04:00
|
|
|
mainstone_common_init(get_system_memory(), machine, mainstone, 0x196);
|
2007-11-25 04:57:38 +03:00
|
|
|
}
|
|
|
|
|
2015-09-04 21:37:08 +03:00
|
|
|
static void mainstone2_machine_init(MachineClass *mc)
|
2009-05-21 03:38:09 +04:00
|
|
|
{
|
2015-09-04 21:37:08 +03:00
|
|
|
mc->desc = "Mainstone II (PXA27x)";
|
|
|
|
mc->init = mainstone_init;
|
2017-09-07 15:54:54 +03:00
|
|
|
mc->ignore_memory_transaction_failures = true;
|
2017-09-13 19:04:57 +03:00
|
|
|
mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
|
2009-05-21 03:38:09 +04:00
|
|
|
}
|
|
|
|
|
2015-09-04 21:37:08 +03:00
|
|
|
DEFINE_MACHINE("mainstone", mainstone2_machine_init)
|