2004-01-05 01:58:38 +03:00
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/*
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2005-07-03 00:59:34 +04:00
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* PowerPC emulation helpers for qemu.
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2004-01-05 01:58:38 +03:00
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*
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2005-07-03 00:59:34 +04:00
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* Copyright (c) 2003-2005 Jocelyn Mayer
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2004-01-05 01:58:38 +03:00
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <math.h>
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#include "exec.h"
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#define MEMSUFFIX _raw
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#include "op_helper_mem.h"
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2004-04-13 00:39:29 +04:00
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#if !defined(CONFIG_USER_ONLY)
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2004-01-05 01:58:38 +03:00
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#define MEMSUFFIX _user
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#include "op_helper_mem.h"
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#define MEMSUFFIX _kernel
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#include "op_helper_mem.h"
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#endif
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2005-07-05 02:17:05 +04:00
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define FLUSH_ALL_TLBS
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#define Ts0 (long)((target_long)T0)
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#define Ts1 (long)((target_long)T1)
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#define Ts2 (long)((target_long)T2)
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2004-01-05 01:58:38 +03:00
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/*****************************************************************************/
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/* Exceptions processing helpers */
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2004-05-21 16:59:32 +04:00
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void cpu_loop_exit(void)
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2004-01-05 01:58:38 +03:00
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{
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2004-05-21 16:59:32 +04:00
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longjmp(env->jmp_env, 1);
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2004-01-05 01:58:38 +03:00
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}
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2004-05-21 16:59:32 +04:00
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void do_raise_exception_err (uint32_t exception, int error_code)
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2004-01-05 01:58:38 +03:00
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{
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2004-05-21 16:59:32 +04:00
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case EXCP_PROGRAM:
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if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0)
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return;
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break;
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default:
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break;
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2004-01-05 01:58:38 +03:00
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}
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2004-05-21 16:59:32 +04:00
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env->exception_index = exception;
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env->error_code = error_code;
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2004-01-05 01:58:38 +03:00
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cpu_loop_exit();
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}
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2004-05-21 16:59:32 +04:00
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void do_raise_exception (uint32_t exception)
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{
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do_raise_exception_err(exception, 0);
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2004-01-05 01:58:38 +03:00
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}
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/*****************************************************************************/
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2005-07-05 02:17:05 +04:00
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/* Fixed point operations helpers */
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void do_addo (void)
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{
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T2 = T0;
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T0 += T1;
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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}
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void do_addco (void)
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{
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T2 = T0;
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T0 += T1;
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if (likely(T0 >= T2)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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}
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void do_adde (void)
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{
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T2 = T0;
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T0 += T1 + xer_ca;
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if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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}
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void do_addeo (void)
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{
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T2 = T0;
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T0 += T1 + xer_ca;
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if (likely(!(T0 < T2 || (xer_ca == 1 && T0 == T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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if (likely(!((T2 ^ T1 ^ (-1)) & (T2 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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}
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void do_addmeo (void)
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{
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T1 = T0;
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T0 += xer_ca + (-1);
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if (likely(!(T1 & (T1 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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if (likely(T1 != 0))
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xer_ca = 1;
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}
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void do_addzeo (void)
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{
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T1 = T0;
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T0 += xer_ca;
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if (likely(!((T1 ^ (-1)) & (T1 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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if (likely(T0 >= T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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}
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void do_divwo (void)
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{
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if (likely(!((Ts0 == INT32_MIN && Ts1 == -1) || Ts1 == 0))) {
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xer_ov = 0;
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T0 = (Ts0 / Ts1);
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31);
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}
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}
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void do_divwuo (void)
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{
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if (likely((uint32_t)T1 != 0)) {
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xer_ov = 0;
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T0 = (uint32_t)T0 / (uint32_t)T1;
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} else {
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xer_so = 1;
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xer_ov = 1;
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T0 = 0;
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}
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}
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void do_mullwo (void)
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{
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int64_t res = (int64_t)Ts0 * (int64_t)Ts1;
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if (likely((int32_t)res == res)) {
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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}
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T0 = (int32_t)res;
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}
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void do_nego (void)
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{
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if (likely(T0 != INT32_MIN)) {
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xer_ov = 0;
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T0 = -Ts0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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}
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}
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void do_subfo (void)
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{
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T2 = T0;
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T0 = T1 - T0;
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if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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RETURN();
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}
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void do_subfco (void)
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{
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T2 = T0;
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T0 = T1 - T0;
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if (likely(T0 > T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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if (likely(!(((~T2) ^ T1 ^ (-1)) & ((~T2) ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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}
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void do_subfe (void)
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{
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T0 = T1 + ~T0 + xer_ca;
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if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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}
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void do_subfeo (void)
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{
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T2 = T0;
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T0 = T1 + ~T0 + xer_ca;
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if (likely(!((~T2 ^ T1 ^ (-1)) & (~T2 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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if (likely(T0 >= T1 && (xer_ca == 0 || T0 != T1))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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}
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void do_subfmeo (void)
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{
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T1 = T0;
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T0 = ~T0 + xer_ca - 1;
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if (likely(!(~T1 & (~T1 ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_so = 1;
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xer_ov = 1;
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}
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if (likely(T1 != -1))
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xer_ca = 1;
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}
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void do_subfzeo (void)
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{
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T1 = T0;
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T0 = ~T0 + xer_ca;
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if (likely(!((~T1 ^ (-1)) & ((~T1) ^ T0) & (1 << 31)))) {
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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}
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if (likely(T0 >= ~T1)) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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}
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}
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2004-01-05 01:58:38 +03:00
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/* shift right arithmetic helper */
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void do_sraw (void)
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{
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int32_t ret;
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2005-07-05 02:17:05 +04:00
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if (likely(!(T1 & 0x20UL))) {
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if (likely(T1 != 0)) {
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ret = (int32_t)T0 >> (T1 & 0x1fUL);
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if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) {
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2004-01-05 01:58:38 +03:00
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xer_ca = 0;
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2005-07-05 02:17:05 +04:00
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} else {
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2004-01-05 01:58:38 +03:00
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xer_ca = 1;
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2005-07-05 02:17:05 +04:00
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}
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} else {
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2004-05-24 02:18:12 +04:00
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ret = T0;
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2005-07-05 02:17:05 +04:00
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xer_ca = 0;
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}
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} else {
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ret = (-1) * ((uint32_t)T0 >> 31);
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if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) {
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xer_ca = 0;
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2004-01-05 01:58:38 +03:00
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} else {
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xer_ca = 1;
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}
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2005-07-05 02:17:05 +04:00
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}
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2004-05-24 02:18:12 +04:00
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T0 = ret;
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2004-01-05 01:58:38 +03:00
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}
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2005-07-05 02:17:05 +04:00
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/*****************************************************************************/
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2004-01-05 01:58:38 +03:00
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/* Floating point operations helpers */
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void do_fctiw (void)
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{
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union {
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double d;
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uint64_t i;
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2005-03-13 20:01:22 +03:00
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} p;
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2004-01-05 01:58:38 +03:00
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2005-03-13 20:01:22 +03:00
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/* XXX: higher bits are not supposed to be significant.
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2005-07-03 00:59:34 +04:00
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* to make tests easier, return the same as a real PowerPC 750 (aka G3)
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2005-03-13 20:01:22 +03:00
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*/
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p.i = float64_to_int32(FT0, &env->fp_status);
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p.i |= 0xFFF80000ULL << 32;
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FT0 = p.d;
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2004-01-05 01:58:38 +03:00
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}
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void do_fctiwz (void)
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{
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union {
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double d;
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uint64_t i;
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2005-03-13 20:01:22 +03:00
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} p;
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/* XXX: higher bits are not supposed to be significant.
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2005-07-03 00:59:34 +04:00
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|
|
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
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2005-03-13 20:01:22 +03:00
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*/
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p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status);
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p.i |= 0xFFF80000ULL << 32;
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FT0 = p.d;
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2004-01-05 01:58:38 +03:00
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}
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2004-05-24 02:18:12 +04:00
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void do_fnmadd (void)
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{
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2005-07-05 02:17:05 +04:00
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FT0 = float64_mul(FT0, FT1, &env->fp_status);
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|
|
|
FT0 = float64_add(FT0, FT2, &env->fp_status);
|
|
|
|
if (likely(!isnan(FT0)))
|
|
|
|
FT0 = float64_chs(FT0);
|
2004-05-24 02:18:12 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_fnmsub (void)
|
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
FT0 = float64_mul(FT0, FT1, &env->fp_status);
|
|
|
|
FT0 = float64_sub(FT0, FT2, &env->fp_status);
|
|
|
|
if (likely(!isnan(FT0)))
|
|
|
|
FT0 = float64_chs(FT0);
|
2004-04-26 23:48:05 +04:00
|
|
|
}
|
|
|
|
|
2004-01-05 01:58:38 +03:00
|
|
|
void do_fsqrt (void)
|
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
FT0 = float64_sqrt(FT0, &env->fp_status);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_fres (void)
|
|
|
|
{
|
2005-03-13 20:01:22 +03:00
|
|
|
union {
|
|
|
|
double d;
|
|
|
|
uint64_t i;
|
|
|
|
} p;
|
|
|
|
|
2005-07-05 02:17:05 +04:00
|
|
|
if (likely(isnormal(FT0))) {
|
2005-03-13 20:01:22 +03:00
|
|
|
FT0 = (float)(1.0 / FT0);
|
|
|
|
} else {
|
|
|
|
p.d = FT0;
|
|
|
|
if (p.i == 0x8000000000000000ULL) {
|
|
|
|
p.i = 0xFFF0000000000000ULL;
|
|
|
|
} else if (p.i == 0x0000000000000000ULL) {
|
|
|
|
p.i = 0x7FF0000000000000ULL;
|
|
|
|
} else if (isnan(FT0)) {
|
|
|
|
p.i = 0x7FF8000000000000ULL;
|
|
|
|
} else if (FT0 < 0.0) {
|
|
|
|
p.i = 0x8000000000000000ULL;
|
|
|
|
} else {
|
|
|
|
p.i = 0x0000000000000000ULL;
|
|
|
|
}
|
|
|
|
FT0 = p.d;
|
|
|
|
}
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2005-03-13 20:01:22 +03:00
|
|
|
void do_frsqrte (void)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2005-03-13 20:01:22 +03:00
|
|
|
union {
|
|
|
|
double d;
|
|
|
|
uint64_t i;
|
|
|
|
} p;
|
|
|
|
|
2005-07-05 02:17:05 +04:00
|
|
|
if (likely(isnormal(FT0) && FT0 > 0.0)) {
|
|
|
|
FT0 = float64_sqrt(FT0, &env->fp_status);
|
|
|
|
FT0 = float32_div(1.0, FT0, &env->fp_status);
|
2005-03-13 20:01:22 +03:00
|
|
|
} else {
|
|
|
|
p.d = FT0;
|
|
|
|
if (p.i == 0x8000000000000000ULL) {
|
|
|
|
p.i = 0xFFF0000000000000ULL;
|
|
|
|
} else if (p.i == 0x0000000000000000ULL) {
|
|
|
|
p.i = 0x7FF0000000000000ULL;
|
|
|
|
} else if (isnan(FT0)) {
|
|
|
|
if (!(p.i & 0x0008000000000000ULL))
|
|
|
|
p.i |= 0x000FFFFFFFFFFFFFULL;
|
|
|
|
} else if (FT0 < 0) {
|
|
|
|
p.i = 0x7FF8000000000000ULL;
|
|
|
|
} else {
|
|
|
|
p.i = 0x0000000000000000ULL;
|
|
|
|
}
|
|
|
|
FT0 = p.d;
|
|
|
|
}
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_fsel (void)
|
|
|
|
{
|
|
|
|
if (FT0 >= 0)
|
|
|
|
FT0 = FT1;
|
2005-03-13 20:01:22 +03:00
|
|
|
else
|
|
|
|
FT0 = FT2;
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_fcmpu (void)
|
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
|
|
|
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
|
|
|
T0 = 0x08UL;
|
|
|
|
} else if (!float64_le(FT0, FT1, &env->fp_status)) {
|
|
|
|
T0 = 0x04UL;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02UL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
T0 = 0x01UL;
|
2004-01-05 01:58:38 +03:00
|
|
|
env->fpscr[4] |= 0x1;
|
|
|
|
env->fpscr[6] |= 0x1;
|
|
|
|
}
|
2004-05-24 02:18:12 +04:00
|
|
|
env->fpscr[3] = T0;
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_fcmpo (void)
|
|
|
|
{
|
|
|
|
env->fpscr[4] &= ~0x1;
|
2005-07-05 02:17:05 +04:00
|
|
|
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
|
|
|
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
|
|
|
T0 = 0x08UL;
|
|
|
|
} else if (!float64_le(FT0, FT1, &env->fp_status)) {
|
|
|
|
T0 = 0x04UL;
|
|
|
|
} else {
|
|
|
|
T0 = 0x02UL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
T0 = 0x01UL;
|
2004-01-05 01:58:38 +03:00
|
|
|
env->fpscr[4] |= 0x1;
|
|
|
|
/* I don't know how to test "quiet" nan... */
|
|
|
|
if (0 /* || ! quiet_nan(...) */) {
|
|
|
|
env->fpscr[6] |= 0x1;
|
|
|
|
if (!(env->fpscr[1] & 0x8))
|
|
|
|
env->fpscr[4] |= 0x8;
|
|
|
|
} else {
|
|
|
|
env->fpscr[4] |= 0x8;
|
|
|
|
}
|
|
|
|
}
|
2004-05-24 02:18:12 +04:00
|
|
|
env->fpscr[3] = T0;
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2005-07-05 02:17:05 +04:00
|
|
|
void do_rfi (void)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
env->nip = env->spr[SPR_SRR0] & ~0x00000003;
|
|
|
|
T0 = env->spr[SPR_SRR1] & ~0xFFFF0000UL;
|
|
|
|
do_store_msr(env, T0);
|
|
|
|
#if defined (DEBUG_OP)
|
|
|
|
dump_rfi();
|
|
|
|
#endif
|
|
|
|
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2005-07-05 02:17:05 +04:00
|
|
|
void do_tw (uint32_t cmp, int flags)
|
2004-01-05 01:58:38 +03:00
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
if (!likely(!((Ts0 < (int32_t)cmp && (flags & 0x10)) ||
|
|
|
|
(Ts0 > (int32_t)cmp && (flags & 0x08)) ||
|
|
|
|
(Ts0 == (int32_t)cmp && (flags & 0x04)) ||
|
|
|
|
(T0 < cmp && (flags & 0x02)) ||
|
|
|
|
(T0 > cmp && (flags & 0x01)))))
|
|
|
|
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Instruction cache invalidation helper */
|
|
|
|
void do_icbi (void)
|
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
uint32_t tmp;
|
|
|
|
/* Invalidate one cache line :
|
|
|
|
* PowerPC specification says this is to be treated like a load
|
|
|
|
* (not a fetch) by the MMU. To be sure it will be so,
|
|
|
|
* do the load "by hand".
|
|
|
|
*/
|
|
|
|
#if defined(TARGET_PPC64)
|
|
|
|
if (!msr_sf)
|
|
|
|
T0 &= 0xFFFFFFFFULL;
|
|
|
|
#endif
|
|
|
|
tmp = ldl_kernel(T0);
|
2004-01-19 01:49:57 +03:00
|
|
|
T0 &= ~(ICACHE_LINE_SIZE - 1);
|
|
|
|
tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
2005-07-05 02:17:05 +04:00
|
|
|
/*****************************************************************************/
|
|
|
|
/* MMU related helpers */
|
2004-01-05 01:58:38 +03:00
|
|
|
/* TLB invalidation helpers */
|
|
|
|
void do_tlbia (void)
|
|
|
|
{
|
2004-02-04 02:39:42 +03:00
|
|
|
tlb_flush(env, 1);
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void do_tlbie (void)
|
|
|
|
{
|
2005-07-05 02:17:05 +04:00
|
|
|
#if !defined(FLUSH_ALL_TLBS)
|
2004-01-05 01:58:38 +03:00
|
|
|
tlb_flush_page(env, T0);
|
2005-07-05 02:17:05 +04:00
|
|
|
#else
|
|
|
|
do_tlbia();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
|
|
/* Softmmu support */
|
|
|
|
#if !defined (CONFIG_USER_ONLY)
|
|
|
|
|
|
|
|
#define MMUSUFFIX _mmu
|
|
|
|
#define GETPC() (__builtin_return_address(0))
|
|
|
|
|
|
|
|
#define SHIFT 0
|
|
|
|
#include "softmmu_template.h"
|
|
|
|
|
|
|
|
#define SHIFT 1
|
|
|
|
#include "softmmu_template.h"
|
|
|
|
|
|
|
|
#define SHIFT 2
|
|
|
|
#include "softmmu_template.h"
|
|
|
|
|
|
|
|
#define SHIFT 3
|
|
|
|
#include "softmmu_template.h"
|
|
|
|
|
|
|
|
/* try to fill the TLB and return an exception if error. If retaddr is
|
|
|
|
NULL, it means that the function was called in C code (i.e. not
|
|
|
|
from generated code or from helper.c) */
|
|
|
|
/* XXX: fix it to restore all registers */
|
|
|
|
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
|
|
|
|
{
|
|
|
|
TranslationBlock *tb;
|
|
|
|
CPUState *saved_env;
|
|
|
|
target_phys_addr_t pc;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* XXX: hack to restore env in all cases, even if not called from
|
|
|
|
generated code */
|
|
|
|
saved_env = env;
|
|
|
|
env = cpu_single_env;
|
|
|
|
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
|
|
|
if (!likely(ret == 0)) {
|
|
|
|
if (likely(retaddr)) {
|
|
|
|
/* now we have a real cpu fault */
|
|
|
|
pc = (target_phys_addr_t)retaddr;
|
|
|
|
tb = tb_find_pc(pc);
|
|
|
|
if (likely(tb)) {
|
|
|
|
/* the PC is inside the translated code. It means that we have
|
|
|
|
a virtual CPU fault */
|
|
|
|
cpu_restore_state(tb, env, pc, NULL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
do_raise_exception_err(env->exception_index, env->error_code);
|
|
|
|
}
|
|
|
|
env = saved_env;
|
2004-01-05 01:58:38 +03:00
|
|
|
}
|
2005-07-05 02:17:05 +04:00
|
|
|
#endif /* !CONFIG_USER_ONLY */
|
2004-01-05 01:58:38 +03:00
|
|
|
|