2019-05-24 16:09:42 +03:00
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/*
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* Virtio vhost-user GPU Device
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*
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* Copyright Red Hat, Inc. 2013-2018
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*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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* Gerd Hoffmann <kraxel@redhat.com>
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* Marc-André Lureau <marcandre.lureau@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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2019-06-07 17:13:21 +03:00
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#ifndef VUGPU_H
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#define VUGPU_H
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2019-05-24 16:09:42 +03:00
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2020-11-25 13:06:37 +03:00
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#include "libvhost-user-glib.h"
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2019-05-24 16:09:42 +03:00
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#include "standard-headers/linux/virtio_gpu.h"
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#include "qemu/queue.h"
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#include "qemu/iov.h"
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#include "qemu/bswap.h"
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#include "vugbm.h"
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typedef enum VhostUserGpuRequest {
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VHOST_USER_GPU_NONE = 0,
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VHOST_USER_GPU_GET_PROTOCOL_FEATURES,
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VHOST_USER_GPU_SET_PROTOCOL_FEATURES,
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VHOST_USER_GPU_GET_DISPLAY_INFO,
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VHOST_USER_GPU_CURSOR_POS,
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VHOST_USER_GPU_CURSOR_POS_HIDE,
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VHOST_USER_GPU_CURSOR_UPDATE,
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VHOST_USER_GPU_SCANOUT,
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VHOST_USER_GPU_UPDATE,
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VHOST_USER_GPU_DMABUF_SCANOUT,
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VHOST_USER_GPU_DMABUF_UPDATE,
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2023-06-26 19:47:07 +03:00
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VHOST_USER_GPU_GET_EDID,
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VHOST_USER_GPU_DMABUF_SCANOUT2,
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} VhostUserGpuRequest;
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typedef struct VhostUserGpuDisplayInfoReply {
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struct virtio_gpu_resp_display_info info;
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} VhostUserGpuDisplayInfoReply;
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typedef struct VhostUserGpuCursorPos {
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uint32_t scanout_id;
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uint32_t x;
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uint32_t y;
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} QEMU_PACKED VhostUserGpuCursorPos;
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typedef struct VhostUserGpuCursorUpdate {
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VhostUserGpuCursorPos pos;
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uint32_t hot_x;
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uint32_t hot_y;
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uint32_t data[64 * 64];
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} QEMU_PACKED VhostUserGpuCursorUpdate;
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typedef struct VhostUserGpuScanout {
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uint32_t scanout_id;
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uint32_t width;
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uint32_t height;
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} QEMU_PACKED VhostUserGpuScanout;
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typedef struct VhostUserGpuUpdate {
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uint32_t scanout_id;
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uint32_t x;
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uint32_t y;
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uint32_t width;
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uint32_t height;
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uint8_t data[];
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} QEMU_PACKED VhostUserGpuUpdate;
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typedef struct VhostUserGpuDMABUFScanout {
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uint32_t scanout_id;
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uint32_t x;
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uint32_t y;
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uint32_t width;
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uint32_t height;
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uint32_t fd_width;
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uint32_t fd_height;
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uint32_t fd_stride;
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uint32_t fd_flags;
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int fd_drm_fourcc;
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} QEMU_PACKED VhostUserGpuDMABUFScanout;
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2023-07-14 18:38:59 +03:00
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typedef struct VhostUserGpuDMABUFScanout2 {
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struct VhostUserGpuDMABUFScanout dmabuf_scanout;
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uint64_t modifier;
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} QEMU_PACKED VhostUserGpuDMABUFScanout2;
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2023-06-26 19:47:07 +03:00
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typedef struct VhostUserGpuEdidRequest {
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uint32_t scanout_id;
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} QEMU_PACKED VhostUserGpuEdidRequest;
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2019-05-24 16:09:42 +03:00
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typedef struct VhostUserGpuMsg {
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uint32_t request; /* VhostUserGpuRequest */
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uint32_t flags;
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uint32_t size; /* the following payload size */
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union {
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VhostUserGpuCursorPos cursor_pos;
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VhostUserGpuCursorUpdate cursor_update;
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VhostUserGpuScanout scanout;
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VhostUserGpuUpdate update;
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VhostUserGpuDMABUFScanout dmabuf_scanout;
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VhostUserGpuDMABUFScanout2 dmabuf_scanout2;
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VhostUserGpuEdidRequest edid_req;
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struct virtio_gpu_resp_edid resp_edid;
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2019-05-24 16:09:42 +03:00
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struct virtio_gpu_resp_display_info display_info;
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uint64_t u64;
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} payload;
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} QEMU_PACKED VhostUserGpuMsg;
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static VhostUserGpuMsg m __attribute__ ((unused));
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#define VHOST_USER_GPU_HDR_SIZE \
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(sizeof(m.request) + sizeof(m.flags) + sizeof(m.size))
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#define VHOST_USER_GPU_MSG_FLAG_REPLY 0x4
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#define VHOST_USER_GPU_PROTOCOL_F_EDID 0
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#define VHOST_USER_GPU_PROTOCOL_F_DMABUF2 1
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2019-05-24 16:09:42 +03:00
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struct virtio_gpu_scanout {
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uint32_t width, height;
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int x, y;
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int invalidate;
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uint32_t resource_id;
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};
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typedef struct VuGpu {
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VugDev dev;
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struct virtio_gpu_config virtio_config;
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struct vugbm_device gdev;
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int sock_fd;
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int drm_rnode_fd;
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GSource *renderer_source;
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2021-02-04 13:52:14 +03:00
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guint wait_in;
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2019-05-24 16:09:42 +03:00
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bool virgl;
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bool virgl_inited;
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bool edid_inited;
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bool use_modifiers;
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uint32_t inflight;
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struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
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QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
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QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
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} VuGpu;
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2021-02-04 13:52:15 +03:00
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enum {
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VG_CMD_STATE_NEW,
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VG_CMD_STATE_PENDING,
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VG_CMD_STATE_FINISHED,
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};
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2019-05-24 16:09:42 +03:00
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struct virtio_gpu_ctrl_command {
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VuVirtqElement elem;
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VuVirtq *vq;
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struct virtio_gpu_ctrl_hdr cmd_hdr;
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uint32_t error;
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int state;
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QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
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};
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#define VUGPU_FILL_CMD(out) do { \
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size_t vugpufillcmd_s_ = \
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iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
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&out, sizeof(out)); \
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if (vugpufillcmd_s_ != sizeof(out)) { \
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g_critical("%s: command size incorrect %zu vs %zu", \
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__func__, vugpufillcmd_s_, sizeof(out)); \
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return; \
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} \
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} while (0)
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void vg_ctrl_response(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd,
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struct virtio_gpu_ctrl_hdr *resp,
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size_t resp_len);
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void vg_ctrl_response_nodata(VuGpu *g,
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struct virtio_gpu_ctrl_command *cmd,
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enum virtio_gpu_ctrl_type type);
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int vg_create_mapping_iov(VuGpu *g,
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struct virtio_gpu_resource_attach_backing *ab,
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struct virtio_gpu_ctrl_command *cmd,
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struct iovec **iov);
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2021-05-16 06:04:03 +03:00
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void vg_cleanup_mapping_iov(VuGpu *g, struct iovec *iov, uint32_t count);
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void vg_get_display_info(VuGpu *vg, struct virtio_gpu_ctrl_command *cmd);
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void vg_get_edid(VuGpu *vg, struct virtio_gpu_ctrl_command *cmd);
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2019-05-24 16:09:42 +03:00
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void vg_wait_ok(VuGpu *g);
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void vg_send_msg(VuGpu *g, const VhostUserGpuMsg *msg, int fd);
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bool vg_recv_msg(VuGpu *g, uint32_t expect_req, uint32_t expect_size,
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gpointer payload);
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#endif
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