2019-12-21 00:15:10 +03:00
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/*
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* QEMU HP Lasi PS/2 interface emulation
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*
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* Copyright (c) 2019 Sven Schnelle
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "hw/qdev-properties.h"
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2022-06-24 16:40:53 +03:00
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#include "hw/sysbus.h"
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2019-12-21 00:15:10 +03:00
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#include "hw/input/ps2.h"
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#include "hw/input/lasips2.h"
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#include "exec/hwaddr.h"
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#include "trace.h"
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#include "exec/address-spaces.h"
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#include "migration/vmstate.h"
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#include "hw/irq.h"
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2022-06-24 16:40:53 +03:00
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#include "qapi/error.h"
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2019-12-21 00:15:10 +03:00
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2022-07-13 00:52:45 +03:00
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static const VMStateDescription vmstate_lasips2_port = {
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.name = "lasips2-port",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8(control, LASIPS2Port),
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VMSTATE_UINT8(buf, LASIPS2Port),
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VMSTATE_BOOL(loopback_rbne, LASIPS2Port),
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VMSTATE_END_OF_LIST()
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}
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};
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2019-12-21 00:15:10 +03:00
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static const VMStateDescription vmstate_lasips2 = {
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.name = "lasips2",
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2022-07-13 00:52:45 +03:00
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.version_id = 1,
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.minimum_version_id = 1,
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2019-12-21 00:15:10 +03:00
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.fields = (VMStateField[]) {
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2022-07-13 00:52:45 +03:00
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VMSTATE_UINT8(int_status, LASIPS2State),
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VMSTATE_STRUCT(kbd_port.parent_obj, LASIPS2State, 1,
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vmstate_lasips2_port, LASIPS2Port),
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VMSTATE_STRUCT(mouse_port.parent_obj, LASIPS2State, 1,
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vmstate_lasips2_port, LASIPS2Port),
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2019-12-21 00:15:10 +03:00
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VMSTATE_END_OF_LIST()
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}
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};
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typedef enum {
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REG_PS2_ID = 0,
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REG_PS2_RCVDATA = 4,
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REG_PS2_CONTROL = 8,
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REG_PS2_STATUS = 12,
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} lasips2_read_reg_t;
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typedef enum {
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REG_PS2_RESET = 0,
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REG_PS2_XMTDATA = 4,
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} lasips2_write_reg_t;
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typedef enum {
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LASIPS2_CONTROL_ENABLE = 0x01,
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LASIPS2_CONTROL_LOOPBACK = 0x02,
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LASIPS2_CONTROL_DIAG = 0x20,
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LASIPS2_CONTROL_DATDIR = 0x40,
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LASIPS2_CONTROL_CLKDIR = 0x80,
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} lasips2_control_reg_t;
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typedef enum {
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LASIPS2_STATUS_RBNE = 0x01,
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LASIPS2_STATUS_TBNE = 0x02,
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LASIPS2_STATUS_TERR = 0x04,
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LASIPS2_STATUS_PERR = 0x08,
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LASIPS2_STATUS_CMPINTR = 0x10,
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LASIPS2_STATUS_DATSHD = 0x40,
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LASIPS2_STATUS_CLKSHD = 0x80,
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} lasips2_status_reg_t;
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2021-09-20 09:40:46 +03:00
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static const char *lasips2_read_reg_name(uint64_t addr)
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2019-12-21 00:15:10 +03:00
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{
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switch (addr & 0xc) {
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case REG_PS2_ID:
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return " PS2_ID";
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case REG_PS2_RCVDATA:
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return " PS2_RCVDATA";
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case REG_PS2_CONTROL:
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return " PS2_CONTROL";
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case REG_PS2_STATUS:
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return " PS2_STATUS";
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default:
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return "";
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}
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}
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2021-09-20 09:40:46 +03:00
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static const char *lasips2_write_reg_name(uint64_t addr)
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2019-12-21 00:15:10 +03:00
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{
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switch (addr & 0x0c) {
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case REG_PS2_RESET:
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return " PS2_RESET";
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case REG_PS2_XMTDATA:
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return " PS2_XMTDATA";
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case REG_PS2_CONTROL:
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return " PS2_CONTROL";
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default:
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return "";
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}
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}
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static void lasips2_update_irq(LASIPS2State *s)
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{
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2022-07-13 00:52:39 +03:00
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int level = s->int_status ? 1 : 0;
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trace_lasips2_intr(level);
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qemu_set_irq(s->irq, level);
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2019-12-21 00:15:10 +03:00
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}
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2022-07-13 00:52:38 +03:00
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static void lasips2_set_irq(void *opaque, int n, int level)
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{
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LASIPS2State *s = LASIPS2(opaque);
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if (level) {
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s->int_status |= BIT(n);
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} else {
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s->int_status &= ~BIT(n);
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}
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lasips2_update_irq(s);
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}
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2019-12-21 00:15:10 +03:00
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static void lasips2_reg_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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2022-07-13 00:52:41 +03:00
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LASIPS2Port *lp = LASIPS2_PORT(opaque);
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2019-12-21 00:15:10 +03:00
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2022-07-13 00:52:41 +03:00
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trace_lasips2_reg_write(size, lp->id, addr,
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2021-09-20 09:40:46 +03:00
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lasips2_write_reg_name(addr), val);
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2019-12-21 00:15:10 +03:00
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switch (addr & 0xc) {
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case REG_PS2_CONTROL:
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2022-07-13 00:52:41 +03:00
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lp->control = val;
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2019-12-21 00:15:10 +03:00
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break;
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case REG_PS2_XMTDATA:
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2022-07-13 00:52:41 +03:00
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if (lp->control & LASIPS2_CONTROL_LOOPBACK) {
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lp->buf = val;
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lp->loopback_rbne = true;
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qemu_set_irq(lp->irq, 1);
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2019-12-21 00:15:10 +03:00
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break;
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}
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2022-07-13 00:52:41 +03:00
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if (lp->id) {
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ps2_write_mouse(PS2_MOUSE_DEVICE(lp->ps2dev), val);
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2019-12-21 00:15:10 +03:00
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} else {
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2022-07-13 00:52:41 +03:00
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ps2_write_keyboard(PS2_KBD_DEVICE(lp->ps2dev), val);
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2019-12-21 00:15:10 +03:00
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}
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break;
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case REG_PS2_RESET:
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break;
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default:
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qemu_log_mask(LOG_UNIMP, "%s: unknown register 0x%02" HWADDR_PRIx "\n",
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__func__, addr);
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break;
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}
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}
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static uint64_t lasips2_reg_read(void *opaque, hwaddr addr, unsigned size)
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{
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2022-07-13 00:52:41 +03:00
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LASIPS2Port *lp = LASIPS2_PORT(opaque);
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2019-12-21 00:15:10 +03:00
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uint64_t ret = 0;
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switch (addr & 0xc) {
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case REG_PS2_ID:
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2022-07-13 00:52:41 +03:00
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ret = lp->id;
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2019-12-21 00:15:10 +03:00
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break;
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case REG_PS2_RCVDATA:
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2022-07-13 00:52:41 +03:00
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if (lp->control & LASIPS2_CONTROL_LOOPBACK) {
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lp->loopback_rbne = false;
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qemu_set_irq(lp->irq, 0);
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ret = lp->buf;
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2019-12-21 00:15:10 +03:00
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break;
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}
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2022-07-13 00:52:41 +03:00
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ret = ps2_read_data(lp->ps2dev);
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2019-12-21 00:15:10 +03:00
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break;
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case REG_PS2_CONTROL:
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2022-07-13 00:52:41 +03:00
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ret = lp->control;
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2019-12-21 00:15:10 +03:00
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break;
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case REG_PS2_STATUS:
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ret = LASIPS2_STATUS_DATSHD | LASIPS2_STATUS_CLKSHD;
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2022-07-13 00:52:41 +03:00
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if (lp->control & LASIPS2_CONTROL_DIAG) {
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if (!(lp->control & LASIPS2_CONTROL_DATDIR)) {
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2019-12-21 00:15:10 +03:00
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ret &= ~LASIPS2_STATUS_DATSHD;
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}
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2022-07-13 00:52:41 +03:00
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if (!(lp->control & LASIPS2_CONTROL_CLKDIR)) {
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2019-12-21 00:15:10 +03:00
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ret &= ~LASIPS2_STATUS_CLKSHD;
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}
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}
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2022-07-13 00:52:41 +03:00
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if (lp->control & LASIPS2_CONTROL_LOOPBACK) {
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if (lp->loopback_rbne) {
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2019-12-21 00:15:10 +03:00
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ret |= LASIPS2_STATUS_RBNE;
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}
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} else {
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2022-07-13 00:52:41 +03:00
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if (!ps2_queue_empty(lp->ps2dev)) {
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2019-12-21 00:15:10 +03:00
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ret |= LASIPS2_STATUS_RBNE;
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}
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}
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2022-07-13 00:52:41 +03:00
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if (lp->lasips2->int_status) {
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2022-07-13 00:52:39 +03:00
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ret |= LASIPS2_STATUS_CMPINTR;
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2019-12-21 00:15:10 +03:00
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}
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break;
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default:
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qemu_log_mask(LOG_UNIMP, "%s: unknown register 0x%02" HWADDR_PRIx "\n",
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__func__, addr);
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break;
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}
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2022-06-24 16:40:31 +03:00
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2022-07-13 00:52:41 +03:00
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trace_lasips2_reg_read(size, lp->id, addr,
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2021-09-20 09:40:46 +03:00
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lasips2_read_reg_name(addr), ret);
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2019-12-21 00:15:10 +03:00
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return ret;
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}
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static const MemoryRegionOps lasips2_reg_ops = {
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.read = lasips2_reg_read,
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.write = lasips2_reg_write,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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2022-07-13 00:52:42 +03:00
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.endianness = DEVICE_BIG_ENDIAN,
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2019-12-21 00:15:10 +03:00
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};
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2022-06-24 16:41:00 +03:00
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static void lasips2_realize(DeviceState *dev, Error **errp)
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{
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LASIPS2State *s = LASIPS2(dev);
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2022-07-13 00:52:30 +03:00
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LASIPS2Port *lp;
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2019-12-21 00:15:10 +03:00
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2022-07-13 00:52:30 +03:00
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lp = LASIPS2_PORT(&s->kbd_port);
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if (!(qdev_realize(DEVICE(lp), NULL, errp))) {
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return;
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}
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2022-07-13 00:52:39 +03:00
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qdev_connect_gpio_out(DEVICE(lp), 0,
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qdev_get_gpio_in_named(dev, "lasips2-port-input-irq",
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lp->id));
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2022-07-13 00:52:31 +03:00
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lp = LASIPS2_PORT(&s->mouse_port);
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if (!(qdev_realize(DEVICE(lp), NULL, errp))) {
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return;
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}
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2022-07-13 00:52:39 +03:00
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qdev_connect_gpio_out(DEVICE(lp), 0,
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qdev_get_gpio_in_named(dev, "lasips2-port-input-irq",
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lp->id));
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2019-12-21 00:15:10 +03:00
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}
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2022-06-24 16:40:53 +03:00
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2022-06-24 16:40:56 +03:00
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static void lasips2_init(Object *obj)
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{
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LASIPS2State *s = LASIPS2(obj);
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2022-07-13 00:52:30 +03:00
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LASIPS2Port *lp;
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object_initialize_child(obj, "lasips2-kbd-port", &s->kbd_port,
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TYPE_LASIPS2_KBD_PORT);
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2022-07-13 00:52:31 +03:00
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object_initialize_child(obj, "lasips2-mouse-port", &s->mouse_port,
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TYPE_LASIPS2_MOUSE_PORT);
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2022-06-24 16:40:56 +03:00
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2022-07-13 00:52:30 +03:00
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lp = LASIPS2_PORT(&s->kbd_port);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &lp->reg);
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2022-07-13 00:52:31 +03:00
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lp = LASIPS2_PORT(&s->mouse_port);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &lp->reg);
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2022-06-24 16:41:01 +03:00
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sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
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2022-06-24 16:41:02 +03:00
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2022-07-13 00:52:38 +03:00
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qdev_init_gpio_in_named(DEVICE(obj), lasips2_set_irq,
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"lasips2-port-input-irq", 2);
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2022-06-24 16:40:56 +03:00
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}
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2022-06-24 16:40:59 +03:00
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static void lasips2_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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2022-06-24 16:41:00 +03:00
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dc->realize = lasips2_realize;
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2022-07-13 00:52:23 +03:00
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dc->vmsd = &vmstate_lasips2;
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2022-06-24 16:40:59 +03:00
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
|
|
|
|
}
|
|
|
|
|
2022-06-24 16:40:53 +03:00
|
|
|
static const TypeInfo lasips2_info = {
|
|
|
|
.name = TYPE_LASIPS2,
|
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
2022-06-24 16:40:56 +03:00
|
|
|
.instance_init = lasips2_init,
|
2022-06-24 16:40:59 +03:00
|
|
|
.instance_size = sizeof(LASIPS2State),
|
|
|
|
.class_init = lasips2_class_init,
|
2022-06-24 16:40:53 +03:00
|
|
|
};
|
|
|
|
|
2022-07-13 00:52:37 +03:00
|
|
|
static void lasips2_port_set_irq(void *opaque, int n, int level)
|
|
|
|
{
|
|
|
|
LASIPS2Port *s = LASIPS2_PORT(opaque);
|
|
|
|
|
|
|
|
qemu_set_irq(s->irq, level);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void lasips2_port_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
|
|
|
LASIPS2Port *s = LASIPS2_PORT(dev);
|
|
|
|
|
|
|
|
qdev_connect_gpio_out(DEVICE(s->ps2dev), PS2_DEVICE_IRQ,
|
|
|
|
qdev_get_gpio_in_named(dev, "ps2-input-irq", 0));
|
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:35 +03:00
|
|
|
static void lasips2_port_init(Object *obj)
|
|
|
|
{
|
|
|
|
LASIPS2Port *s = LASIPS2_PORT(obj);
|
|
|
|
|
|
|
|
qdev_init_gpio_out(DEVICE(obj), &s->irq, 1);
|
2022-07-13 00:52:37 +03:00
|
|
|
qdev_init_gpio_in_named(DEVICE(obj), lasips2_port_set_irq,
|
|
|
|
"ps2-input-irq", 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void lasips2_port_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
|
|
|
|
dc->realize = lasips2_port_realize;
|
2022-07-13 00:52:35 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:27 +03:00
|
|
|
static const TypeInfo lasips2_port_info = {
|
|
|
|
.name = TYPE_LASIPS2_PORT,
|
|
|
|
.parent = TYPE_DEVICE,
|
2022-07-13 00:52:35 +03:00
|
|
|
.instance_init = lasips2_port_init,
|
2022-07-13 00:52:27 +03:00
|
|
|
.instance_size = sizeof(LASIPS2Port),
|
2022-07-13 00:52:36 +03:00
|
|
|
.class_init = lasips2_port_class_init,
|
|
|
|
.class_size = sizeof(LASIPS2PortDeviceClass),
|
2022-07-13 00:52:27 +03:00
|
|
|
.abstract = true,
|
|
|
|
};
|
|
|
|
|
2022-07-13 00:52:32 +03:00
|
|
|
static void lasips2_kbd_port_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
2022-07-13 00:52:43 +03:00
|
|
|
LASIPS2KbdPort *s = LASIPS2_KBD_PORT(dev);
|
2022-07-13 00:52:32 +03:00
|
|
|
LASIPS2Port *lp = LASIPS2_PORT(dev);
|
2022-07-13 00:52:39 +03:00
|
|
|
LASIPS2PortDeviceClass *lpdc = LASIPS2_PORT_GET_CLASS(lp);
|
2022-07-13 00:52:32 +03:00
|
|
|
|
2022-07-13 00:52:43 +03:00
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->kbd), errp)) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
lp->ps2dev = PS2_DEVICE(&s->kbd);
|
2022-07-13 00:52:39 +03:00
|
|
|
lpdc->parent_realize(dev, errp);
|
2022-07-13 00:52:32 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:30 +03:00
|
|
|
static void lasips2_kbd_port_init(Object *obj)
|
|
|
|
{
|
|
|
|
LASIPS2KbdPort *s = LASIPS2_KBD_PORT(obj);
|
|
|
|
LASIPS2Port *lp = LASIPS2_PORT(obj);
|
|
|
|
|
|
|
|
memory_region_init_io(&lp->reg, obj, &lasips2_reg_ops, lp, "lasips2-kbd",
|
|
|
|
0x100);
|
2022-07-13 00:52:43 +03:00
|
|
|
|
|
|
|
object_initialize_child(obj, "kbd", &s->kbd, TYPE_PS2_KBD_DEVICE);
|
|
|
|
|
2022-07-13 00:52:30 +03:00
|
|
|
lp->id = 0;
|
2022-07-13 00:52:40 +03:00
|
|
|
lp->lasips2 = container_of(s, LASIPS2State, kbd_port);
|
2022-07-13 00:52:30 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:32 +03:00
|
|
|
static void lasips2_kbd_port_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2022-07-13 00:52:37 +03:00
|
|
|
LASIPS2PortDeviceClass *lpdc = LASIPS2_PORT_CLASS(klass);
|
2022-07-13 00:52:32 +03:00
|
|
|
|
2022-07-13 00:52:37 +03:00
|
|
|
device_class_set_parent_realize(dc, lasips2_kbd_port_realize,
|
|
|
|
&lpdc->parent_realize);
|
2022-07-13 00:52:32 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:28 +03:00
|
|
|
static const TypeInfo lasips2_kbd_port_info = {
|
|
|
|
.name = TYPE_LASIPS2_KBD_PORT,
|
|
|
|
.parent = TYPE_LASIPS2_PORT,
|
|
|
|
.instance_size = sizeof(LASIPS2KbdPort),
|
2022-07-13 00:52:30 +03:00
|
|
|
.instance_init = lasips2_kbd_port_init,
|
2022-07-13 00:52:32 +03:00
|
|
|
.class_init = lasips2_kbd_port_class_init,
|
2022-07-13 00:52:28 +03:00
|
|
|
};
|
|
|
|
|
2022-07-13 00:52:33 +03:00
|
|
|
static void lasips2_mouse_port_realize(DeviceState *dev, Error **errp)
|
|
|
|
{
|
2022-07-13 00:52:44 +03:00
|
|
|
LASIPS2MousePort *s = LASIPS2_MOUSE_PORT(dev);
|
2022-07-13 00:52:33 +03:00
|
|
|
LASIPS2Port *lp = LASIPS2_PORT(dev);
|
2022-07-13 00:52:39 +03:00
|
|
|
LASIPS2PortDeviceClass *lpdc = LASIPS2_PORT_GET_CLASS(lp);
|
2022-07-13 00:52:33 +03:00
|
|
|
|
2022-07-13 00:52:44 +03:00
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->mouse), errp)) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
lp->ps2dev = PS2_DEVICE(&s->mouse);
|
2022-07-13 00:52:39 +03:00
|
|
|
lpdc->parent_realize(dev, errp);
|
2022-07-13 00:52:33 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:31 +03:00
|
|
|
static void lasips2_mouse_port_init(Object *obj)
|
|
|
|
{
|
|
|
|
LASIPS2MousePort *s = LASIPS2_MOUSE_PORT(obj);
|
|
|
|
LASIPS2Port *lp = LASIPS2_PORT(obj);
|
|
|
|
|
|
|
|
memory_region_init_io(&lp->reg, obj, &lasips2_reg_ops, lp, "lasips2-mouse",
|
|
|
|
0x100);
|
2022-07-13 00:52:44 +03:00
|
|
|
|
|
|
|
object_initialize_child(obj, "mouse", &s->mouse, TYPE_PS2_MOUSE_DEVICE);
|
|
|
|
|
2022-07-13 00:52:31 +03:00
|
|
|
lp->id = 1;
|
2022-07-13 00:52:40 +03:00
|
|
|
lp->lasips2 = container_of(s, LASIPS2State, mouse_port);
|
2022-07-13 00:52:31 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:33 +03:00
|
|
|
static void lasips2_mouse_port_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2022-07-13 00:52:37 +03:00
|
|
|
LASIPS2PortDeviceClass *lpdc = LASIPS2_PORT_CLASS(klass);
|
2022-07-13 00:52:33 +03:00
|
|
|
|
2022-07-13 00:52:37 +03:00
|
|
|
device_class_set_parent_realize(dc, lasips2_mouse_port_realize,
|
|
|
|
&lpdc->parent_realize);
|
2022-07-13 00:52:33 +03:00
|
|
|
}
|
|
|
|
|
2022-07-13 00:52:29 +03:00
|
|
|
static const TypeInfo lasips2_mouse_port_info = {
|
|
|
|
.name = TYPE_LASIPS2_MOUSE_PORT,
|
|
|
|
.parent = TYPE_LASIPS2_PORT,
|
|
|
|
.instance_size = sizeof(LASIPS2MousePort),
|
2022-07-13 00:52:31 +03:00
|
|
|
.instance_init = lasips2_mouse_port_init,
|
2022-07-13 00:52:33 +03:00
|
|
|
.class_init = lasips2_mouse_port_class_init,
|
2022-07-13 00:52:29 +03:00
|
|
|
};
|
|
|
|
|
2022-06-24 16:40:53 +03:00
|
|
|
static void lasips2_register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&lasips2_info);
|
2022-07-13 00:52:27 +03:00
|
|
|
type_register_static(&lasips2_port_info);
|
2022-07-13 00:52:28 +03:00
|
|
|
type_register_static(&lasips2_kbd_port_info);
|
2022-07-13 00:52:29 +03:00
|
|
|
type_register_static(&lasips2_mouse_port_info);
|
2022-06-24 16:40:53 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
type_init(lasips2_register_types)
|