2014-04-22 00:54:59 +04:00
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/*
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* PowerPC Decimal Floating Point (DPF) emulation helpers for QEMU.
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*
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* Copyright (c) 2014 IBM Corporation.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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2020-10-19 09:11:26 +03:00
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* version 2.1 of the License, or (at your option) any later version.
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2014-04-22 00:54:59 +04:00
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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2016-01-26 21:16:58 +03:00
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#include "qemu/osdep.h"
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2014-04-22 00:54:59 +04:00
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#define DECNUMDIGITS 34
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#include "libdecnumber/decContext.h"
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#include "libdecnumber/decNumber.h"
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#include "libdecnumber/dpd/decimal32.h"
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#include "libdecnumber/dpd/decimal64.h"
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#include "libdecnumber/dpd/decimal128.h"
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2019-09-26 21:57:59 +03:00
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static void get_dfp64(ppc_vsr_t *dst, ppc_fprp_t *dfp)
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2019-09-26 21:57:55 +03:00
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{
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2019-09-26 21:57:59 +03:00
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dst->VsrD(1) = dfp->VsrD(0);
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2019-09-26 21:57:55 +03:00
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}
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2019-09-26 21:57:59 +03:00
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static void get_dfp128(ppc_vsr_t *dst, ppc_fprp_t *dfp)
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2019-09-26 21:57:55 +03:00
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{
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2019-09-26 21:57:59 +03:00
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dst->VsrD(0) = dfp[0].VsrD(0);
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dst->VsrD(1) = dfp[1].VsrD(0);
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2019-09-26 21:57:55 +03:00
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}
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2019-09-26 21:57:59 +03:00
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static void set_dfp64(ppc_fprp_t *dfp, ppc_vsr_t *src)
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2019-09-26 21:57:56 +03:00
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{
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2019-09-26 21:57:59 +03:00
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dfp->VsrD(0) = src->VsrD(1);
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2019-09-26 21:57:56 +03:00
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}
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2019-09-26 21:57:59 +03:00
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static void set_dfp128(ppc_fprp_t *dfp, ppc_vsr_t *src)
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2019-09-26 21:57:56 +03:00
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{
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2019-09-26 21:57:59 +03:00
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dfp[0].VsrD(0) = src->VsrD(0);
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dfp[1].VsrD(0) = src->VsrD(1);
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2019-09-26 21:57:56 +03:00
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}
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2021-10-29 22:24:09 +03:00
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static void set_dfp128_to_avr(ppc_avr_t *dst, ppc_vsr_t *src)
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{
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*dst = *src;
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}
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2014-04-22 00:54:59 +04:00
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struct PPC_DFP {
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CPUPPCState *env;
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2019-09-26 21:57:59 +03:00
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ppc_vsr_t vt, va, vb;
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2014-04-22 00:54:59 +04:00
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decNumber t, a, b;
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decContext context;
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uint8_t crbf;
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};
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static void dfp_prepare_rounding_mode(decContext *context, uint64_t fpscr)
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{
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enum rounding rnd;
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ppc: Add support for 'mffscrn','mffscrni' instructions
ISA 3.0B added a set of Floating-Point Status and Control Register (FPSCR)
instructions: mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl.
This patch adds support for 'mffscrn' and 'mffscrni' instructions.
'mffscrn' and 'mffscrni' are similar to 'mffsl', except they do not return
the status bits (FI, FR, FPRF) and they also set the rounding mode in the
FPSCR.
On CPUs without support for 'mffscrn'/'mffscrni' (below ISA 3.0), the
instructions will execute identically to 'mffs'.
Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
Message-Id: <1568817081-1345-1-git-send-email-pc@us.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-09-18 17:31:21 +03:00
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switch ((fpscr & FP_DRN) >> FPSCR_DRN0) {
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2014-04-22 00:54:59 +04:00
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case 0:
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rnd = DEC_ROUND_HALF_EVEN;
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break;
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case 1:
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rnd = DEC_ROUND_DOWN;
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break;
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case 2:
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rnd = DEC_ROUND_CEILING;
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break;
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case 3:
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rnd = DEC_ROUND_FLOOR;
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break;
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case 4:
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rnd = DEC_ROUND_HALF_UP;
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break;
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case 5:
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rnd = DEC_ROUND_HALF_DOWN;
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break;
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case 6:
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rnd = DEC_ROUND_UP;
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break;
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case 7:
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rnd = DEC_ROUND_05UP;
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break;
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default:
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g_assert_not_reached();
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}
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decContextSetRounding(context, rnd);
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}
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2014-04-22 00:55:10 +04:00
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static void dfp_set_round_mode_from_immediate(uint8_t r, uint8_t rmc,
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struct PPC_DFP *dfp)
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{
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enum rounding rnd;
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if (r == 0) {
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switch (rmc & 3) {
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case 0:
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rnd = DEC_ROUND_HALF_EVEN;
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break;
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case 1:
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rnd = DEC_ROUND_DOWN;
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break;
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case 2:
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rnd = DEC_ROUND_HALF_UP;
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break;
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case 3: /* use FPSCR rounding mode */
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return;
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default:
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assert(0); /* cannot get here */
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}
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} else { /* r == 1 */
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switch (rmc & 3) {
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case 0:
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rnd = DEC_ROUND_CEILING;
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break;
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case 1:
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rnd = DEC_ROUND_FLOOR;
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break;
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case 2:
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rnd = DEC_ROUND_UP;
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break;
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case 3:
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rnd = DEC_ROUND_HALF_DOWN;
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break;
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default:
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assert(0); /* cannot get here */
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}
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}
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decContextSetRounding(&dfp->context, rnd);
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}
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2019-09-26 21:57:57 +03:00
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static void dfp_prepare_decimal64(struct PPC_DFP *dfp, ppc_fprp_t *a,
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ppc_fprp_t *b, CPUPPCState *env)
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2014-04-22 00:54:59 +04:00
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{
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decContextDefault(&dfp->context, DEC_INIT_DECIMAL64);
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dfp_prepare_rounding_mode(&dfp->context, env->fpscr);
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dfp->env = env;
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if (a) {
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2019-09-26 21:57:59 +03:00
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get_dfp64(&dfp->va, a);
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decimal64ToNumber((decimal64 *)&dfp->va.VsrD(1), &dfp->a);
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2014-04-22 00:54:59 +04:00
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} else {
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2019-09-26 21:57:59 +03:00
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dfp->va.VsrD(1) = 0;
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2014-04-22 00:54:59 +04:00
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decNumberZero(&dfp->a);
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}
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if (b) {
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2019-09-26 21:57:59 +03:00
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get_dfp64(&dfp->vb, b);
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decimal64ToNumber((decimal64 *)&dfp->vb.VsrD(1), &dfp->b);
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2014-04-22 00:54:59 +04:00
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} else {
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2019-09-26 21:57:59 +03:00
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dfp->vb.VsrD(1) = 0;
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2014-04-22 00:54:59 +04:00
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decNumberZero(&dfp->b);
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}
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}
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2019-09-26 21:57:57 +03:00
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static void dfp_prepare_decimal128(struct PPC_DFP *dfp, ppc_fprp_t *a,
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ppc_fprp_t *b, CPUPPCState *env)
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2014-04-22 00:54:59 +04:00
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{
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decContextDefault(&dfp->context, DEC_INIT_DECIMAL128);
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dfp_prepare_rounding_mode(&dfp->context, env->fpscr);
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dfp->env = env;
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if (a) {
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2019-09-26 21:57:59 +03:00
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get_dfp128(&dfp->va, a);
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decimal128ToNumber((decimal128 *)&dfp->va, &dfp->a);
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2014-04-22 00:54:59 +04:00
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} else {
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2019-09-26 21:57:59 +03:00
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dfp->va.VsrD(0) = dfp->va.VsrD(1) = 0;
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2014-04-22 00:54:59 +04:00
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decNumberZero(&dfp->a);
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}
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if (b) {
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2019-09-26 21:57:59 +03:00
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get_dfp128(&dfp->vb, b);
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decimal128ToNumber((decimal128 *)&dfp->vb, &dfp->b);
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2014-04-22 00:54:59 +04:00
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} else {
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2019-09-26 21:57:59 +03:00
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dfp->vb.VsrD(0) = dfp->vb.VsrD(1) = 0;
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2014-04-22 00:54:59 +04:00
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decNumberZero(&dfp->b);
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}
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}
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2014-04-22 00:55:00 +04:00
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2019-09-26 21:57:58 +03:00
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static void dfp_finalize_decimal64(struct PPC_DFP *dfp)
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{
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2019-09-26 21:57:59 +03:00
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decimal64FromNumber((decimal64 *)&dfp->vt.VsrD(1), &dfp->t, &dfp->context);
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2019-09-26 21:57:58 +03:00
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}
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static void dfp_finalize_decimal128(struct PPC_DFP *dfp)
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{
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2019-09-26 21:57:59 +03:00
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decimal128FromNumber((decimal128 *)&dfp->vt, &dfp->t, &dfp->context);
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2019-09-26 21:57:58 +03:00
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}
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2014-04-22 00:55:00 +04:00
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static void dfp_set_FPSCR_flag(struct PPC_DFP *dfp, uint64_t flag,
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uint64_t enabled)
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{
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dfp->env->fpscr |= (flag | FP_FX);
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if (dfp->env->fpscr & enabled) {
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dfp->env->fpscr |= FP_FEX;
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}
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}
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2014-04-22 00:55:01 +04:00
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static void dfp_set_FPRF_from_FRT_with_context(struct PPC_DFP *dfp,
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decContext *context)
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{
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uint64_t fprf = 0;
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/* construct FPRF */
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switch (decNumberClass(&dfp->t, context)) {
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case DEC_CLASS_SNAN:
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fprf = 0x01;
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break;
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case DEC_CLASS_QNAN:
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fprf = 0x11;
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break;
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case DEC_CLASS_NEG_INF:
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fprf = 0x09;
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break;
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case DEC_CLASS_NEG_NORMAL:
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fprf = 0x08;
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break;
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case DEC_CLASS_NEG_SUBNORMAL:
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fprf = 0x18;
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break;
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case DEC_CLASS_NEG_ZERO:
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fprf = 0x12;
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break;
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case DEC_CLASS_POS_ZERO:
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fprf = 0x02;
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break;
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case DEC_CLASS_POS_SUBNORMAL:
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fprf = 0x14;
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break;
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case DEC_CLASS_POS_NORMAL:
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fprf = 0x04;
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break;
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case DEC_CLASS_POS_INF:
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fprf = 0x05;
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break;
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default:
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assert(0); /* should never get here */
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}
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2019-09-18 17:32:49 +03:00
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dfp->env->fpscr &= ~FP_FPRF;
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dfp->env->fpscr |= (fprf << FPSCR_FPRF);
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2014-04-22 00:55:01 +04:00
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}
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static void dfp_set_FPRF_from_FRT(struct PPC_DFP *dfp)
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{
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dfp_set_FPRF_from_FRT_with_context(dfp, &dfp->context);
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}
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2014-04-22 00:55:14 +04:00
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static void dfp_set_FPRF_from_FRT_short(struct PPC_DFP *dfp)
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{
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decContext shortContext;
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decContextDefault(&shortContext, DEC_INIT_DECIMAL32);
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dfp_set_FPRF_from_FRT_with_context(dfp, &shortContext);
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}
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static void dfp_set_FPRF_from_FRT_long(struct PPC_DFP *dfp)
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{
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decContext longContext;
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decContextDefault(&longContext, DEC_INIT_DECIMAL64);
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dfp_set_FPRF_from_FRT_with_context(dfp, &longContext);
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}
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2014-04-22 00:55:01 +04:00
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static void dfp_check_for_OX(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Overflow) {
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dfp_set_FPSCR_flag(dfp, FP_OX, FP_OE);
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}
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}
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static void dfp_check_for_UX(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Underflow) {
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dfp_set_FPSCR_flag(dfp, FP_UX, FP_UE);
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}
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}
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static void dfp_check_for_XX(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Inexact) {
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dfp_set_FPSCR_flag(dfp, FP_XX | FP_FI, FP_XE);
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}
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}
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2014-04-22 00:55:04 +04:00
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static void dfp_check_for_ZX(struct PPC_DFP *dfp)
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{
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if (dfp->context.status & DEC_Division_by_zero) {
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dfp_set_FPSCR_flag(dfp, FP_ZX, FP_ZE);
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}
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}
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2014-04-22 00:55:01 +04:00
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static void dfp_check_for_VXSNAN(struct PPC_DFP *dfp)
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|
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{
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|
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if (dfp->context.status & DEC_Invalid_operation) {
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|
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if (decNumberIsSNaN(&dfp->a) || decNumberIsSNaN(&dfp->b)) {
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FP_VE);
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}
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}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:13 +04:00
|
|
|
static void dfp_check_for_VXSNAN_and_convert_to_QNaN(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (decNumberIsSNaN(&dfp->t)) {
|
|
|
|
dfp->t.bits &= ~DECSNAN;
|
|
|
|
dfp->t.bits |= DECNAN;
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:01 +04:00
|
|
|
static void dfp_check_for_VXISI(struct PPC_DFP *dfp, int testForSameSign)
|
|
|
|
{
|
|
|
|
if (dfp->context.status & DEC_Invalid_operation) {
|
|
|
|
if (decNumberIsInfinite(&dfp->a) && decNumberIsInfinite(&dfp->b)) {
|
|
|
|
int same = decNumberClass(&dfp->a, &dfp->context) ==
|
|
|
|
decNumberClass(&dfp->b, &dfp->context);
|
|
|
|
if ((same && testForSameSign) || (!same && !testForSameSign)) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXISI, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dfp_check_for_VXISI_add(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_check_for_VXISI(dfp, 0);
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:02 +04:00
|
|
|
static void dfp_check_for_VXISI_subtract(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_check_for_VXISI(dfp, 1);
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:03 +04:00
|
|
|
static void dfp_check_for_VXIMZ(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (dfp->context.status & DEC_Invalid_operation) {
|
|
|
|
if ((decNumberIsInfinite(&dfp->a) && decNumberIsZero(&dfp->b)) ||
|
|
|
|
(decNumberIsInfinite(&dfp->b) && decNumberIsZero(&dfp->a))) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXIMZ, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:04 +04:00
|
|
|
static void dfp_check_for_VXZDZ(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (dfp->context.status & DEC_Division_undefined) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXZDZ, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dfp_check_for_VXIDI(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (dfp->context.status & DEC_Invalid_operation) {
|
|
|
|
if (decNumberIsInfinite(&dfp->a) && decNumberIsInfinite(&dfp->b)) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXIDI, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:05 +04:00
|
|
|
static void dfp_check_for_VXVC(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (decNumberIsNaN(&dfp->a) || decNumberIsNaN(&dfp->b)) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXVC, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:10 +04:00
|
|
|
static void dfp_check_for_VXCVI(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if ((dfp->context.status & DEC_Invalid_operation) &&
|
|
|
|
(!decNumberIsSNaN(&dfp->a)) &&
|
|
|
|
(!decNumberIsSNaN(&dfp->b))) {
|
|
|
|
dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXCVI, FP_VE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:05 +04:00
|
|
|
static void dfp_set_CRBF_from_T(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
if (decNumberIsNaN(&dfp->t)) {
|
|
|
|
dfp->crbf = 1;
|
|
|
|
} else if (decNumberIsZero(&dfp->t)) {
|
|
|
|
dfp->crbf = 2;
|
|
|
|
} else if (decNumberIsNegative(&dfp->t)) {
|
|
|
|
dfp->crbf = 8;
|
|
|
|
} else {
|
|
|
|
dfp->crbf = 4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dfp_set_FPCC_from_CRBF(struct PPC_DFP *dfp)
|
|
|
|
{
|
2019-09-18 17:32:49 +03:00
|
|
|
dfp->env->fpscr &= ~FP_FPCC;
|
|
|
|
dfp->env->fpscr |= (dfp->crbf << FPSCR_FPCC);
|
2014-04-22 00:55:05 +04:00
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:10 +04:00
|
|
|
static inline void dfp_makeQNaN(decNumber *dn)
|
|
|
|
{
|
|
|
|
dn->bits &= ~DECSPECIAL;
|
|
|
|
dn->bits |= DECNAN;
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:11 +04:00
|
|
|
static inline int dfp_get_digit(decNumber *dn, int n)
|
|
|
|
{
|
|
|
|
assert(DECDPUN == 3);
|
|
|
|
int unit = n / DECDPUN;
|
|
|
|
int dig = n % DECDPUN;
|
|
|
|
switch (dig) {
|
|
|
|
case 0:
|
|
|
|
return dn->lsu[unit] % 10;
|
|
|
|
case 1:
|
|
|
|
return (dn->lsu[unit] / 10) % 10;
|
|
|
|
case 2:
|
|
|
|
return dn->lsu[unit] / 100;
|
|
|
|
}
|
2014-06-17 21:18:28 +04:00
|
|
|
g_assert_not_reached();
|
2014-04-22 00:55:11 +04:00
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:01 +04:00
|
|
|
#define DFP_HELPER_TAB(op, dnop, postprocs, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
|
|
|
|
ppc_fprp_t *b) \
|
2014-04-22 00:55:01 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
dfp_prepare_decimal##size(&dfp, a, b, env); \
|
|
|
|
dnop(&dfp.t, &dfp.a, &dfp.b, &dfp.context); \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:01 +04:00
|
|
|
postprocs(&dfp); \
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:01 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void ADD_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_OX(dfp);
|
|
|
|
dfp_check_for_UX(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
dfp_check_for_VXISI_add(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DFP_HELPER_TAB(DADD, decNumberAdd, ADD_PPs, 64)
|
|
|
|
DFP_HELPER_TAB(DADDQ, decNumberAdd, ADD_PPs, 128)
|
2014-04-22 00:55:02 +04:00
|
|
|
|
|
|
|
static void SUB_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_OX(dfp);
|
|
|
|
dfp_check_for_UX(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
dfp_check_for_VXISI_subtract(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DFP_HELPER_TAB(DSUB, decNumberSubtract, SUB_PPs, 64)
|
|
|
|
DFP_HELPER_TAB(DSUBQ, decNumberSubtract, SUB_PPs, 128)
|
2014-04-22 00:55:03 +04:00
|
|
|
|
|
|
|
static void MUL_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_OX(dfp);
|
|
|
|
dfp_check_for_UX(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
dfp_check_for_VXIMZ(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DFP_HELPER_TAB(DMUL, decNumberMultiply, MUL_PPs, 64)
|
|
|
|
DFP_HELPER_TAB(DMULQ, decNumberMultiply, MUL_PPs, 128)
|
2014-04-22 00:55:04 +04:00
|
|
|
|
|
|
|
static void DIV_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_OX(dfp);
|
|
|
|
dfp_check_for_UX(dfp);
|
|
|
|
dfp_check_for_ZX(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
dfp_check_for_VXZDZ(dfp);
|
|
|
|
dfp_check_for_VXIDI(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DFP_HELPER_TAB(DDIV, decNumberDivide, DIV_PPs, 64)
|
|
|
|
DFP_HELPER_TAB(DDIVQ, decNumberDivide, DIV_PPs, 128)
|
2014-04-22 00:55:05 +04:00
|
|
|
|
|
|
|
#define DFP_HELPER_BF_AB(op, dnop, postprocs, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
|
2014-04-22 00:55:05 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
dfp_prepare_decimal##size(&dfp, a, b, env); \
|
|
|
|
dnop(&dfp.t, &dfp.a, &dfp.b, &dfp.context); \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:05 +04:00
|
|
|
postprocs(&dfp); \
|
|
|
|
return dfp.crbf; \
|
|
|
|
}
|
|
|
|
|
|
|
|
static void CMPU_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_CRBF_from_T(dfp);
|
|
|
|
dfp_set_FPCC_from_CRBF(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:13 +03:00
|
|
|
DFP_HELPER_BF_AB(DCMPU, decNumberCompare, CMPU_PPs, 64)
|
|
|
|
DFP_HELPER_BF_AB(DCMPUQ, decNumberCompare, CMPU_PPs, 128)
|
2014-04-22 00:55:05 +04:00
|
|
|
|
|
|
|
static void CMPO_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_CRBF_from_T(dfp);
|
|
|
|
dfp_set_FPCC_from_CRBF(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
dfp_check_for_VXVC(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:13 +03:00
|
|
|
DFP_HELPER_BF_AB(DCMPO, decNumberCompare, CMPO_PPs, 64)
|
|
|
|
DFP_HELPER_BF_AB(DCMPOQ, decNumberCompare, CMPO_PPs, 128)
|
2014-04-22 00:55:06 +04:00
|
|
|
|
|
|
|
#define DFP_HELPER_TSTDC(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, uint32_t dcm) \
|
2014-04-22 00:55:06 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
int match = 0; \
|
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, a, 0, env); \
|
|
|
|
\
|
|
|
|
match |= (dcm & 0x20) && decNumberIsZero(&dfp.a); \
|
|
|
|
match |= (dcm & 0x10) && decNumberIsSubnormal(&dfp.a, &dfp.context); \
|
|
|
|
match |= (dcm & 0x08) && decNumberIsNormal(&dfp.a, &dfp.context); \
|
|
|
|
match |= (dcm & 0x04) && decNumberIsInfinite(&dfp.a); \
|
|
|
|
match |= (dcm & 0x02) && decNumberIsQNaN(&dfp.a); \
|
|
|
|
match |= (dcm & 0x01) && decNumberIsSNaN(&dfp.a); \
|
|
|
|
\
|
|
|
|
if (decNumberIsNegative(&dfp.a)) { \
|
|
|
|
dfp.crbf = match ? 0xA : 0x8; \
|
|
|
|
} else { \
|
|
|
|
dfp.crbf = match ? 0x2 : 0x0; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
dfp_set_FPCC_from_CRBF(&dfp); \
|
|
|
|
return dfp.crbf; \
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:11 +03:00
|
|
|
DFP_HELPER_TSTDC(DTSTDC, 64)
|
|
|
|
DFP_HELPER_TSTDC(DTSTDCQ, 128)
|
2014-04-22 00:55:07 +04:00
|
|
|
|
|
|
|
#define DFP_HELPER_TSTDG(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, uint32_t dcm) \
|
2014-04-22 00:55:07 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
int minexp, maxexp, nzero_digits, nzero_idx, is_negative, is_zero, \
|
|
|
|
is_extreme_exp, is_subnormal, is_normal, leftmost_is_nonzero, \
|
|
|
|
match; \
|
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, a, 0, env); \
|
|
|
|
\
|
|
|
|
if ((size) == 64) { \
|
|
|
|
minexp = -398; \
|
|
|
|
maxexp = 369; \
|
|
|
|
nzero_digits = 16; \
|
|
|
|
nzero_idx = 5; \
|
|
|
|
} else if ((size) == 128) { \
|
|
|
|
minexp = -6176; \
|
|
|
|
maxexp = 6111; \
|
|
|
|
nzero_digits = 34; \
|
|
|
|
nzero_idx = 11; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
is_negative = decNumberIsNegative(&dfp.a); \
|
|
|
|
is_zero = decNumberIsZero(&dfp.a); \
|
|
|
|
is_extreme_exp = (dfp.a.exponent == maxexp) || \
|
|
|
|
(dfp.a.exponent == minexp); \
|
|
|
|
is_subnormal = decNumberIsSubnormal(&dfp.a, &dfp.context); \
|
|
|
|
is_normal = decNumberIsNormal(&dfp.a, &dfp.context); \
|
|
|
|
leftmost_is_nonzero = (dfp.a.digits == nzero_digits) && \
|
|
|
|
(dfp.a.lsu[nzero_idx] != 0); \
|
|
|
|
match = 0; \
|
|
|
|
\
|
|
|
|
match |= (dcm & 0x20) && is_zero && !is_extreme_exp; \
|
|
|
|
match |= (dcm & 0x10) && is_zero && is_extreme_exp; \
|
|
|
|
match |= (dcm & 0x08) && \
|
|
|
|
(is_subnormal || (is_normal && is_extreme_exp)); \
|
|
|
|
match |= (dcm & 0x04) && is_normal && !is_extreme_exp && \
|
|
|
|
!leftmost_is_nonzero; \
|
|
|
|
match |= (dcm & 0x02) && is_normal && !is_extreme_exp && \
|
|
|
|
leftmost_is_nonzero; \
|
|
|
|
match |= (dcm & 0x01) && decNumberIsSpecial(&dfp.a); \
|
|
|
|
\
|
|
|
|
if (is_negative) { \
|
|
|
|
dfp.crbf = match ? 0xA : 0x8; \
|
|
|
|
} else { \
|
|
|
|
dfp.crbf = match ? 0x2 : 0x0; \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
dfp_set_FPCC_from_CRBF(&dfp); \
|
|
|
|
return dfp.crbf; \
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:11 +03:00
|
|
|
DFP_HELPER_TSTDG(DTSTDG, 64)
|
|
|
|
DFP_HELPER_TSTDG(DTSTDGQ, 128)
|
2014-04-22 00:55:08 +04:00
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#define DFP_HELPER_TSTEX(op, size) \
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2019-09-26 21:57:57 +03:00
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uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
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2014-04-22 00:55:08 +04:00
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{ \
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struct PPC_DFP dfp; \
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int expa, expb, a_is_special, b_is_special; \
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\
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dfp_prepare_decimal##size(&dfp, a, b, env); \
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\
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expa = dfp.a.exponent; \
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expb = dfp.b.exponent; \
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a_is_special = decNumberIsSpecial(&dfp.a); \
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b_is_special = decNumberIsSpecial(&dfp.b); \
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\
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if (a_is_special || b_is_special) { \
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int atype = a_is_special ? (decNumberIsNaN(&dfp.a) ? 4 : 2) : 1; \
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int btype = b_is_special ? (decNumberIsNaN(&dfp.b) ? 4 : 2) : 1; \
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dfp.crbf = (atype ^ btype) ? 0x1 : 0x2; \
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} else if (expa < expb) { \
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dfp.crbf = 0x8; \
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} else if (expa > expb) { \
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dfp.crbf = 0x4; \
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} else { \
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dfp.crbf = 0x2; \
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} \
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\
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dfp_set_FPCC_from_CRBF(&dfp); \
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return dfp.crbf; \
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}
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2021-10-29 22:24:13 +03:00
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DFP_HELPER_TSTEX(DTSTEX, 64)
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DFP_HELPER_TSTEX(DTSTEXQ, 128)
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2014-04-22 00:55:09 +04:00
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#define DFP_HELPER_TSTSF(op, size) \
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2019-09-26 21:57:57 +03:00
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uint32_t helper_##op(CPUPPCState *env, ppc_fprp_t *a, ppc_fprp_t *b) \
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2014-04-22 00:55:09 +04:00
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{ \
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struct PPC_DFP dfp; \
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unsigned k; \
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2019-09-26 21:57:59 +03:00
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ppc_vsr_t va; \
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2014-04-22 00:55:09 +04:00
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\
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dfp_prepare_decimal##size(&dfp, 0, b, env); \
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\
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2019-09-26 21:57:59 +03:00
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get_dfp64(&va, a); \
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k = va.VsrD(1) & 0x3F; \
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2014-04-22 00:55:09 +04:00
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\
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if (unlikely(decNumberIsSpecial(&dfp.b))) { \
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dfp.crbf = 1; \
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} else if (k == 0) { \
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dfp.crbf = 4; \
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} else if (unlikely(decNumberIsZero(&dfp.b))) { \
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/* Zero has no sig digits */ \
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dfp.crbf = 4; \
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} else { \
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unsigned nsd = dfp.b.digits; \
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if (k < nsd) { \
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dfp.crbf = 8; \
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} else if (k > nsd) { \
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dfp.crbf = 4; \
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} else { \
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dfp.crbf = 2; \
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} \
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} \
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\
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dfp_set_FPCC_from_CRBF(&dfp); \
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return dfp.crbf; \
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}
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2021-10-29 22:24:13 +03:00
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DFP_HELPER_TSTSF(DTSTSF, 64)
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DFP_HELPER_TSTSF(DTSTSFQ, 128)
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2014-04-22 00:55:10 +04:00
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2016-07-28 21:14:13 +03:00
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#define DFP_HELPER_TSTSFI(op, size) \
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2019-09-26 21:57:57 +03:00
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uint32_t helper_##op(CPUPPCState *env, uint32_t a, ppc_fprp_t *b) \
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2016-07-28 21:14:13 +03:00
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{ \
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struct PPC_DFP dfp; \
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unsigned uim; \
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\
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dfp_prepare_decimal##size(&dfp, 0, b, env); \
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\
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uim = a & 0x3F; \
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\
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if (unlikely(decNumberIsSpecial(&dfp.b))) { \
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dfp.crbf = 1; \
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} else if (uim == 0) { \
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dfp.crbf = 4; \
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} else if (unlikely(decNumberIsZero(&dfp.b))) { \
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/* Zero has no sig digits */ \
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dfp.crbf = 4; \
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} else { \
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unsigned nsd = dfp.b.digits; \
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if (uim < nsd) { \
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dfp.crbf = 8; \
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} else if (uim > nsd) { \
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dfp.crbf = 4; \
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} else { \
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dfp.crbf = 2; \
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} \
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} \
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\
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dfp_set_FPCC_from_CRBF(&dfp); \
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return dfp.crbf; \
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}
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2021-10-29 22:24:13 +03:00
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DFP_HELPER_TSTSFI(DTSTSFI, 64)
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DFP_HELPER_TSTSFI(DTSTSFIQ, 128)
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2016-07-28 21:14:13 +03:00
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2014-04-22 00:55:10 +04:00
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static void QUA_PPs(struct PPC_DFP *dfp)
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{
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dfp_set_FPRF_from_FRT(dfp);
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dfp_check_for_XX(dfp);
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dfp_check_for_VXSNAN(dfp);
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dfp_check_for_VXCVI(dfp);
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}
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static void dfp_quantize(uint8_t rmc, struct PPC_DFP *dfp)
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{
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dfp_set_round_mode_from_immediate(0, rmc, dfp);
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decNumberQuantize(&dfp->t, &dfp->b, &dfp->a, &dfp->context);
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if (decNumberIsSNaN(&dfp->a)) {
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dfp->t = dfp->a;
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dfp_makeQNaN(&dfp->t);
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} else if (decNumberIsSNaN(&dfp->b)) {
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dfp->t = dfp->b;
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dfp_makeQNaN(&dfp->t);
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} else if (decNumberIsQNaN(&dfp->a)) {
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dfp->t = dfp->a;
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} else if (decNumberIsQNaN(&dfp->b)) {
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dfp->t = dfp->b;
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}
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}
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#define DFP_HELPER_QUAI(op, size) \
|
2019-09-26 21:57:57 +03:00
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void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b, \
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2014-04-22 00:55:10 +04:00
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uint32_t te, uint32_t rmc) \
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{ \
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struct PPC_DFP dfp; \
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\
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dfp_prepare_decimal##size(&dfp, 0, b, env); \
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\
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decNumberFromUInt32(&dfp.a, 1); \
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dfp.a.exponent = (int32_t)((int8_t)(te << 3) >> 3); \
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\
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dfp_quantize(rmc, &dfp); \
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2019-09-26 21:57:58 +03:00
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dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:10 +04:00
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QUA_PPs(&dfp); \
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\
|
2019-09-26 21:58:01 +03:00
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set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:10 +04:00
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}
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2021-10-29 22:24:14 +03:00
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DFP_HELPER_QUAI(DQUAI, 64)
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DFP_HELPER_QUAI(DQUAIQ, 128)
|
2014-04-22 00:55:10 +04:00
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#define DFP_HELPER_QUA(op, size) \
|
2019-09-26 21:57:57 +03:00
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void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
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ppc_fprp_t *b, uint32_t rmc) \
|
2014-04-22 00:55:10 +04:00
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{ \
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struct PPC_DFP dfp; \
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\
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dfp_prepare_decimal##size(&dfp, a, b, env); \
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\
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dfp_quantize(rmc, &dfp); \
|
2019-09-26 21:57:58 +03:00
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dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:10 +04:00
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QUA_PPs(&dfp); \
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\
|
2019-09-26 21:58:01 +03:00
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set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:10 +04:00
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}
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2021-10-29 22:24:15 +03:00
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DFP_HELPER_QUA(DQUA, 64)
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DFP_HELPER_QUA(DQUAQ, 128)
|
2014-04-22 00:55:11 +04:00
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static void _dfp_reround(uint8_t rmc, int32_t ref_sig, int32_t xmax,
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struct PPC_DFP *dfp)
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{
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int msd_orig, msd_rslt;
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if (unlikely((ref_sig == 0) || (dfp->b.digits <= ref_sig))) {
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dfp->t = dfp->b;
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if (decNumberIsSNaN(&dfp->b)) {
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dfp_makeQNaN(&dfp->t);
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXSNAN, FPSCR_VE);
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}
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return;
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}
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/* Reround is equivalent to quantizing b with 1**E(n) where */
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/* n = exp(b) + numDigits(b) - reference_significance. */
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decNumberFromUInt32(&dfp->a, 1);
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dfp->a.exponent = dfp->b.exponent + dfp->b.digits - ref_sig;
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if (unlikely(dfp->a.exponent > xmax)) {
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dfp->t.digits = 0;
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dfp->t.bits &= ~DECNEG;
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dfp_makeQNaN(&dfp->t);
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXCVI, FPSCR_VE);
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return;
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}
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dfp_quantize(rmc, dfp);
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msd_orig = dfp_get_digit(&dfp->b, dfp->b.digits-1);
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msd_rslt = dfp_get_digit(&dfp->t, dfp->t.digits-1);
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/* If the quantization resulted in rounding up to the next magnitude, */
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/* then we need to shift the significand and adjust the exponent. */
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if (unlikely((msd_orig == 9) && (msd_rslt == 1))) {
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decNumber negone;
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decNumberFromInt32(&negone, -1);
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decNumberShift(&dfp->t, &dfp->t, &negone, &dfp->context);
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dfp->t.exponent++;
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if (unlikely(dfp->t.exponent > xmax)) {
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dfp_makeQNaN(&dfp->t);
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dfp->t.digits = 0;
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dfp_set_FPSCR_flag(dfp, FP_VX | FP_VXCVI, FP_VE);
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/* Inhibit XX in this case */
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decContextClearStatus(&dfp->context, DEC_Inexact);
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}
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}
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}
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#define DFP_HELPER_RRND(op, size) \
|
2019-09-26 21:57:57 +03:00
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void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
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ppc_fprp_t *b, uint32_t rmc) \
|
2014-04-22 00:55:11 +04:00
|
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|
{ \
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struct PPC_DFP dfp; \
|
2019-09-26 21:57:59 +03:00
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ppc_vsr_t va; \
|
2019-09-26 21:57:55 +03:00
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int32_t ref_sig; \
|
2014-04-22 00:55:11 +04:00
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int32_t xmax = ((size) == 64) ? 369 : 6111; \
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\
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dfp_prepare_decimal##size(&dfp, 0, b, env); \
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\
|
2019-09-26 21:57:59 +03:00
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get_dfp64(&va, a); \
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ref_sig = va.VsrD(1) & 0x3f; \
|
2019-09-26 21:57:55 +03:00
|
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\
|
2014-04-22 00:55:11 +04:00
|
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_dfp_reround(rmc, ref_sig, xmax, &dfp); \
|
2019-09-26 21:57:58 +03:00
|
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dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:11 +04:00
|
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QUA_PPs(&dfp); \
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\
|
2019-09-26 21:58:01 +03:00
|
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set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:11 +04:00
|
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}
|
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|
2021-10-29 22:24:15 +03:00
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DFP_HELPER_RRND(DRRND, 64)
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DFP_HELPER_RRND(DRRNDQ, 128)
|
2014-04-22 00:55:12 +04:00
|
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#define DFP_HELPER_RINT(op, postprocs, size) \
|
2019-09-26 21:57:57 +03:00
|
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|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b, \
|
2014-04-22 00:55:12 +04:00
|
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uint32_t r, uint32_t rmc) \
|
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
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\
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dfp_prepare_decimal##size(&dfp, 0, b, env); \
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|
\
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|
dfp_set_round_mode_from_immediate(r, rmc, &dfp); \
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|
|
decNumberToIntegralExact(&dfp.t, &dfp.b, &dfp.context); \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:12 +04:00
|
|
|
postprocs(&dfp); \
|
|
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|
\
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:12 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void RINTX_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:14 +03:00
|
|
|
DFP_HELPER_RINT(DRINTX, RINTX_PPs, 64)
|
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|
DFP_HELPER_RINT(DRINTXQ, RINTX_PPs, 128)
|
2014-04-22 00:55:12 +04:00
|
|
|
|
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|
|
static void RINTN_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_VXSNAN(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:14 +03:00
|
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|
DFP_HELPER_RINT(DRINTN, RINTN_PPs, 64)
|
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|
DFP_HELPER_RINT(DRINTNQ, RINTN_PPs, 128)
|
2014-04-22 00:55:13 +04:00
|
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|
|
2021-10-29 22:24:16 +03:00
|
|
|
void helper_DCTDP(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
|
2014-04-22 00:55:13 +04:00
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
2019-09-26 21:57:59 +03:00
|
|
|
ppc_vsr_t vb;
|
2019-09-26 21:57:55 +03:00
|
|
|
uint32_t b_short;
|
|
|
|
|
2019-09-26 21:57:59 +03:00
|
|
|
get_dfp64(&vb, b);
|
|
|
|
b_short = (uint32_t)vb.VsrD(1);
|
2019-09-26 21:57:55 +03:00
|
|
|
|
2014-04-22 00:55:13 +04:00
|
|
|
dfp_prepare_decimal64(&dfp, 0, 0, env);
|
|
|
|
decimal32ToNumber((decimal32 *)&b_short, &dfp.t);
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal64(&dfp);
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp64(t, &dfp.vt);
|
2014-04-22 00:55:13 +04:00
|
|
|
dfp_set_FPRF_from_FRT(&dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
void helper_DCTQPQ(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
|
2014-04-22 00:55:13 +04:00
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
2019-09-26 21:57:59 +03:00
|
|
|
ppc_vsr_t vb;
|
2014-04-22 00:55:13 +04:00
|
|
|
dfp_prepare_decimal128(&dfp, 0, 0, env);
|
2019-09-26 21:57:59 +03:00
|
|
|
get_dfp64(&vb, b);
|
|
|
|
decimal64ToNumber((decimal64 *)&vb.VsrD(1), &dfp.t);
|
2014-04-22 00:55:13 +04:00
|
|
|
|
|
|
|
dfp_check_for_VXSNAN_and_convert_to_QNaN(&dfp);
|
|
|
|
dfp_set_FPRF_from_FRT(&dfp);
|
|
|
|
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal128(&dfp);
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp128(t, &dfp.vt);
|
2014-04-22 00:55:13 +04:00
|
|
|
}
|
2014-04-22 00:55:14 +04:00
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
void helper_DRSP(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
|
2014-04-22 00:55:14 +04:00
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
|
|
|
uint32_t t_short = 0;
|
2019-09-26 21:57:59 +03:00
|
|
|
ppc_vsr_t vt;
|
2014-04-22 00:55:14 +04:00
|
|
|
dfp_prepare_decimal64(&dfp, 0, b, env);
|
|
|
|
decimal32FromNumber((decimal32 *)&t_short, &dfp.b, &dfp.context);
|
|
|
|
decimal32ToNumber((decimal32 *)&t_short, &dfp.t);
|
|
|
|
|
|
|
|
dfp_set_FPRF_from_FRT_short(&dfp);
|
|
|
|
dfp_check_for_OX(&dfp);
|
|
|
|
dfp_check_for_UX(&dfp);
|
|
|
|
dfp_check_for_XX(&dfp);
|
|
|
|
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = (uint64_t)t_short;
|
|
|
|
set_dfp64(t, &vt);
|
2014-04-22 00:55:14 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
void helper_DRDPQ(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b)
|
2014-04-22 00:55:14 +04:00
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
|
|
|
dfp_prepare_decimal128(&dfp, 0, b, env);
|
2019-09-26 21:57:59 +03:00
|
|
|
decimal64FromNumber((decimal64 *)&dfp.vt.VsrD(1), &dfp.b, &dfp.context);
|
|
|
|
decimal64ToNumber((decimal64 *)&dfp.vt.VsrD(1), &dfp.t);
|
2014-04-22 00:55:14 +04:00
|
|
|
|
|
|
|
dfp_check_for_VXSNAN_and_convert_to_QNaN(&dfp);
|
|
|
|
dfp_set_FPRF_from_FRT_long(&dfp);
|
|
|
|
dfp_check_for_OX(&dfp);
|
|
|
|
dfp_check_for_UX(&dfp);
|
|
|
|
dfp_check_for_XX(&dfp);
|
|
|
|
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(0) = dfp.vt.VsrD(1) = 0;
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal64(&dfp);
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp128(t, &dfp.vt);
|
2014-04-22 00:55:14 +04:00
|
|
|
}
|
2014-04-22 00:55:15 +04:00
|
|
|
|
|
|
|
#define DFP_HELPER_CFFIX(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \
|
2014-04-22 00:55:15 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
2019-09-26 21:57:59 +03:00
|
|
|
ppc_vsr_t vb; \
|
2014-04-22 00:55:15 +04:00
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
2019-09-26 21:57:59 +03:00
|
|
|
get_dfp64(&vb, b); \
|
|
|
|
decNumberFromInt64(&dfp.t, (int64_t)vb.VsrD(1)); \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:15 +04:00
|
|
|
CFFIX_PPs(&dfp); \
|
|
|
|
\
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:15 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void CFFIX_PPs(struct PPC_DFP *dfp)
|
|
|
|
{
|
|
|
|
dfp_set_FPRF_from_FRT(dfp);
|
|
|
|
dfp_check_for_XX(dfp);
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
DFP_HELPER_CFFIX(DCFFIX, 64)
|
|
|
|
DFP_HELPER_CFFIX(DCFFIXQ, 128)
|
2014-04-22 00:55:16 +04:00
|
|
|
|
2021-10-29 22:24:06 +03:00
|
|
|
void helper_DCFFIXQQ(CPUPPCState *env, ppc_fprp_t *t, ppc_avr_t *b)
|
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
|
|
|
|
|
|
|
dfp_prepare_decimal128(&dfp, NULL, NULL, env);
|
|
|
|
decNumberFromInt128(&dfp.t, (uint64_t)b->VsrD(1), (int64_t)b->VsrD(0));
|
|
|
|
dfp_finalize_decimal128(&dfp);
|
|
|
|
CFFIX_PPs(&dfp);
|
|
|
|
|
|
|
|
set_dfp128(t, &dfp.vt);
|
|
|
|
}
|
|
|
|
|
2014-04-22 00:55:16 +04:00
|
|
|
#define DFP_HELPER_CTFIX(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \
|
2014-04-22 00:55:16 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
|
|
|
\
|
|
|
|
if (unlikely(decNumberIsSpecial(&dfp.b))) { \
|
|
|
|
uint64_t invalid_flags = FP_VX | FP_VXCVI; \
|
|
|
|
if (decNumberIsInfinite(&dfp.b)) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = decNumberIsNegative(&dfp.b) ? INT64_MIN : \
|
|
|
|
INT64_MAX; \
|
2014-04-22 00:55:16 +04:00
|
|
|
} else { /* NaN */ \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = INT64_MIN; \
|
2014-04-22 00:55:16 +04:00
|
|
|
if (decNumberIsSNaN(&dfp.b)) { \
|
|
|
|
invalid_flags |= FP_VXSNAN; \
|
|
|
|
} \
|
|
|
|
} \
|
|
|
|
dfp_set_FPSCR_flag(&dfp, invalid_flags, FP_VE); \
|
|
|
|
} else if (unlikely(decNumberIsZero(&dfp.b))) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = 0; \
|
2014-04-22 00:55:16 +04:00
|
|
|
} else { \
|
|
|
|
decNumberToIntegralExact(&dfp.b, &dfp.b, &dfp.context); \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = decNumberIntegralToInt64(&dfp.b, &dfp.context); \
|
2014-04-22 00:55:16 +04:00
|
|
|
if (decContextTestStatus(&dfp.context, DEC_Invalid_operation)) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = decNumberIsNegative(&dfp.b) ? INT64_MIN : \
|
|
|
|
INT64_MAX; \
|
2014-04-22 00:55:16 +04:00
|
|
|
dfp_set_FPSCR_flag(&dfp, FP_VX | FP_VXCVI, FP_VE); \
|
|
|
|
} else { \
|
|
|
|
dfp_check_for_XX(&dfp); \
|
|
|
|
} \
|
|
|
|
} \
|
|
|
|
\
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp64(t, &dfp.vt); \
|
2014-04-22 00:55:16 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
DFP_HELPER_CTFIX(DCTFIX, 64)
|
|
|
|
DFP_HELPER_CTFIX(DCTFIXQ, 128)
|
2014-04-22 00:55:17 +04:00
|
|
|
|
2021-10-29 22:24:09 +03:00
|
|
|
void helper_DCTFIXQQ(CPUPPCState *env, ppc_avr_t *t, ppc_fprp_t *b)
|
|
|
|
{
|
|
|
|
struct PPC_DFP dfp;
|
|
|
|
dfp_prepare_decimal128(&dfp, 0, b, env);
|
|
|
|
|
|
|
|
if (unlikely(decNumberIsSpecial(&dfp.b))) {
|
|
|
|
uint64_t invalid_flags = FP_VX | FP_VXCVI;
|
|
|
|
if (decNumberIsInfinite(&dfp.b)) {
|
|
|
|
if (decNumberIsNegative(&dfp.b)) {
|
|
|
|
dfp.vt.VsrD(0) = INT64_MIN;
|
|
|
|
dfp.vt.VsrD(1) = 0;
|
|
|
|
} else {
|
|
|
|
dfp.vt.VsrD(0) = INT64_MAX;
|
|
|
|
dfp.vt.VsrD(1) = UINT64_MAX;
|
|
|
|
}
|
|
|
|
} else { /* NaN */
|
|
|
|
dfp.vt.VsrD(0) = INT64_MIN;
|
|
|
|
dfp.vt.VsrD(1) = 0;
|
|
|
|
if (decNumberIsSNaN(&dfp.b)) {
|
|
|
|
invalid_flags |= FP_VXSNAN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
dfp_set_FPSCR_flag(&dfp, invalid_flags, FP_VE);
|
|
|
|
} else if (unlikely(decNumberIsZero(&dfp.b))) {
|
|
|
|
dfp.vt.VsrD(0) = 0;
|
|
|
|
dfp.vt.VsrD(1) = 0;
|
|
|
|
} else {
|
|
|
|
decNumberToIntegralExact(&dfp.b, &dfp.b, &dfp.context);
|
|
|
|
decNumberIntegralToInt128(&dfp.b, &dfp.context,
|
|
|
|
&dfp.vt.VsrD(1), &dfp.vt.VsrD(0));
|
|
|
|
if (decContextTestStatus(&dfp.context, DEC_Invalid_operation)) {
|
|
|
|
if (decNumberIsNegative(&dfp.b)) {
|
|
|
|
dfp.vt.VsrD(0) = INT64_MIN;
|
|
|
|
dfp.vt.VsrD(1) = 0;
|
|
|
|
} else {
|
|
|
|
dfp.vt.VsrD(0) = INT64_MAX;
|
|
|
|
dfp.vt.VsrD(1) = UINT64_MAX;
|
|
|
|
}
|
|
|
|
dfp_set_FPSCR_flag(&dfp, FP_VX | FP_VXCVI, FP_VE);
|
|
|
|
} else {
|
|
|
|
dfp_check_for_XX(&dfp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
set_dfp128_to_avr(t, &dfp.vt);
|
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline void dfp_set_bcd_digit_64(ppc_vsr_t *t, uint8_t digit,
|
|
|
|
unsigned n)
|
2014-04-22 00:55:17 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD(1) |= ((uint64_t)(digit & 0xF) << (n << 2));
|
2014-04-22 00:55:17 +04:00
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline void dfp_set_bcd_digit_128(ppc_vsr_t *t, uint8_t digit,
|
|
|
|
unsigned n)
|
2014-04-22 00:55:17 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD((n & 0x10) ? 0 : 1) |=
|
2014-04-22 00:55:17 +04:00
|
|
|
((uint64_t)(digit & 0xF) << ((n & 15) << 2));
|
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline void dfp_set_sign_64(ppc_vsr_t *t, uint8_t sgn)
|
2014-04-22 00:55:17 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD(1) <<= 4;
|
|
|
|
t->VsrD(1) |= (sgn & 0xF);
|
2014-04-22 00:55:17 +04:00
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline void dfp_set_sign_128(ppc_vsr_t *t, uint8_t sgn)
|
2014-04-22 00:55:17 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD(0) <<= 4;
|
|
|
|
t->VsrD(0) |= (t->VsrD(1) >> 60);
|
|
|
|
t->VsrD(1) <<= 4;
|
|
|
|
t->VsrD(1) |= (sgn & 0xF);
|
2014-04-22 00:55:17 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#define DFP_HELPER_DEDPD(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b, \
|
|
|
|
uint32_t sp) \
|
2014-04-22 00:55:17 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
uint8_t digits[34]; \
|
|
|
|
int i, N; \
|
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
|
|
|
\
|
|
|
|
decNumberGetBCD(&dfp.b, digits); \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(0) = dfp.vt.VsrD(1) = 0; \
|
2014-04-22 00:55:17 +04:00
|
|
|
N = dfp.b.digits; \
|
|
|
|
\
|
|
|
|
for (i = 0; (i < N) && (i < (size)/4); i++) { \
|
2019-09-26 21:58:00 +03:00
|
|
|
dfp_set_bcd_digit_##size(&dfp.vt, digits[N - i - 1], i); \
|
2014-04-22 00:55:17 +04:00
|
|
|
} \
|
|
|
|
\
|
|
|
|
if (sp & 2) { \
|
|
|
|
uint8_t sgn; \
|
|
|
|
\
|
|
|
|
if (decNumberIsNegative(&dfp.b)) { \
|
|
|
|
sgn = 0xD; \
|
|
|
|
} else { \
|
|
|
|
sgn = ((sp & 1) ? 0xF : 0xC); \
|
|
|
|
} \
|
2019-09-26 21:58:00 +03:00
|
|
|
dfp_set_sign_##size(&dfp.vt, sgn); \
|
2014-04-22 00:55:17 +04:00
|
|
|
} \
|
|
|
|
\
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:17 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:17 +03:00
|
|
|
DFP_HELPER_DEDPD(DDEDPD, 64)
|
|
|
|
DFP_HELPER_DEDPD(DDEDPDQ, 128)
|
2014-04-22 00:55:18 +04:00
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline uint8_t dfp_get_bcd_digit_64(ppc_vsr_t *t, unsigned n)
|
2014-04-22 00:55:18 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
return t->VsrD(1) >> ((n << 2) & 63) & 15;
|
2014-04-22 00:55:18 +04:00
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static inline uint8_t dfp_get_bcd_digit_128(ppc_vsr_t *t, unsigned n)
|
2014-04-22 00:55:18 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
return t->VsrD((n & 0x10) ? 0 : 1) >> ((n << 2) & 63) & 15;
|
2014-04-22 00:55:18 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#define DFP_HELPER_ENBCD(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b, \
|
|
|
|
uint32_t s) \
|
2014-04-22 00:55:18 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
uint8_t digits[32]; \
|
|
|
|
int n = 0, offset = 0, sgn = 0, nonzero = 0; \
|
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
|
|
|
\
|
|
|
|
decNumberZero(&dfp.t); \
|
|
|
|
\
|
|
|
|
if (s) { \
|
2019-09-26 21:58:00 +03:00
|
|
|
uint8_t sgnNibble = dfp_get_bcd_digit_##size(&dfp.vb, offset++); \
|
2014-04-22 00:55:18 +04:00
|
|
|
switch (sgnNibble) { \
|
|
|
|
case 0xD: \
|
|
|
|
case 0xB: \
|
|
|
|
sgn = 1; \
|
|
|
|
break; \
|
|
|
|
case 0xC: \
|
|
|
|
case 0xF: \
|
|
|
|
case 0xA: \
|
|
|
|
case 0xE: \
|
|
|
|
sgn = 0; \
|
|
|
|
break; \
|
|
|
|
default: \
|
|
|
|
dfp_set_FPSCR_flag(&dfp, FP_VX | FP_VXCVI, FPSCR_VE); \
|
|
|
|
return; \
|
|
|
|
} \
|
|
|
|
} \
|
|
|
|
\
|
2019-03-21 09:08:17 +03:00
|
|
|
while (offset < (size) / 4) { \
|
2014-04-22 00:55:18 +04:00
|
|
|
n++; \
|
2019-09-26 21:58:00 +03:00
|
|
|
digits[(size) / 4 - n] = dfp_get_bcd_digit_##size(&dfp.vb, \
|
2019-09-26 21:57:59 +03:00
|
|
|
offset++); \
|
2019-03-21 09:08:17 +03:00
|
|
|
if (digits[(size) / 4 - n] > 10) { \
|
2014-04-22 00:55:18 +04:00
|
|
|
dfp_set_FPSCR_flag(&dfp, FP_VX | FP_VXCVI, FPSCR_VE); \
|
|
|
|
return; \
|
|
|
|
} else { \
|
2019-03-21 09:08:17 +03:00
|
|
|
nonzero |= (digits[(size) / 4 - n] > 0); \
|
2014-04-22 00:55:18 +04:00
|
|
|
} \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
if (nonzero) { \
|
2019-03-21 09:08:17 +03:00
|
|
|
decNumberSetBCD(&dfp.t, digits + ((size) / 4) - n, n); \
|
2014-04-22 00:55:18 +04:00
|
|
|
} \
|
|
|
|
\
|
|
|
|
if (s && sgn) { \
|
|
|
|
dfp.t.bits |= DECNEG; \
|
|
|
|
} \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:18 +04:00
|
|
|
dfp_set_FPRF_from_FRT(&dfp); \
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:18 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:17 +03:00
|
|
|
DFP_HELPER_ENBCD(DENBCD, 64)
|
|
|
|
DFP_HELPER_ENBCD(DENBCDQ, 128)
|
2014-04-22 00:55:19 +04:00
|
|
|
|
|
|
|
#define DFP_HELPER_XEX(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \
|
2014-04-22 00:55:19 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
2019-09-26 21:57:59 +03:00
|
|
|
ppc_vsr_t vt; \
|
2014-04-22 00:55:19 +04:00
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
|
|
|
\
|
|
|
|
if (unlikely(decNumberIsSpecial(&dfp.b))) { \
|
|
|
|
if (decNumberIsInfinite(&dfp.b)) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = -1; \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else if (decNumberIsSNaN(&dfp.b)) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = -3; \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else if (decNumberIsQNaN(&dfp.b)) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = -2; \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else { \
|
|
|
|
assert(0); \
|
|
|
|
} \
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp64(t, &vt); \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else { \
|
|
|
|
if ((size) == 64) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = dfp.b.exponent + 398; \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else if ((size) == 128) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
vt.VsrD(1) = dfp.b.exponent + 6176; \
|
2014-04-22 00:55:19 +04:00
|
|
|
} else { \
|
|
|
|
assert(0); \
|
|
|
|
} \
|
2019-09-26 21:57:59 +03:00
|
|
|
set_dfp64(t, &vt); \
|
2014-04-22 00:55:19 +04:00
|
|
|
} \
|
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:16 +03:00
|
|
|
DFP_HELPER_XEX(DXEX, 64)
|
|
|
|
DFP_HELPER_XEX(DXEXQ, 128)
|
2014-04-22 00:55:20 +04:00
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static void dfp_set_raw_exp_64(ppc_vsr_t *t, uint64_t raw)
|
2014-04-22 00:55:20 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD(1) &= 0x8003ffffffffffffULL;
|
|
|
|
t->VsrD(1) |= (raw << (63 - 13));
|
2014-04-22 00:55:20 +04:00
|
|
|
}
|
|
|
|
|
2019-09-26 21:58:00 +03:00
|
|
|
static void dfp_set_raw_exp_128(ppc_vsr_t *t, uint64_t raw)
|
2014-04-22 00:55:20 +04:00
|
|
|
{
|
2019-09-26 21:58:00 +03:00
|
|
|
t->VsrD(0) &= 0x80003fffffffffffULL;
|
|
|
|
t->VsrD(0) |= (raw << (63 - 17));
|
2014-04-22 00:55:20 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#define DFP_HELPER_IEX(op, size) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
|
|
|
|
ppc_fprp_t *b) \
|
2014-04-22 00:55:20 +04:00
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
2019-09-26 21:57:59 +03:00
|
|
|
uint64_t raw_qnan, raw_snan, raw_inf, max_exp; \
|
|
|
|
ppc_vsr_t va; \
|
2014-04-22 00:55:20 +04:00
|
|
|
int bias; \
|
2019-09-26 21:57:55 +03:00
|
|
|
int64_t exp; \
|
2014-04-22 00:55:20 +04:00
|
|
|
\
|
2019-09-26 21:57:59 +03:00
|
|
|
get_dfp64(&va, a); \
|
|
|
|
exp = (int64_t)va.VsrD(1); \
|
2014-04-22 00:55:20 +04:00
|
|
|
dfp_prepare_decimal##size(&dfp, 0, b, env); \
|
|
|
|
\
|
|
|
|
if ((size) == 64) { \
|
|
|
|
max_exp = 767; \
|
|
|
|
raw_qnan = 0x1F00; \
|
|
|
|
raw_snan = 0x1F80; \
|
|
|
|
raw_inf = 0x1E00; \
|
|
|
|
bias = 398; \
|
|
|
|
} else if ((size) == 128) { \
|
|
|
|
max_exp = 12287; \
|
|
|
|
raw_qnan = 0x1f000; \
|
|
|
|
raw_snan = 0x1f800; \
|
|
|
|
raw_inf = 0x1e000; \
|
|
|
|
bias = 6176; \
|
|
|
|
} else { \
|
|
|
|
assert(0); \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
if (unlikely((exp < 0) || (exp > max_exp))) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(0) = dfp.vb.VsrD(0); \
|
|
|
|
dfp.vt.VsrD(1) = dfp.vb.VsrD(1); \
|
2014-04-22 00:55:20 +04:00
|
|
|
if (exp == -1) { \
|
2019-09-26 21:58:00 +03:00
|
|
|
dfp_set_raw_exp_##size(&dfp.vt, raw_inf); \
|
2014-04-22 00:55:20 +04:00
|
|
|
} else if (exp == -3) { \
|
2019-09-26 21:58:00 +03:00
|
|
|
dfp_set_raw_exp_##size(&dfp.vt, raw_snan); \
|
2014-04-22 00:55:20 +04:00
|
|
|
} else { \
|
2019-09-26 21:58:00 +03:00
|
|
|
dfp_set_raw_exp_##size(&dfp.vt, raw_qnan); \
|
2014-04-22 00:55:20 +04:00
|
|
|
} \
|
|
|
|
} else { \
|
|
|
|
dfp.t = dfp.b; \
|
|
|
|
if (unlikely(decNumberIsSpecial(&dfp.t))) { \
|
|
|
|
dfp.t.bits &= ~DECSPECIAL; \
|
|
|
|
} \
|
|
|
|
dfp.t.exponent = exp - bias; \
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:20 +04:00
|
|
|
} \
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:20 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:12 +03:00
|
|
|
DFP_HELPER_IEX(DIEX, 64)
|
|
|
|
DFP_HELPER_IEX(DIEXQ, 128)
|
2014-04-22 00:55:21 +04:00
|
|
|
|
|
|
|
static void dfp_clear_lmd_from_g5msb(uint64_t *t)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* The most significant 5 bits of the PowerPC DFP format combine bits */
|
|
|
|
/* from the left-most decimal digit (LMD) and the biased exponent. */
|
|
|
|
/* This routine clears the LMD bits while preserving the exponent */
|
|
|
|
/* bits. See "Figure 80: Encoding of bits 0:4 of the G field for */
|
|
|
|
/* Finite Numbers" in the Power ISA for additional details. */
|
|
|
|
|
|
|
|
uint64_t g5msb = (*t >> 58) & 0x1F;
|
|
|
|
|
|
|
|
if ((g5msb >> 3) < 3) { /* LMD in [0-7] ? */
|
|
|
|
*t &= ~(7ULL << 58);
|
|
|
|
} else {
|
|
|
|
switch (g5msb & 7) {
|
|
|
|
case 0:
|
|
|
|
case 1:
|
|
|
|
g5msb = 0;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
case 3:
|
|
|
|
g5msb = 0x8;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
case 5:
|
|
|
|
g5msb = 0x10;
|
|
|
|
break;
|
|
|
|
case 6:
|
|
|
|
g5msb = 0x1E;
|
|
|
|
break;
|
|
|
|
case 7:
|
|
|
|
g5msb = 0x1F;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
*t &= ~(0x1fULL << 58);
|
|
|
|
*t |= (g5msb << 58);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#define DFP_HELPER_SHIFT(op, size, shift_left) \
|
2019-09-26 21:57:57 +03:00
|
|
|
void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *a, \
|
2014-04-22 00:55:21 +04:00
|
|
|
uint32_t sh) \
|
|
|
|
{ \
|
|
|
|
struct PPC_DFP dfp; \
|
|
|
|
unsigned max_digits = ((size) == 64) ? 16 : 34; \
|
|
|
|
\
|
|
|
|
dfp_prepare_decimal##size(&dfp, a, 0, env); \
|
|
|
|
\
|
|
|
|
if (sh <= max_digits) { \
|
|
|
|
\
|
|
|
|
decNumber shd; \
|
|
|
|
unsigned special = dfp.a.bits & DECSPECIAL; \
|
|
|
|
\
|
|
|
|
if (shift_left) { \
|
|
|
|
decNumberFromUInt32(&shd, sh); \
|
|
|
|
} else { \
|
|
|
|
decNumberFromInt32(&shd, -((int32_t)sh)); \
|
|
|
|
} \
|
|
|
|
\
|
|
|
|
dfp.a.bits &= ~DECSPECIAL; \
|
|
|
|
decNumberShift(&dfp.t, &dfp.a, &shd, &dfp.context); \
|
|
|
|
\
|
|
|
|
dfp.t.bits |= special; \
|
|
|
|
if (special && (dfp.t.digits >= max_digits)) { \
|
|
|
|
dfp.t.digits = max_digits - 1; \
|
|
|
|
} \
|
|
|
|
\
|
2019-09-26 21:57:58 +03:00
|
|
|
dfp_finalize_decimal##size(&dfp); \
|
2014-04-22 00:55:21 +04:00
|
|
|
} else { \
|
|
|
|
if ((size) == 64) { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(1) = dfp.va.VsrD(1) & \
|
|
|
|
0xFFFC000000000000ULL; \
|
|
|
|
dfp_clear_lmd_from_g5msb(&dfp.vt.VsrD(1)); \
|
2014-04-22 00:55:21 +04:00
|
|
|
} else { \
|
2019-09-26 21:57:59 +03:00
|
|
|
dfp.vt.VsrD(0) = dfp.va.VsrD(0) & \
|
|
|
|
0xFFFFC00000000000ULL; \
|
|
|
|
dfp_clear_lmd_from_g5msb(&dfp.vt.VsrD(0)); \
|
|
|
|
dfp.vt.VsrD(1) = 0; \
|
2014-04-22 00:55:21 +04:00
|
|
|
} \
|
|
|
|
} \
|
|
|
|
\
|
2019-09-26 21:58:01 +03:00
|
|
|
set_dfp##size(t, &dfp.vt); \
|
2014-04-22 00:55:21 +04:00
|
|
|
}
|
|
|
|
|
2021-10-29 22:24:17 +03:00
|
|
|
DFP_HELPER_SHIFT(DSCLI, 64, 1)
|
|
|
|
DFP_HELPER_SHIFT(DSCLIQ, 128, 1)
|
|
|
|
DFP_HELPER_SHIFT(DSCRI, 64, 0)
|
|
|
|
DFP_HELPER_SHIFT(DSCRIQ, 128, 0)
|